Skip to content

Commit a0cb54e

Browse files
committed
docs: add English README translation
1 parent d3126c3 commit a0cb54e

2 files changed

Lines changed: 61 additions & 0 deletions

File tree

README.en.md

Lines changed: 59 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,59 @@
1+
# SGEMM Optimization: From Naive to Tensor Core
2+
3+
[![License: MIT](https://img.shields.io/badge/License-MIT-blue.svg)](LICENSE)
4+
![CUDA](https://img.shields.io/badge/CUDA-11.0+-76B900?logo=nvidia&logoColor=white)
5+
![C++](https://img.shields.io/badge/C%2B%2B-17-00599C?logo=c%2B%2B&logoColor=white)
6+
7+
[简体中文](README.md) | English
8+
9+
Hand-written, progressively optimized matrix multiplication — the "Hello World" of HPC.
10+
11+
## Performance (RTX 3060 Laptop, 1024×1024×1024)
12+
13+
| Kernel | GFLOPS | vs cuBLAS |
14+
|--------|--------|-----------|
15+
| cuBLAS (ref) | 5727 | 100% |
16+
| Tensor Core (WMMA) | 2300 | 40.2% |
17+
| Tiled (32×32) | 753 | 13.1% |
18+
| Double Buffer | 701 | 12.2% |
19+
| Bank Conflict Free | 673 | 11.8% |
20+
| Naive | 604 | 10.6% |
21+
22+
## Optimization Levels
23+
24+
| Level | Description | Key Technique |
25+
|-------|-------------|---------------|
26+
| Naive | Basic triple loop | One thread per output element |
27+
| Tiled | Shared memory tiling | Data reuse, reduced global memory access |
28+
| Bank Conflict Free | Eliminate bank conflicts | Shared memory padding (+1) |
29+
| Double Buffer | Pipeline overlap | Compute/memory overlap |
30+
| Tensor Core | WMMA API | Hardware-accelerated matrix ops (FP16→FP32) |
31+
32+
## Build & Run
33+
34+
```bash
35+
make GPU_ARCH=sm_86 # Adjust for your GPU
36+
./build/sgemm_benchmark
37+
```
38+
39+
## Key Optimization Techniques
40+
41+
1. **Memory Coalescing** — Warp-aligned memory access for full bandwidth
42+
2. **Shared Memory Tiling** — O(N³/TILE_SIZE) global memory reduction
43+
3. **Bank Conflict Elimination** — +1 padding for 32x bandwidth recovery
44+
4. **Double Buffering** — Overlap next-tile load with current-tile compute
45+
5. **Tensor Core (WMMA)** — 16×16×16 hardware MMA, ~8x over CUDA Cores
46+
47+
## Project Structure
48+
49+
```
50+
├── src/kernels/ # 5 kernel implementations
51+
├── src/utils/ # CUDA utils, benchmark, verification
52+
├── src/main.cu # Entry point
53+
├── tests/test_sgemm.cu # Google Test property tests
54+
└── Makefile
55+
```
56+
57+
## License
58+
59+
MIT License

README.md

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,7 @@
11
# SGEMM Optimization: From Naive to Tensor Core
22

3+
简体中文 | [English](README.en.md)
4+
35
[![License: MIT](https://img.shields.io/badge/License-MIT-blue.svg)](LICENSE)
46
![CUDA](https://img.shields.io/badge/CUDA-11.0+-76B900?logo=nvidia&logoColor=white)
57
![C++](https://img.shields.io/badge/C%2B%2B-17-00599C?logo=c%2B%2B&logoColor=white)

0 commit comments

Comments
 (0)