Skip to content
This repository was archived by the owner on Dec 18, 2025. It is now read-only.

Commit a4b8c27

Browse files
committed
CoreValidation: Adapt path changes for Cortex-M core
1 parent c7321a3 commit a4b8c27

10 files changed

Lines changed: 4676 additions & 4537 deletions

File tree

.github/workflows/caller-corevalidation.yml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@ on:
66
paths:
77
- .github/workflows/caller-corevalidation.yml
88
- CMSIS/Core/**/*
9+
- CMSIS/Core_M/**/*
910
- CMSIS/Core_A/**/*
1011
- CMSIS/CoreValidation/**/*
1112
- Device/ARM/**/*

.github/workflows/codeql-analysis.yml

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@ on:
66
branches: [ develop ]
77
paths:
88
- 'CMSIS/Core/**'
9+
- 'CMSIS/Core_M/**'
910
- 'CMSIS/Core_A/**'
1011
- 'CMSIS/CoreValidation/**'
1112
- 'Device/ARM/**'
@@ -14,6 +15,7 @@ on:
1415
paths:
1516
- '.github/workflows/codeql-analysis.yml'
1617
- 'CMSIS/Core/**'
18+
- 'CMSIS/Core_M/**'
1719
- 'CMSIS/Core_A/**'
1820
- 'CMSIS/CoreValidation/**'
1921
- 'Device/ARM/**'

.github/workflows/fileheader.yml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,7 @@ on:
55
branches: [ develop ]
66
paths:
77
- 'CMSIS/Core/**'
8+
- 'CMSIS/Core_M/**'
89
- 'CMSIS/Core_A/**'
910
- 'CMSIS/RTOS2/Include/**'
1011
- 'CMSIS/RTOS2/Source/**'

ARM.CMSIS.pdsc

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1662,16 +1662,24 @@ and 8-bit Java bytecodes in Jazelle state.
16621662

16631663
<components>
16641664
<!-- CMSIS-Core component -->
1665+
<component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" >
1666+
<description>CMSIS-CORE for Cortex-A/R/M</description>
1667+
<files>
1668+
<!-- CPU independent -->
1669+
<file category="include" name="CMSIS/Core/"/>
1670+
</files>
1671+
</component>
1672+
16651673
<component Cclass="CMSIS" Cgroup="CORE" Cversion="5.6.0" condition="ARMv6_7_8-M Device" >
16661674
<description>CMSIS-CORE for Cortex-M, SC000, SC300, Star-MC1, ARMv8-M, ARMv8.1-M</description>
16671675
<files>
16681676
<!-- CPU independent -->
16691677
<file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1670-
<file category="include" name="CMSIS/Core/Include/"/>
1671-
<file category="header" name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
1678+
<file category="include" name="CMSIS/Core_M/Include/"/>
1679+
<file category="header" name="CMSIS/Core_M/Include/tz_context.h" condition="TrustZone"/>
16721680
<!-- Code template -->
1673-
<file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c" version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
1674-
<file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1681+
<file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core_M/Template/ARMv8-M/main_s.c" version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
1682+
<file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core_M/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
16751683
</files>
16761684
</component>
16771685

CMSIS/CoreValidation/Project/avh.yml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@ backend:
77
upload:
88
- ARM.CMSIS.pdsc
99
- CMSIS/Core/**/*
10+
- CMSIS/Core_M/**/*
1011
- CMSIS/Core_A/**/*
1112
- CMSIS/CoreValidation/**/*
1213
- -:CMSIS/CoreValidation/Project/Core_Validation-*.zip

0 commit comments

Comments
 (0)