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Devices: Ensure IRQn_Type enum size matches maximum value
This change fixes a bug where a compiler choses a signed byte to store the IRQn_Type enum type as all listed enum values fit a signed byte. This causes undefined behavior when calling functions such as NVIC_EnableIRQ with interrupt channels greater than 127 as these do not fit a signed byte. As a result, interrupt channels higher than 127 cannot be enabled, disabled, or triggered. Fix this by listing the highest possible interrupt channel in each enum declaration which ensures that a storage type is chosen that can accommodate all valid interrupt channels. Tested on a MEC1527 devices by triggering interrupt channel 171 (watchdog) and observing that the ISR is executed.
1 parent 7b8c3f3 commit e94a962

22 files changed

Lines changed: 111 additions & 88 deletions

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‎Device/ARM/ARMCM0/Include/ARMCM0.h‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
* @file ARMCM0.h
33
* @brief CMSIS Core Peripheral Access Layer Header File for
44
* ARMCM0 Device
5-
* @version V5.3.1
6-
* @date 09. July 2018
5+
* @version V5.3.2
6+
* @date 01. May 2023
77
******************************************************************************/
88
/*
99
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -56,8 +56,9 @@ typedef enum IRQn
5656
Interrupt6_IRQn = 6,
5757
Interrupt7_IRQn = 7,
5858
Interrupt8_IRQn = 8,
59-
Interrupt9_IRQn = 9
60-
/* Interrupts 10 .. 31 are left out */
59+
Interrupt9_IRQn = 9,
60+
/* Interrupts 10 .. 30 are left out */
61+
Interrupt31_IRQn = 31
6162
} IRQn_Type;
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‎Device/ARM/ARMCM0plus/Include/ARMCM0plus.h‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
* @file ARMCM0plus.h
33
* @brief CMSIS Core Peripheral Access Layer Header File for
44
* ARMCM0plus Device
5-
* @version V5.3.1
6-
* @date 09. July 2018
5+
* @version V5.3.2
6+
* @date 01. May 2023
77
******************************************************************************/
88
/*
99
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -56,8 +56,9 @@ typedef enum IRQn
5656
Interrupt6_IRQn = 6,
5757
Interrupt7_IRQn = 7,
5858
Interrupt8_IRQn = 8,
59-
Interrupt9_IRQn = 9
60-
/* Interrupts 10 .. 31 are left out */
59+
Interrupt9_IRQn = 9,
60+
/* Interrupts 10 .. 30 are left out */
61+
Interrupt31_IRQn = 31
6162
} IRQn_Type;
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6364

‎Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
* @file ARMCM0plus_MPU.h
33
* @brief CMSIS Core Peripheral Access Layer Header File for
44
* ARMCM0plus Device (configured for CM0+ with MPU)
5-
* @version V5.3.1
6-
* @date 09. July 2018
5+
* @version V5.3.2
6+
* @date 01. May 2023
77
******************************************************************************/
88
/*
99
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -56,8 +56,9 @@ typedef enum IRQn
5656
Interrupt6_IRQn = 6,
5757
Interrupt7_IRQn = 7,
5858
Interrupt8_IRQn = 8,
59-
Interrupt9_IRQn = 9
60-
/* Interrupts 10 .. 31 are left out */
59+
Interrupt9_IRQn = 9,
60+
/* Interrupts 10 .. 30 are left out */
61+
Interrupt31_IRQn = 31
6162
} IRQn_Type;
6263

6364

‎Device/ARM/ARMCM1/Include/ARMCM1.h‎

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
* @file ARMCM1.h
33
* @brief CMSIS Core Peripheral Access Layer Header File for
44
* ARMCM1 Device
5-
* @version V5.3.1
6-
* @date 20. July 2018
5+
* @version V5.3.2
6+
* @date 01. May 2023
77
******************************************************************************/
88
/*
99
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -56,11 +56,13 @@ typedef enum IRQn
5656
Interrupt6_IRQn = 6,
5757
Interrupt7_IRQn = 7,
5858
Interrupt8_IRQn = 8,
59-
Interrupt9_IRQn = 9
60-
/* Interrupts 10 .. 31 are left out */
59+
Interrupt9_IRQn = 9,
60+
/* Interrupts 10 .. 30 are left out */
61+
Interrupt31_IRQn = 31
6162
} IRQn_Type;
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65+
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/* ================================================================================ */
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/* ================ Processor and Core Peripheral Section ================ */
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/* ================================================================================ */

‎Device/ARM/ARMCM23/Include/ARMCM23.h‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
* @file ARMCM23.h
33
* @brief CMSIS Core Peripheral Access Layer Header File for
44
* ARMCM23 Device
5-
* @version V5.3.1
6-
* @date 09. July 2018
5+
* @version V5.3.2
6+
* @date 01. May 2023
77
******************************************************************************/
88
/*
99
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -56,8 +56,9 @@ typedef enum IRQn
5656
Interrupt6_IRQn = 6,
5757
Interrupt7_IRQn = 7,
5858
Interrupt8_IRQn = 8,
59-
Interrupt9_IRQn = 9
60-
/* Interrupts 10 .. 224 are left out */
59+
Interrupt9_IRQn = 9,
60+
/* Interrupts 10 .. 223 are left out */
61+
Interrupt224_IRQn = 224
6162
} IRQn_Type;
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6364

‎Device/ARM/ARMCM23/Include/ARMCM23_TZ.h‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
* @file ARMCM23_TZ.h
33
* @brief CMSIS Core Peripheral Access Layer Header File for
44
* ARMCM23 Device (configured for TrustZone)
5-
* @version V5.3.1
6-
* @date 09. July 2018
5+
* @version V5.3.2
6+
* @date 01. May 2023
77
******************************************************************************/
88
/*
99
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -56,8 +56,9 @@ typedef enum IRQn
5656
Interrupt6_IRQn = 6,
5757
Interrupt7_IRQn = 7,
5858
Interrupt8_IRQn = 8,
59-
Interrupt9_IRQn = 9
60-
/* Interrupts 10 .. 224 are left out */
59+
Interrupt9_IRQn = 9,
60+
/* Interrupts 10 .. 223 are left out */
61+
Interrupt224_IRQn = 224
6162
} IRQn_Type;
6263

6364

‎Device/ARM/ARMCM3/Include/ARMCM3.h‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
* @file ARMCM3.h
33
* @brief CMSIS Core Peripheral Access Layer Header File for
44
* ARMCM3 Device
5-
* @version V5.3.1
6-
* @date 09. July 2018
5+
* @version V5.3.2
6+
* @date 01. May 2023
77
******************************************************************************/
88
/*
99
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -56,8 +56,9 @@ typedef enum IRQn
5656
Interrupt6_IRQn = 6,
5757
Interrupt7_IRQn = 7,
5858
Interrupt8_IRQn = 8,
59-
Interrupt9_IRQn = 9
60-
/* Interrupts 10 .. 224 are left out */
59+
Interrupt9_IRQn = 9,
60+
/* Interrupts 10 .. 223 are left out */
61+
Interrupt224_IRQn = 224
6162
} IRQn_Type;
6263

6364

‎Device/ARM/ARMCM33/Include/ARMCM33.h‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
* @file ARMCM33.h
33
* @brief CMSIS Core Peripheral Access Layer Header File for
44
* ARMCM33 Device (configured for ARMCM33 without FPU, without DSP extension, without TrustZone)
5-
* @version V5.3.1
6-
* @date 09. July 2018
5+
* @version V5.3.2
6+
* @date 01. May 2023
77
******************************************************************************/
88
/*
99
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -57,8 +57,9 @@ typedef enum IRQn
5757
Interrupt6_IRQn = 6,
5858
Interrupt7_IRQn = 7,
5959
Interrupt8_IRQn = 8,
60-
Interrupt9_IRQn = 9
61-
/* Interrupts 10 .. 480 are left out */
60+
Interrupt9_IRQn = 9,
61+
/* Interrupts 10 .. 479 are left out */
62+
Interrupt480_IRQn = 480
6263
} IRQn_Type;
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6465

‎Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
* @file ARMCM33_DSP_FP.h
33
* @brief CMSIS Core Peripheral Access Layer Header File for
44
* ARMCM33 Device (configured for ARMCM33 with FPU, with DSP extension)
5-
* @version V5.3.1
6-
* @date 09. July 2018
5+
* @version V5.3.2
6+
* @date 01. May 2023
77
******************************************************************************/
88
/*
99
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -57,8 +57,9 @@ typedef enum IRQn
5757
Interrupt6_IRQn = 6,
5858
Interrupt7_IRQn = 7,
5959
Interrupt8_IRQn = 8,
60-
Interrupt9_IRQn = 9
61-
/* Interrupts 10 .. 480 are left out */
60+
Interrupt9_IRQn = 9,
61+
/* Interrupts 10 .. 479 are left out */
62+
Interrupt480_IRQn = 480
6263
} IRQn_Type;
6364

6465

‎Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
* @file ARMCM33_DSP_FP_TZ.h
33
* @brief CMSIS Core Peripheral Access Layer Header File for
44
* ARMCM33 Device (configured for ARMCM33 with FPU, with DSP extension, with TrustZone)
5-
* @version V5.3.1
6-
* @date 09. July 2018
5+
* @version V5.3.2
6+
* @date 01. May 2023
77
******************************************************************************/
88
/*
99
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -57,8 +57,9 @@ typedef enum IRQn
5757
Interrupt6_IRQn = 6,
5858
Interrupt7_IRQn = 7,
5959
Interrupt8_IRQn = 8,
60-
Interrupt9_IRQn = 9
61-
/* Interrupts 10 .. 480 are left out */
60+
Interrupt9_IRQn = 9,
61+
/* Interrupts 10 .. 479 are left out */
62+
Interrupt480_IRQn = 480
6263
} IRQn_Type;
6364

6465

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