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Doc: Added info about backward incompatibilities in CMSIS-Core
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CMSIS/Documentation/Doxygen/Core/src/history.md

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@@ -14,7 +14,8 @@ The table below provides information about the changes delivered with specific v
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<ul>
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<li>Core(M) and Core(A) joined into single Core component</li>
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<li>Core header files reworked, aligned with TRMs</li>
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<li>Core header files reworked, aligned with Cortex-M Technical Reference Manuals (TRMs).
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<br/>See \ref core6_changes "Breaking changes in CMSIS-Core v6 header files" for details, and [GitHub issue #122](https://github.com/ARM-software/CMSIS_6/issues/122).</li>
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<li>Previously deprecated features removed</li>
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<li>Dropped support for Arm Compiler 5</li>
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\anchor core6_changes
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<h1>Breaking changes in CMSIS-Core v6 header files</h1>
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\ref cmsis_standard_files in CMSIS-Core v6.0.0 have received a number of changes that are incompatible with CMSIS-Core v5.6.0.
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In summary, following types of incompatible changes are present:
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- struct member is renamed in an existing structure (e.g. NVIC->PR -> NVIC->IPR)
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- struct name is changed (e.g. CoreDebug_Type -> DCB_Type)
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- define name is changed (e.g. CoreDebug_DEMCR_TRCENA_Msk -> DCB_DEMCR_TRCENA_Msk)
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[GitHub issue #122](https://github.com/ARM-software/CMSIS_6/issues/122) discusses how to resolve such incompatibilities.
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Below is detailed information about the changes relevant for each Cortex-M core.
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**Cortex-M0, Cortex-M0+, Cortex-M1:**
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- struct NVIC_Type
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- member IP renamed to IPR
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- struct SCB_Type
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- member SHP renamed to SHPR
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**Cortex-M3, Cortex-M4:**
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- struct NVIC_Type
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- member IP renamed to IPR
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- struct SCB_Type
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- member SHP renamed to SHPR
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- member PFR renamed to ID_PFR
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- member PFR renamed to ID_PFR
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- member DFR renamed to ID_PFR
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- member ADR renamed to ID_AFR
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- member MMFR renamed to ID_MMFR
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- member ISAR renamed to ID_ISAR
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- member STIR added
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- struct ITM_Type:
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- members PIDx and CIDx removed
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- define names for ITM_TCR_* changed
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- define names for ITM_LSR_* changed
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- struct TPI_Type renamed to TPIU_Type
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- define names for TPI_* renamed to TPIU_*
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- define names for FPU_MVFR0/1_* changed (Cortex-M4)
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- struct CoreDebug_Type renamed to DCB_Type
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- defines for CoreDebug_* renamed to DCB_*
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**Cortex-M7:**
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- struct NVIC_Type
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- member IP renamed to IPR
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- struct SCB_Type
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- member ID_MFR renamed to ID_MMFR
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- struct ITM_Type:
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- members PIDx and CIDx removed
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- define names for ITM_TCR_* changed
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- define names for ITM_LSR_* changed
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- struct TPI_Type renamed to TPIU_Type
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- define names for TPI_* renamed to TPIU_*
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- define names for FPU_MVFR0/1_* changed
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- struct CoreDebug_Type renamed to DCB_Type
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- defines for CoreDebug_* renamed to DCB_*
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**Cortex-M23:**
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- struct DWT_Type
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- member RESERVED0[6] replaced by CYCCNT, CPICNT, EXCCNT, SLEEPCNT, LSUCNT, FOLDCNT
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- other RESERVED members mainly removed
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- struct TPI_Type renamed to TPIU_Type
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- define names for TPI_* renamed to TPIU_*
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- struct CoreDebug_Type removed (struct DCB_Type already existed)
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- defines CoreDebug_ removed (defines DCB_ already existed)
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**Cortex-M33:**
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- struct ITM_Type:
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- members LAR, LSR removed
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- members PIDx and CIDx removed
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- struct TPI_Type renamed to TPIU_Type
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- define names for TPI_* renamed to TPIU_*
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- define names for FPU_MVFR0/1_* changed
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- struct CoreDebug_Type removed (struct DCB_Type already existed)
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- defines CoreDebug_ removed (defines DCB_ already existed)
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**Cortex-M55, Cortex-M85:**
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- struct ITM_Type:
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- members LAR, LSR removed
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- members PIDx and CIDx removed
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- struct DWT_Type:
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- members PIDx and CIDx removed
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- struct EWIC_Type
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- all members renamed
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- define names EWIC_* changed
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- struct TPI_Type renamed to TPIU_Type
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- members LAR, LSR replaced
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- define names for TPI_* renamed to TPIU_*
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- struct PMU_Type
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- members PIDx and CIDx removed
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- struct CoreDebug_Type removed (struct DCB_Type already existed)
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- defines CoreDebug_ removed (defines DCB_ already existed)
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- struct DIB_Type
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- members DLAR, DLSR removed (replaced by RESERVED0[2])
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- defines for DIB_DLAR_* and DIB_DLSR_* removed

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