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GuentherMartinJonatanAntoni
GuentherMartin
authored and
JonatanAntoni
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Core(M): fix __get_PSPLIM function, simplify define checks
1 parent 25314ca commit eb1d42a

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Lines changed: 29 additions & 25 deletions

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‎CMSIS/Core/Include/cmsis_clang.h‎

Lines changed: 29 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
/**************************************************************************//**
22
* @file cmsis_clang.h
33
* @brief CMSIS compiler LLVM/Clang header file
4-
* @version V1.0.0
5-
* @date 28. June 2023
4+
* @version V1.0.1
5+
* @date 21. July 2023
66
******************************************************************************/
77
/*
88
* Copyright (c) 2009-2023 Arm Limited. All rights reserved.
@@ -131,7 +131,7 @@
131131
#define __VECTOR_TABLE_ATTRIBUTE __attribute__((used, section(".vectors")))
132132
#endif
133133

134-
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
134+
#if (__ARM_FEATURE_CMSE == 3)
135135
#ifndef __STACK_SEAL
136136
#define __STACK_SEAL __stack_seal
137137
#endif
@@ -779,7 +779,7 @@ __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
779779
}
780780

781781

782-
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
782+
#if (__ARM_FEATURE_CMSE == 3)
783783
/**
784784
\brief Get Control Register (non-secure)
785785
\details Returns the content of the non-secure Control Register when in secure mode.
@@ -807,7 +807,7 @@ __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
807807
}
808808

809809

810-
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
810+
#if (__ARM_FEATURE_CMSE == 3)
811811
/**
812812
\brief Set Control Register (non-secure)
813813
\details Writes the given value to the non-secure Control Register when in secure state.
@@ -877,7 +877,7 @@ __STATIC_FORCEINLINE uint32_t __get_PSP(void)
877877
}
878878

879879

880-
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
880+
#if (__ARM_FEATURE_CMSE == 3)
881881
/**
882882
\brief Get Process Stack Pointer (non-secure)
883883
\details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
@@ -904,7 +904,7 @@ __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
904904
}
905905

906906

907-
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
907+
#if (__ARM_FEATURE_CMSE == 3)
908908
/**
909909
\brief Set Process Stack Pointer (non-secure)
910910
\details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
@@ -931,7 +931,7 @@ __STATIC_FORCEINLINE uint32_t __get_MSP(void)
931931
}
932932

933933

934-
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
934+
#if (__ARM_FEATURE_CMSE == 3)
935935
/**
936936
\brief Get Main Stack Pointer (non-secure)
937937
\details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
@@ -958,7 +958,7 @@ __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
958958
}
959959

960960

961-
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
961+
#if (__ARM_FEATURE_CMSE == 3)
962962
/**
963963
\brief Set Main Stack Pointer (non-secure)
964964
\details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
@@ -971,7 +971,7 @@ __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
971971
#endif
972972

973973

974-
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
974+
#if (__ARM_FEATURE_CMSE == 3)
975975
/**
976976
\brief Get Stack Pointer (non-secure)
977977
\details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
@@ -1012,7 +1012,7 @@ __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
10121012
}
10131013

10141014

1015-
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1015+
#if (__ARM_FEATURE_CMSE == 3)
10161016
/**
10171017
\brief Get Priority Mask (non-secure)
10181018
\details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
@@ -1039,7 +1039,7 @@ __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
10391039
}
10401040

10411041

1042-
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1042+
#if (__ARM_FEATURE_CMSE == 3)
10431043
/**
10441044
\brief Set Priority Mask (non-secure)
10451045
\details Assigns the given value to the non-secure Priority Mask Register when in secure state.
@@ -1089,7 +1089,7 @@ __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
10891089
}
10901090

10911091

1092-
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1092+
#if (__ARM_FEATURE_CMSE == 3)
10931093
/**
10941094
\brief Get Base Priority (non-secure)
10951095
\details Returns the current value of the non-secure Base Priority register when in secure state.
@@ -1116,7 +1116,7 @@ __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
11161116
}
11171117

11181118

1119-
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1119+
#if (__ARM_FEATURE_CMSE == 3)
11201120
/**
11211121
\brief Set Base Priority (non-secure)
11221122
\details Assigns the given value to the non-secure Base Priority register when in secure state.
@@ -1155,7 +1155,7 @@ __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
11551155
}
11561156

11571157

1158-
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1158+
#if (__ARM_FEATURE_CMSE == 3)
11591159
/**
11601160
\brief Get Fault Mask (non-secure)
11611161
\details Returns the current value of the non-secure Fault Mask register when in secure state.
@@ -1182,7 +1182,7 @@ __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
11821182
}
11831183

11841184

1185-
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1185+
#if (__ARM_FEATURE_CMSE == 3)
11861186
/**
11871187
\brief Set Fault Mask (non-secure)
11881188
\details Assigns the given value to the non-secure Fault Mask register when in secure state.
@@ -1210,7 +1210,8 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
12101210
*/
12111211
__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
12121212
{
1213-
#if (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))
1213+
#if ((__ARM_ARCH_ISA_THUMB < 2) && \
1214+
(__ARM_FEATURE_CMSE < 3) )
12141215
// without main extensions, the non-secure PSPLIM is RAZ/WI
12151216
return 0U;
12161217
#else
@@ -1220,7 +1221,7 @@ __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
12201221
#endif
12211222
}
12221223

1223-
#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
1224+
#if (__ARM_FEATURE_CMSE == 3)
12241225
/**
12251226
\brief Get Process Stack Pointer Limit (non-secure)
12261227
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -1254,7 +1255,8 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
12541255
*/
12551256
__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
12561257
{
1257-
#if (__ARM_ARCH_ISA_THUMB < 2) && (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))
1258+
#if ((__ARM_ARCH_ISA_THUMB < 2) && \
1259+
(__ARM_FEATURE_CMSE < 3) )
12581260
// without main extensions, the non-secure PSPLIM is RAZ/WI
12591261
(void)ProcStackPtrLimit;
12601262
#else
@@ -1263,7 +1265,7 @@ __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
12631265
}
12641266

12651267

1266-
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1268+
#if (__ARM_FEATURE_CMSE == 3)
12671269
/**
12681270
\brief Set Process Stack Pointer (non-secure)
12691271
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -1295,7 +1297,8 @@ __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
12951297
*/
12961298
__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
12971299
{
1298-
#if (__ARM_ARCH_ISA_THUMB < 2) && (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))
1300+
#if ((__ARM_ARCH_ISA_THUMB < 2) && \
1301+
(__ARM_FEATURE_CMSE < 3) )
12991302
// without main extensions, the non-secure MSPLIM is RAZ/WI
13001303
return 0U;
13011304
#else
@@ -1306,7 +1309,7 @@ __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
13061309
}
13071310

13081311

1309-
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1312+
#if (__ARM_FEATURE_CMSE == 3)
13101313
/**
13111314
\brief Get Main Stack Pointer Limit (non-secure)
13121315
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -1340,7 +1343,8 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
13401343
*/
13411344
__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
13421345
{
1343-
#if (__ARM_ARCH_ISA_THUMB < 2) && (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))
1346+
#if ((__ARM_ARCH_ISA_THUMB < 2) && \
1347+
(__ARM_FEATURE_CMSE < 3) )
13441348
// without main extensions, the non-secure MSPLIM is RAZ/WI
13451349
(void)MainStackPtrLimit;
13461350
#else
@@ -1349,7 +1353,7 @@ __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
13491353
}
13501354

13511355

1352-
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
1356+
#if (__ARM_FEATURE_CMSE == 3)
13531357
/**
13541358
\brief Set Main Stack Pointer Limit (non-secure)
13551359
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -1413,7 +1417,7 @@ __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
14131417
@{
14141418
*/
14151419

1416-
#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
1420+
#if (__ARM_FEATURE_DSP == 1)
14171421

14181422
#define __SADD8 __sadd8
14191423
#define __QADD8 __qadd8

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