5757 !defined (__QNX__) && (defined (__arm__) || defined (__aarch64__))
5858#include < asm/hwcap.h> /* Get HWCAP bits from asm/hwcap.h */
5959#include < sys/auxv.h>
60- #elif (defined(__OpenBSD__) || defined(__FreeBSD__) || defined(__APPLE__)) && defined(__aarch64__)
60+ #elif (defined(__APPLE__)) && \
61+ defined ( \
62+ __aarch64__) /* #if !defined(BARE_METAL) && !defined(__APPLE__) && !defined(__OpenBSD__) && !defined(__FreeBSD__) && \
63+ !defined(__QNX__) && (defined(__arm__) || defined(__aarch64__)) */
6164#include < sys/sysctl.h>
6265#include < sys/types.h>
63- #endif /* defined(__APPLE__) && defined(__aarch64__)) */
64- #endif /* !defined(BARE_METAL) && !defined(__APPLE__) && !defined(__OpenBSD__) && !defined(__FreeBSD__) && !defined(__QNX__) && (defined(__arm__) || defined(__aarch64__)) */
66+ #elif (defined(__OpenBSD__) || defined(__FreeBSD__)) && \
67+ defined (__aarch64__) /* #elif (defined(__APPLE__)) && defined(__aarch64__) */
68+ #include < sys/auxv.h>
69+ #include < sys/sysctl.h>
70+ #include < sys/types.h>
71+ #include < unistd.h>
72+ #endif /* #elif (defined(OpenBSD) || defined(FreeBSD)) && defined(aarch64) */
73+ #endif /* !defined(_WIN64) */
6574
6675#define ARM_COMPUTE_CPU_FEATURE_HWCAP_CPUID (1 << 11 )
6776#define ARM_COMPUTE_GET_FEATURE_REG (var, freg ) __asm __volatile (" MRS %0, " #freg : " =r" (var))
@@ -395,7 +404,11 @@ CpuInfo CpuInfo::build()
395404
396405 CpuInfo info (isa, cpus_model);
397406 return info;
398- #elif defined(__OpenBSD__) || defined(__FreeBSD__)
407+ #elif defined(__arm__) && \
408+ (defined (__OpenBSD__) || \
409+ defined ( \
410+ __FreeBSD__)) /* if !defined(_WIN64) && !defined(BARE_METAL) && !defined(__APPLE__) && !defined(__OpenBSD__) &&
411+ !defined(__FreeBSD__) && !defined(__QNX__) && (defined(__arm__) || defined(__aarch64__)) */
399412 int mib[2 ] = {0 , 0 };
400413 int ncpu = {1 };
401414 size_t len = sizeof (ncpu);
@@ -412,8 +425,7 @@ CpuInfo CpuInfo::build()
412425 CpuInfo info (isainfo, cpus_model);
413426 return info;
414427#elif (BARE_METAL) && \
415- defined ( \
416- __aarch64__) /* !defined(BARE_METAL) && !defined(__APPLE__) && !defined(__OpenBSD__) && !defined(__QNX__) && (defined(__arm__) || defined(__aarch64__)) */
428+ defined (__aarch64__) /* #elif defined(__arm__) && (defined(__OpenBSD__) || defined(__FreeBSD__)) */
417429
418430 // Assume single CPU in bare metal mode. Just read the ID register and feature bits directly.
419431 uint64_t isar0 = 0 , isar1 = 0 , pfr0 = 0 , pfr1 = 0 , svefr0 = 0 , smefr0 = 0 , midr = 0 ;
@@ -435,8 +447,33 @@ CpuInfo CpuInfo::build()
435447 std::vector<CpuModel> cpus_model (1 , midr_to_model (midr));
436448 CpuInfo info (isa, cpus_model);
437449 return info;
438- #elif defined(__aarch64__) && (defined(__OpenBSD__) || defined(__FreeBSD__) || \
439- defined (__APPLE__)) /* #elif(BARE_METAL) && defined(__aarch64__) */
450+
451+ #elif defined(__aarch64__) && (defined(__OpenBSD__) || defined(__FreeBSD__))
452+ int ncpus = sysconf (_SC_NPROCESSORS_ONLN);
453+
454+ unsigned long hwcap = 0 , hwcap2 = 0 ;
455+ elf_aux_info (AT_HWCAP, &hwcap, sizeof (hwcap));
456+ elf_aux_info (AT_HWCAP2, &hwcap2, sizeof (hwcap2));
457+
458+ CpuIsaInfo isainfo;
459+ std::vector<CpuModel> cpus_model (ncpus);
460+
461+ isainfo.neon = (hwcap & HWCAP_ASIMD) != 0 ;
462+ isainfo.fp16 = (hwcap & HWCAP_FPHP) != 0 ;
463+ isainfo.dot = (hwcap & HWCAP_ASIMDDP) != 0 ;
464+ isainfo.bf16 = (hwcap2 & HWCAP2_BF16) != 0 ;
465+ isainfo.i8mm = (hwcap2 & HWCAP2_I8MM) != 0 ;
466+ isainfo.sme = (hwcap2 & HWCAP2_SME) != 0 ;
467+ isainfo.sme2 = (hwcap2 & HWCAP2_SME2) != 0 ;
468+ isainfo.sme_f32f32 = (hwcap2 & HWCAP2_SME_F32F32) != 0 ;
469+ isainfo.sme_i8i32 = (hwcap2 & HWCAP2_SME_I8I32) != 0 ;
470+ isainfo.sme_f16f32 = (hwcap2 & HWCAP2_SME_F16F32) != 0 ;
471+ isainfo.sme_b16f32 = (hwcap2 & HWCAP2_SME_B16F32) != 0 ;
472+ CpuInfo info (isainfo, cpus_model);
473+ return info;
474+
475+ #elif defined(__aarch64__) && \
476+ defined (__APPLE__) /* #elif defined(__aarch64__) && (defined(__OpenBSD__) || defined(__FreeBSD__)) */
440477 int ncpus = get_hw_capability (" hw.perflevel0.logicalcpu" );
441478 CpuIsaInfo isainfo;
442479 std::vector<CpuModel> cpus_model (ncpus);
@@ -453,7 +490,7 @@ CpuInfo CpuInfo::build()
453490 isainfo.sme2 = get_hw_capability (" hw.optional.arm.FEAT_SME2" );
454491 CpuInfo info (isainfo, cpus_model);
455492 return info;
456- #elif defined(__aarch64__) && defined(_WIN64) /* #elif defined(__aarch64__) && defined(__APPLE__) */
493+ #elif defined(__aarch64__) && defined(_WIN64) /* #elif defined(__aarch64__) && defined(__APPLE__) */
457494 CpuIsaInfo isainfo;
458495
459496 isainfo.neon = IsProcessorFeaturePresent (PF_ARM_NEON_INSTRUCTIONS_AVAILABLE);
@@ -485,7 +522,7 @@ CpuInfo CpuInfo::build()
485522 std::vector<CpuModel> cpus_model (ncpus);
486523 CpuInfo info (isainfo, cpus_model);
487524 return info;
488- #else /* #elif defined(__aarch64__) && defined(_WIN64) */
525+ #else /* #elif defined(__aarch64__) && defined(_WIN64) */
489526 CpuInfo info (CpuIsaInfo (), {CpuModel::GENERIC});
490527 return info;
491528#endif /* !defined(BARE_METAL) && !defined(__APPLE__) && !defined(__OpenBSD__) && (defined(__arm__) || defined(__aarch64__)) */
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