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@@ -114,7 +114,7 @@ about Arm’s trademarks.
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## Copyright
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* Copyright 2011-2024 Arm Limited and/or its affiliates <open-source-office@arm.com>.
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* Copyright 2011-2026 Arm Limited and/or its affiliates <open-source-office@arm.com>.
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* Copyright 2022 Google LLC.
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## About this document
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* Removed all references to Transactional Memory Extension (TME).
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* Added [**Alpha**](#current-status-and-anticipated-changes) support
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for Brain 16-bit floating-point vector multiplication intrinsics.
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* Redesigned atomic store with hints intrinsics.
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* Added [**Alpha**](#current-status-and-anticipated-changes)
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support for SVE2.3 (FEAT_SVE2p3), SME2.3 (FEAT_SME2p3), FEAT_F16F32DOT
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dot product intrinsics.
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`value.val[0]` with the contents of the `ACCDATA_EL1` system register.
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The returned value is the same as for `__arm_st64bv`.
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## Atomic store with PCDPHINT intrinsics
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## Atomic store with hints intrinsics
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This intrinsic provides an atomic store, which will
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make use of the `STSHH` hint instruction immediately followed by the
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associated store instruction. This intrinsic is type generic and
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supports scalar types from 8-64 bits and is available when
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`__ARM_FEATURE_PCDPHINT` is defined.
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This intrinsic provides an atomic store together with a hint value.
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The hint is a suggestion to the compiler and maps directly to a
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specific hint instruction variant in the ISA. The compiler may use this hint
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when selecting code sequences, but it is not required to emit a specific
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hint instruction or a specific instruction sequence. This intrinsic is
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type generic and supports scalar integral and floating-point types of 8, 16, 32, and 64 bits.
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To access this intrinsic, `<arm_acle.h>` should be included.
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``` c
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void __arm_atomic_store_with_stshh(type *ptr,
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type data,
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int memory_order,
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int ret); /* Retention Policy */
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void __arm_atomic_store_with_hint(type *ptr,
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type data,
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int memory_order,
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int hint);
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```
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The first argument in this intrinsic is a pointer `ptr` which is the location to store to.
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The second argument `data` is the data which is to be stored.
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The third argument `mem` can be one of 3 memory ordering variables supported by atomic_store:
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__ATOMIC_RELAXED, __ATOMIC_SEQ_CST, and __ATOMIC_RELEASE.
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The fourth argument can contain the following values:
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The first argument `ptr` is the location to store to. The second
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argument `data` is the value to be stored. The third argument
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`memory_order` can be one of the memory ordering values supported by
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`atomic_store`: `__ATOMIC_RELAXED`, `__ATOMIC_SEQ_CST`, and
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`__ATOMIC_RELEASE`.
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| **Retention Policy** | **Value** | **Summary** |
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| -------------------- | --------- | --------------------------------------------------------------------------------- |
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| KEEP | 0 | Signals to retain the updated location in the local cache of the updating PE. |
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| STRM | 1 | Signals to not retain the updated location in the local cache of the updating PE. |
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The fourth argument `hint` selects the requested hint. The set of valid
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hint values depends on the architectural features supported by the
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target. The following hint values are defined:
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| **Hint** | **Value** | **Feature** | **Summary** |
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| ---------------- | --------- | -------------------------- | --------------------------------------------------------------------------------- |
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| HINT_STSHH_KEEP | 0 | `__ARM_FEATURE_PCDPHINT` | Requests retention of the updated location in the local cache of the updating PE. |
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| HINT_STSHH_STRM | 1 | `__ARM_FEATURE_PCDPHINT` | Requests that the updated location not be retained in the local cache of the updating PE. |
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# Custom Datapath Extension
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