The BSA ACS test checklist is based on BSA 1.2 specification and BSA ACS 1.2.1 tag.
The checklist provides information about:
- The BSA level at which each test runs.
- The BSA rules covered by each test.
- The BSA rules that are not currently covered by ACS.
- The runtime environment (UEFI, BareMetal, or Linux) in which each test executes.
- In a UEFI or Linux based test is not part of the SystemReady images, it is highlighted with
#. - Tests which are dependent on platform information which cannot be auto-determined and needs manual effort to provide information in PAL API's are marked with
&
Latest checklist changes summarizing the latest checklist changes relative to the latest released tag, is present at end of document.
| Level | Specification Checklist Rule | Sub Rule | Test ID | Test Description | UEFI | BM | Linux | Additonal Information |
|---|---|---|---|---|---|---|---|---|
| L1 | B_PE_01 | B_PE_01 | 1 | Check Arch symmetry across PE | Yes | Yes | No | |
| L1 | B_PE_02 | B_PE_02 | 2 | Check for number of PE | Yes | Yes | No | |
| L1 | B_PE_03 | B_PE_03 | 3 | Check for AdvSIMD and FP support | Yes | Yes | No | |
| L1 | B_PE_04 | B_PE_04 | 4 | Check PE 4KB Granule Support | Yes | Yes | No | |
| L1 | B_PE_05 | B_PE_05 | Not covered | |||||
| L1 | B_PE_06 | B_PE_06 | 6 | Check Cryptographic extensions | Yes | Yes | No | |
| L1 | B_PE_07 | B_PE_07 | 7 | Check Little Endian support | Yes | Yes | No | |
| L1 | B_PE_08 | B_PE_08 | 8 | Check EL1 and EL0 implementation | Yes | Yes | No | |
| L1 | B_PE_09 | B_PE_09 | 9 | Check for PMU and PMU counters | Yes | Yes | No | |
| L1 | B_PE_10 | B_PE_10 | 10 | Check PMU Overflow signal | Yes | Yes | No | |
| L1 | B_PE_11 | B_PE_11 | 11 | Check num of Breakpoints and type | Yes | Yes | No | |
| L1 | B_PE_12 | B_PE_12 | 12 | Check Synchronous Watchpoints | Yes | Yes | No | |
| L1 | B_PE_13 | B_PE_13 | 13 | Check CRC32 instruction support | Yes | Yes | No | |
| L1 | B_PE_14 | B_PE_14 | 16 | Check SVE2 for v9 PE | Yes | Yes | No | |
| L1 | B_PE_18 | B_PE_18 | 17 | Check EL2 implementation | Yes | Yes | No | |
| L1 | B_PE_19 | B_PE_19 | 18 | Check Stage 2 4KB Granule Support | Yes | Yes | No | |
| L1 | B_PE_20 | B_PE_20 | 19 | Check Stage2 and Stage1 Granule match | Yes | Yes | No | |
| L1 | B_PE_21 | B_PE_21 | 20 | Check for PMU counters | Yes | Yes | No | |
| L1 | B_PE_22 | B_PE_22 | 21 | Check VMID breakpoint number | Yes | Yes | No | |
| L1 | B_PE_23 | B_PE_23 | 22 | Check for EL3 AArch64 support | Yes | Yes | No | |
| L1 | B_PE_24 | B_PE_24 | 63 | Check for Secure state implementation | Yes | Yes | No | |
| L1 | B_MEM_01 | B_MEM_01 | 102 | Mem Access Response in finite time | Yes | Yes | No | |
| L1 | B_MEM_02 | B_MEM_02 | 101 | Memory Access to Un-Populated addr | No | Yes | No | |
| L1 | B_MEM_03 | B_MEM_03 | 104 | Check Addressability | No | Yes | Yes | |
| L1 | B_MEM_05 | B_MEM_05 | 103 | PE must access all NS addr space | Yes | Yes | No | |
| L1 | B_MEM_06 | B_MEM_06 | 107 | Check Addressability for non-DMA dev | No | Yes | Yes | |
| L1 | B_MEM_07 | B_MEM_07 | Not Covered | |||||
| L1 | B_MEM_08 | B_MEM_08 | Not Covered | |||||
| L1 | B_MEM_09 | B_MEM_09 | Not Covered | |||||
| L1 | B_GIC_01 | B_GIC_01 | 201 | Check GIC version | Yes | Yes | No | |
| L1 | B_GIC_02 | B_GIC_02 | 202 | Check GICv2 Valid Configuration | Yes | Yes | No | |
| L1 | B_GIC_03 | B_GIC_03 | 203 | If PCIe, GICv3 then ITS, LPI | Yes | Yes | No | |
| L1 | B_GIC_04 | B_GIC_04 | 204 | Check GICv3 Security States | Yes | Yes | No | |
| L1 | B_GIC_05 | B_GIC_05 | 205 | Non-secure SGIs are implemented | Yes | Yes | No | |
| L1 | B_PPI_00 | B_PPI_01 | 206 | Check EL1-Phy timer PPI assignment | Yes | Yes | No | |
| 207 | Check EL1-Virt timer PPI assignment | Yes | Yes | No | ||||
| B_PPI_02 | 209 | Check NS EL2-Virt timer PPI Assignment | Yes | Yes | No | |||
| 210 | Check NS EL2-Phy timer PPI Assignment | Yes | Yes | No | ||||
| 211 | Check GIC Maintenance PPI Assignment | Yes | Yes | No | ||||
| B_PPI_03 | Not Covered | |||||||
| L1 | B_GIC_02 | Appendix I.5 | 229 | Check GICv2m SPI allocated to MSI Ctrl | Yes | Yes | No | |
| Appendix I.6 | 226 | Check MSI SPI are Edge Triggered | Yes | Yes | No | |||
| Appendix I.6 | 228 | Check GICv2m MSI to SPI Generation | Yes | Yes | No | |||
| Appendix I.9 | 227 | Check GICv2m MSI Frame Register | Yes | Yes | No | |||
| L1 | B_SMMU_01 | B_SMMU_01 | 301 | All SMMUs have same Arch Revision | Yes | Yes | No | |
| L1 | B_SMMU_02 | B_SMMU_02 | 302 | Check SMMU Granule Support | Yes | Yes | No | |
| L1 | B_SMMU_06 | B_SMMU_06 | 303 | Check SMMU Large Physical Addr Support | Yes | Yes | No | |
| L1 | B_SMMU_07 | B_SMMU_07 | Not Covered | |||||
| L1 | B_SMMU_08 | B_SMMU_08 | 304 | Check SMMU S-EL2 & stage1 support | Yes | Yes | No | |
| L1 | B_SMMU_12 | B_SMMU_12 | Not Covered | |||||
| L1 | B_SMMU_16 | B_SMMU_16 | 305 | Check SMMUs stage2 support | Yes | Yes | No | |
| L1 | B_SMMU_17 | B_SMMU_17 | Not Covered | |||||
| L1 | B_SMMU_18 | B_SMMU_18 | 329 | Check SMMU S-EL2 & stage2 support | Yes | Yes | No | |
| L1 | B_SMMU_19 | B_SMMU_19 | 306 | SMMUv2 unique intr per ctxt bank | Yes | Yes | No | |
| L1 | B_SMMU_21 | B_SMMU_21 | 307 | SMMUv3 Integration compliance | Yes | Yes | No | |
| L1 | B_TIME_01 | B_TIME_01 | 401 | Check for Generic System Counter | Yes | Yes | No | |
| L1 | B_TIME_02 | B_TIME_02 | Not Covered | |||||
| L1 | B_TIME_03 | B_TIME_03 | Not Covered | |||||
| L1 | B_TIME_04 | B_TIME_04 | Not Covered | |||||
| L1 | B_TIME_05 | B_TIME_05 | Not Covered | |||||
| L1 | B_TIME_06 | B_TIME_06 | 402 | SYS Timer if PE Timer not ON | Yes | Yes | No | |
| L1 | B_TIME_07 | B_TIME_07 | 403 | Memory mapped timer check | Yes | Yes | No | |
| L1 | B_TIME_08 | B_TIME_08 | 404 | Generate Mem Mapped SYS Timer Intr | Yes | Yes | No | |
| L1 | B_TIME_09 | B_TIME_09 | 405 | Restore PE timer on PE wake up | Yes | Yes | No | |
| L1 | B_TIME_10 | B_TIME_10 | Not Covered | |||||
| L1 | B_WAK_01 | B_WAK_01 | Not Covered | |||||
| L1 | B_WAK_02 | B_WAK_02 | Not Covered | |||||
| L1 | B_WAK_03 | B_WAK_03 | 501 | Wake from EL1 PHY Timer Int | Yes | Yes | No | |
| 502 | Wake from EL1 VIR Timer Int | Yes | Yes | No | ||||
| 503 | Wake from EL2 PHY Timer Int | Yes | Yes | No | ||||
| 504 | Wake from Watchdog WS0 Int | Yes | Yes | No | ||||
| 505 | Wake from System Timer Int | Yes | Yes | No | ||||
| L1 | B_WAK_04 | B_WAK_04 | Not Covered | |||||
| L1 | B_WAK_05 | B_WAK_05 | Not Covered | |||||
| L1 | B_WAK_06 | B_WAK_06 | Not Covered | |||||
| L1 | B_WAK_07 | B_WAK_07 | 501 | Wake from EL1 PHY Timer Int | Yes | Yes | No | |
| 502 | Wake from EL1 VIR Timer Int | Yes | Yes | No | ||||
| 503 | Wake from EL2 PHY Timer Int | Yes | Yes | No | ||||
| 504 | Wake from Watchdog WS0 Int | Yes | Yes | No | ||||
| 505 | Wake from System Timer Int | Yes | Yes | No | ||||
| L1 | B_WAK_08 | B_WAK_08 | Not Covered | |||||
| L1 | B_WAK_10 | B_WAK_10 | Not Covered | |||||
| L1 | B_WAK_11 | B_WAK_11 | Not Covered | |||||
| L1 | B_WD_00 | B_WD_01 | 701 | Non Secure Watchdog Access | Yes | Yes | No | |
| B_WD_02 | 701 | Non Secure Watchdog Access | Yes | Yes | No | |||
| B_WD_03 | 702 | Check Watchdog WS0 interrupt | Yes | Yes | No | |||
| B_WD_04 | Not Covered | |||||||
| B_WD_05 | Not Covered | |||||||
| L1 | B_PER_01 | B_PER_01 | 601 | USB CTRL Interface EHCI check | Yes | Yes | No | |
| L1 | B_PER_02 | B_PER_02 | 608 | USB CTRL Interface XHCI check | Yes | Yes | No | |
| L1 | B_PER_03 | B_PER_03 | 602 | Check SATA CTRL Interface | Yes | Yes | No | |
| L1 | B_PER_04 | B_PER_04 | Not Covered | |||||
| L1 | B_PER_05 | B_PER_05 | 603 | Check UART type Arm Generic or 16550 | Yes | Yes | No | |
| L1 | B_PER_06 | B_PER_06 | 606 | Check Arm GENERIC UART Interrupt | Yes | Yes | No | |
| L1 | B_PER_07 | B_PER_07 | Rule is covered as part of B_PER_06 test | A direct test will be added in future | ||||
| L1 | B_PER_08 | PCI_IN_01 | 801 | Check ECAM Presence | Yes | Yes | No | |
| PCI_IN_02 | 802 | Check ECAM Memory accessibility | Yes | Yes | No | |||
| PCI_IN_03 | 838 | Check all RP in HB is in same ECAM | Yes | Yes | No | |||
| PCI_IN_04 | 803 | All EP/Sw under RP in same ECAM Region | Yes | Yes | No | |||
| PCI_IN_05 | 820 | Type 0/1 common config rule | Yes | Yes | No | |||
| 822 | Check Type 1 config header rules | Yes | Yes | No | ||||
| 824 | Device capabilities reg rule | Yes | Yes | No | ||||
| 825 | Device Control register rule | Yes | Yes | No | ||||
| 826 | Device cap 2 register rules | Yes | Yes | No | ||||
| 1517 | Check BME functionality of RP | Yes | Yes | No | Exerciser VIP required | |||
| 833 | Check Max payload size supported | Yes | Yes | No | ||||
| PCI_IN_06 | Not Covered | |||||||
| PCI_IN_07 | Not Covered | |||||||
| PCI_IN_08 | Not Covered | |||||||
| PCI_IN_09 | Not Covered | |||||||
| PCI_IN_10 | Not Covered | |||||||
| PCI_IN_11 | 1510 | Check RP Sec Bus transaction are TYPE0 | Yes | Yes | No | Exerciser VIP required | ||
| PCI_IN_12 | 837 | Check Config Txn for RP in HB | Yes | Yes | No | |||
| PCI_IN_13 | 804 | Check RootPort NP Memory Access | No | Yes | No | |||
| 805 | Check RootPort P Memory Access | No | Yes | No | ||||
| PCI_IN_14 | Not Covered | |||||||
| PCI_IN_15 | Not Covered | |||||||
| PCI_IN_16 | 808 | Check all 1's for out of range | Yes | Yes | No | |||
| PCI_IN_17 | 1515 | Check ARI forwarding enable rule | Yes | Yes | No | Exerciser VIP required | ||
| 836 | Check ARI forwarding enable rule | Yes | Yes | No | ||||
| PCI_IN_18 | 811 | Check RP Byte Enable Rules | Yes | Yes | No | |||
| PCI_IN_19 | 830 | Check Cmd Reg memory space enable | Yes | Yes | No | |||
| 831 | Check Type0/1 BIST Register rule | Yes | Yes | No | ||||
| 832 | Check HDR CapPtr Register rule | Yes | Yes | No | ||||
| PCI_IN_20 | 809 | Vendor specific data is PCIe compliant | Yes | Yes | No | |||
| PCI_MM_01 | 845 | PCIe Device Memory mapping support | No | Yes | Yes | |||
| 1516 | PCIe Device Memory access check | Yes | Yes | No | Exerciser VIP required | |||
| PCI_MM_02 | Not Covered | |||||||
| PCI_MM_03 | 894 | PCIe Normal Memory mapping support | No | Yes | Yes | |||
| 1539 | PCIe Normal Memory access check | Yes | Yes | No | Exerciser VIP required | |||
| PCI_MM_04 | 847 | NP type-1 pcie only support 32-bit | Yes | Yes | No | |||
| PCI_MM_05 | 895 | PCIe & PE common physical memory view | No | Yes | Yes | |||
| PCI_MM_06 | Not Covered | |||||||
| PCI_MM_07 | 905 | No extra address translation | No | Yes | Yes | |||
| PCI_MSI_1 | 839 | Check MSI support for PCIe dev | Yes | Yes | No | MSI/MSI-X support required | ||
| PCI_MSI_2 | 897 | Check MSI=X vectors uniqueness | No | Yes | Yes | MSI/MSI-X support required | ||
| 1533 | MSI(-X) triggers intr with unique ID | Yes | Yes | No | Exerciser VIP required | |||
| PCI_LI_01 | 806 | Check Legacy Intrrupt is SPI | Yes | Yes | No | |||
| PCI_LI_02 | 896 | PCI legacy intr SPI ID unique | No | Yes | Yes | |||
| 1506 | Generate PCIe legacy interrupt | Yes | Yes | No | Exerciser VIP required | |||
| PCI_LI_03 | 823 | Check Legacy Intr SPI level sensitive | Yes | Yes | No | |||
| PCI_LI_04 | Not Covered | |||||||
| PCI_SM_01 | Not Covered | |||||||
| PCI_SM_02 | 835 | Check Function level reset | Yes | Yes | No | |||
| PCI_IC_11 | 868 | PCIe RC,PE - Same Inr Shareable Domain | Yes | Yes | No | |||
| PCI_IC_12 | Not Covered | |||||||
| PCI_IC_13 | Not Covered | |||||||
| PCI_IC_14 | Not Covered | |||||||
| PCI_IC_15 | 1503 | Arrival order Check | Yes | Yes | No | Exerciser VIP required | ||
| PCI_IC_16 | Not Covered | |||||||
| PCI_IC_17 | Not Covered | |||||||
| PCI_IC_18 | Not Covered | |||||||
| PCI_IO_01 | Not Covered | |||||||
| PCI_IEP_1 | Not Covered | |||||||
| PCI_PP_01 | Not Covered | |||||||
| PCI_PP_02 | 1514 | P2P transactions must not deadlock | Yes | Yes | No | Exerciser VIP required | ||
| PCI_PP_03 | 819 | RP must suprt ACS if P2P Txn are allow | Yes | Yes | No | PCIe Hierarchy P2P support required | ||
| PCI_PP_04 | 818 | Check RP Adv Error Report | Yes | Yes | No | PCIe Hierarchy and Device P2P support required | ||
| 1501 | Check P2P ACS Functionality | Yes | Yes | No | Exerciser VIP required | |||
| 1502 | Check ACS Redirect Req Valid | Yes | Yes | No | Exerciser VIP required | |||
| PCI_PP_05 | 817 | Check Direct Transl P2P Support | Yes | Yes | No | PCIe Hierarchy and Device P2P support required | ||
| PCI_PAS_1 | 842 | PASID support atleast 16 bits | Yes | Yes | No | PASID support required | ||
| PCI_PTM_1 | Not Covered | |||||||
| L1 | B_PER_09 | B_PER_09 | 604 | Check Memory Attributes of DMA | No | Yes | Yes | |
| L1 | B_PER_10 | B_PER_10 | 607 | Memory Attribute of I/O coherent DMA | No | Yes | Yes | |
| L1 | B_PER_12 | B_PER_12 | 821 | Type 0 config header rules | Yes | Yes | No | |
| L1 | B_PER_11 | B_PER_11 | Not Covered | |||||
| FR | B_PE_16 | B_PE_16 | linux mte app | Check for MTE support | No | No | Yes | |
| FR | B_PE_17 | B_PE_17 | 37 | Check SPE if implemented | Yes | Yes | No | |
| FR | B_PE_25 | B_PE_25 | 15 | Check for FEAT_LSE support | Yes | Yes | No | |
| FR | XRPZG | XRPZG | 66 | Check num of Breakpoints and type | Yes | Yes | No | |
| FR | B_SEC_01 | B_SEC_01 | 43 | Check Speculation Restriction | Yes | Yes | No | |
| FR | B_SEC_02 | B_SEC_02 | 44 | Check Speculative Str Bypass Safe | Yes | Yes | No | |
| FR | B_SEC_03 | B_SEC_03 | 45 | Check PEs Impl CSDB,SSBB,PSSBB | Yes | Yes | No | |
| FR | B_SEC_04 | B_SEC_04 | 46 | Check PEs Implement SB Barrier | Yes | Yes | No | |
| FR | B_SEC_05 | B_SEC_05 | 47 | Check PE Impl CFP,DVP,CPP RCTX | Yes | Yes | No | |
| FR | B_SMMU_03 | B_SMMU_03 | 316 | Check SMMU Large VA Support | Yes | Yes | No | |
| FR | B_SMMU_04 | B_SMMU_04 | 317 | Check TLB Range Invalidation | Yes | Yes | No | |
| FR | B_SMMU_05 | B_SMMU_05 | 330 | Check DVM capabilities | Yes | Yes | No | |
| FR | B_SMMU_09 | B_SMMU_09 | 310 | Check S-EL2 & SMMU Stage1 support | Yes | Yes | No | |
| FR | B_SMMU_11 | B_SMMU_11 | 312 | Check SMMU for MPAM support | Yes | Yes | No | |
| FR | B_SMMU_13 | B_SMMU_13 | 318 | Check SMMU 16 Bit ASID Support | Yes | Yes | No | |
| FR | B_SMMU_14 | B_SMMU_14 | 319 | Check SMMU Endianess Support | Yes | Yes | No | |
| FR | B_SMMU_20 | B_SMMU_20 | 311 | Check S-EL2 & SMMU Stage2 Support | Yes | Yes | No | |
| FR | B_SMMU_23 | B_SMMU_23 | 315 | Check SMMU 16 Bit VMID Support | Yes | Yes | No | |
| FR | B_SMMU_24 | B_SMMU_24 | Not Covered | |||||
| FR | B_SMMU_25 | B_SMMU_25 | Not Covered | |||||
| FR | B_REP_1 | RI_CRS_1 | Not Covered | |||||
| RI_BAR_1 | 883 | Read and write to BAR reg | Yes | Yes | No | |||
| RI_BAR_2 | Not Covered | |||||||
| RI_BAR_3 | 862 | Check BAR memory space & type | Yes | Yes | No | |||
| RI_INT_1 | 869 | Check MSI and MSI-X support | Yes | Yes | No | MSI/MSI-X support required | ||
| RI_ORD_1 | 1521 | Arrival order & Gathering Check | Yes | Yes | No | Exerciser VIP required | ||
| RI_ORD_2 | Not Covered | |||||||
| RI_ORD_3 | Not Covered | |||||||
| RI_SMU_1 | 1519 | Check ATS Support Rule | Yes | Yes | No | Exerciser VIP required; ATC cache required | ||
| RI_SMU_2 | Not Covered | |||||||
| RI_SMU_3 | 1536 | Generate PASID transactions | Yes | Yes | No | Exerciser VIP required | ||
| ITS_01 | 251 | Check number of ITS blocks in a group | Yes | Yes | No | |||
| ITS_02 | 252 | Check ITS block association with group | Yes | Yes | No | |||
| ITS_03 | 1511 | MSI-capable device linked to ITS group | Yes | Yes | No | Exerciser VIP required | ||
| ITS_04 | 1535 | MSI-cap device can target any ITS blk | Yes | Yes | No | Exerciser VIP required | ||
| ITS_05 | 1512 | MSI to ITS Blk outside assigned group | Yes | Yes | No | Exerciser VIP required | ||
| ITS_06 | Not Covered | |||||||
| ITS_07 | Not Covered | |||||||
| ITS_08 | Not Covered | |||||||
| ITS_DEV_1 | Not Covered | |||||||
| ITS_DEV_2 | 253 | Check uniqueness of StreamID | Yes | Yes | No | |||
| ITS_DEV_3 | Not Covered | |||||||
| ITS_DEV_4 | 1513 | MSI originating from different master | Yes | Yes | No | Exerciser VIP required | ||
| ITS_DEV_5 | Not Covered | |||||||
| ITS_DEV_6 | 1504 | MSI-X triggers intr with unique ID | Yes | Yes | No | Exerciser VIP required | ||
| ITS_DEV_7 | 254 | Check Device's SID/RID/DID behind SMMU | Yes | Yes | No | |||
| ITS_DEV_8 | 255 | Check Device IDs not behind SMMU | Yes | Yes | No | |||
| ITS_DEV_9 | Not Covered | |||||||
| RI_RST_1 | 863 | Check Function level reset | Yes | Yes | No | |||
| RI_PWR_1 | 870 | Check Power Mgmt rules: RCiEP/iEP/RP | Yes | Yes | No | RCiEP, iEP RP, iEP EP | ||
| PCI_IN_01 | 801 | Check ECAM Presence | Yes | Yes | No | |||
| PCI_IN_02 | 802 | Check ECAM Memory accessibility | Yes | Yes | No | |||
| PCI_IN_03 | 838 | Check all RP in HB is in same ECAM | Yes | Yes | No | |||
| PCI_IN_07 | Not Covered | |||||||
| PCI_IN_14 | Not Covered | |||||||
| PCI_IN_15 | Not Covered | |||||||
| PCI_IN_16 | 808 | Check all 1's for out of range | Yes | Yes | No | |||
| PCI_IN_20 | 809 | Vendor specific data is PCIe compliant | Yes | Yes | No | |||
| PCI_MM_01 | 845 | PCIe Device Memory mapping support | No | Yes | Yes | |||
| PCI_MM_02 | Not Covered | |||||||
| PCI_MM_03 | 894 | PCIe Normal Memory mapping support | No | Yes | Yes | |||
| PCI_MM_04 | 847 | NP type-1 pcie only support 32-bit | Yes | Yes | No | |||
| PCI_MM_05 | 895 | PCIe & PE common physical memory view | No | Yes | Yes | |||
| PCI_MM_06 | Not Covered | |||||||
| PCI_MM_07 | 905 | No extra address translation | No | Yes | Yes | |||
| PCI_MSI_1 | 839 | Check MSI support for PCIe dev | Yes | Yes | No | MSI/MSI-X support required | ||
| PCI_MSI_2 | 897 | Check MSI=X vectors uniqueness | No | Yes | Yes | MSI/MSI-X support required | ||
| PCI_LI_01 | 806 | Check Legacy Intrrupt is SPI | Yes | Yes | No | |||
| PCI_LI_02 | 896 | PCI legacy intr SPI ID unique | No | Yes | Yes | |||
| PCI_LI_03 | 823 | Check Legacy Intr SPI level sensitive | Yes | Yes | No | |||
| PCI_LI_04 | Not Covered | |||||||
| PCI_SM_01 | Not Covered | |||||||
| PCI_SM_02 | 835 | Check Function level reset | Yes | Yes | No | |||
| PCI_IC_11 | 868 | PCIe RC,PE - Same Inr Shareable Domain | Yes | Yes | No | |||
| PCI_IC_12 | Not Covered | |||||||
| PCI_IC_13 | Not Covered | |||||||
| PCI_IC_14 | Not Covered | |||||||
| PCI_IC_15 | 1503 | Arrival order Check | Yes | Yes | No | Exerciser VIP required | ||
| PCI_IC_16 | Not Covered | |||||||
| PCI_IC_17 | Not Covered | |||||||
| PCI_IC_18 | Not Covered | |||||||
| PCI_IO_01 | Not Covered | |||||||
| PCI_IEP_1 | Not Covered | |||||||
| PCI_PP_01 | Not Covered | |||||||
| PCI_PP_02 | 1514 | P2P transactions must not deadlock | Yes | Yes | No | Exerciser VIP required | ||
| PCI_PP_03 | 819 | RP must suprt ACS if P2P Txn are allow | Yes | Yes | No | PCIe Hierarchy P2P support required | ||
| PCI_PP_04 | 818 | Check RP Adv Error Report | Yes | Yes | No | PCIe Hierarchy and Device P2P support required | ||
| PCI_PP_05 | 817 | Check Direct Transl P2P Support | Yes | Yes | No | PCIe Hierarchy and Device P2P support required | ||
| PCI_PAS_1 | 842 | PASID support atleast 16 bits | Yes | Yes | No | PASID support required | ||
| PCI_PTM_1 | Not Covered | |||||||
| RE_PCI_1 | 885 | Check RCiEP Hdr type & link Cap | Yes | Yes | No | |||
| RE_PCI_2 | 884 | Check RCEC Class code and Ext Cap | Yes | Yes | No | |||
| RE_CFG_1 | Not Covered | |||||||
| RE_CFG_2 | Not Covered | |||||||
| RE_CFG_3 | Not Covered | |||||||
| RE_ORD_4 | 1508 | Tx pending bit clear correctness RCiEP | Yes | Yes | No | Exerciser VIP required | ||
| RE_PWR_2 | Not Covered | |||||||
| RE_PWR_3 | Not Covered | |||||||
| RE_ACS_1 | 815 | Check ACS Cap on p2p support: RCiEP | Yes | Yes | No | PCIe Hierarchy and Device P2P support required | ||
| RE_ACS_2 | 816 | Check AER Cap on ACS Cap support | Yes | Yes | No | PCIe Hierarchy and Device P2P support required | ||
| RE_ACS_3 | Not Covered | |||||||
| RE_REG_1 | 848 | Check config header rule: RCEC/RCiEP | Yes | Yes | No | |||
| RE_REG_2 | 856 | Check Power Mgmt Cap/Ctrl/Status - RC | Yes | Yes | No | |||
| RE_REG_3 | 852 | Check Dev Cap & Ctrl Reg rule - RCiEP | Yes | Yes | No | |||
| RE_REC_1 | 861 | Check Max payload size support: RCEC | Yes | Yes | No | |||
| RE_REC_2 | Not Covered | |||||||
| FR | B_IEP_1 | RI_CRS_1 | Not Covered | |||||
| RI_BAR_1 | 883 | Read and write to BAR reg | Yes | Yes | No | |||
| RI_BAR_2 | Not Covered | |||||||
| RI_BAR_3 | 862 | Check BAR memory space & type | Yes | Yes | No | |||
| RI_INT_1 | 869 | Check MSI and MSI-X support | Yes | Yes | No | MSI/MSI-X support required | ||
| RI_ORD_1 | 1521 | Arrival order & Gathering Check | Yes | Yes | No | Exerciser VIP required | ||
| RI_ORD_2 | Not Covered | |||||||
| RI_ORD_3 | Not Covered | |||||||
| RI_SMU_1 | 1519 | Check ATS Support Rule | Yes | Yes | No | Exerciser VIP required; ATC cache required | ||
| RI_SMU_2 | Not Covered | |||||||
| RI_SMU_3 | 1536 | Generate PASID transactions | Yes | Yes | No | Exerciser VIP required | ||
| ITS_01 | 251 | Check number of ITS blocks in a group | Yes | Yes | No | |||
| ITS_02 | 252 | Check ITS block association with group | Yes | Yes | No | |||
| ITS_03 | 1511 | MSI-capable device linked to ITS group | Yes | Yes | No | Exerciser VIP required | ||
| ITS_04 | 1535 | MSI-cap device can target any ITS blk | Yes | Yes | No | Exerciser VIP required | ||
| ITS_05 | 1512 | MSI to ITS Blk outside assigned group | Yes | Yes | No | Exerciser VIP required | ||
| ITS_06 | Not Covered | |||||||
| ITS_07 | Not Covered | |||||||
| ITS_08 | Not Covered | |||||||
| ITS_DEV_1 | Not Covered | |||||||
| ITS_DEV_2 | 253 | Check uniqueness of StreamID | Yes | Yes | No | |||
| ITS_DEV_3 | Not Covered | |||||||
| ITS_DEV_4 | 1513 | MSI originating from different master | Yes | Yes | No | Exerciser VIP required | ||
| ITS_DEV_5 | Not Covered | |||||||
| ITS_DEV_6 | 1504 | MSI-X triggers intr with unique ID | Yes | Yes | No | Exerciser VIP required | ||
| ITS_DEV_7 | 254 | Check Device's SID/RID/DID behind SMMU | Yes | Yes | No | |||
| ITS_DEV_8 | 255 | Check Device IDs not behind SMMU | Yes | Yes | No | |||
| ITS_DEV_9 | Not Covered | |||||||
| RI_RST_1 | 863 | Check Function level reset | Yes | Yes | No | |||
| RI_PWR_1 | 870 | Check Power Mgmt rules: RCiEP/iEP/RP | Yes | Yes | No | RCiEP, iEP RP, iEP EP | ||
| PCI_IN_01 | 801 | Check ECAM Presence | Yes | Yes | No | |||
| PCI_IN_02 | 802 | Check ECAM Memory accessibility | Yes | Yes | No | |||
| PCI_IN_03 | 838 | Check all RP in HB is in same ECAM | Yes | Yes | No | |||
| PCI_IN_04 | 803 | All EP/Sw under RP in same ECAM Region | Yes | Yes | No | |||
| PCI_IN_05 | 820 | Type 0/1 common config rule | Yes | Yes | No | |||
| PCI_IN_06 | Not Covered | |||||||
| PCI_IN_07 | Not Covered | |||||||
| PCI_IN_08 | Not Covered | |||||||
| PCI_IN_09 | Not Covered | |||||||
| PCI_IN_10 | Not Covered | |||||||
| PCI_IN_11 | 1510 | Check RP Sec Bus transaction are TYPE0 | Yes | Yes | No | Exerciser VIP required | ||
| PCI_IN_12 | 837 | Check Config Txn for RP in HB | Yes | Yes | No | |||
| PCI_IN_13 | 804 | Check RootPort NP Memory Access | No | Yes | No | |||
| PCI_IN_14 | Not Covered | |||||||
| PCI_IN_15 | Not Covered | |||||||
| PCI_IN_16 | 808 | Check all 1's for out of range | Yes | Yes | No | |||
| PCI_IN_17 | 1515 | Check ARI forwarding enable rule | Yes | Yes | No | Exerciser VIP required | ||
| PCI_IN_18 | 811 | Check RP Byte Enable Rules | Yes | Yes | No | |||
| PCI_IN_19 | 830 | Check Cmd Reg memory space enable | Yes | Yes | No | |||
| PCI_IN_20 | 809 | Vendor specific data is PCIe compliant | Yes | Yes | No | |||
| PCI_MM_01 | 845 | PCIe Device Memory mapping support | No | Yes | Yes | |||
| PCI_MM_02 | Not Covered | |||||||
| PCI_MM_03 | 894 | PCIe Normal Memory mapping support | No | Yes | Yes | |||
| PCI_MM_04 | 847 | NP type-1 pcie only support 32-bit | Yes | Yes | No | |||
| PCI_MM_05 | 895 | PCIe & PE common physical memory view | No | Yes | Yes | |||
| PCI_MM_06 | Not Covered | |||||||
| PCI_MM_07 | 905 | No extra address translation | No | Yes | Yes | |||
| PCI_MSI_1 | 839 | Check MSI support for PCIe dev | Yes | Yes | No | MSI/MSI-X support required | ||
| PCI_MSI_2 | 897 | Check MSI=X vectors uniqueness | No | Yes | Yes | MSI/MSI-X support required | ||
| PCI_LI_01 | 806 | Check Legacy Intrrupt is SPI | Yes | Yes | No | |||
| PCI_LI_02 | 896 | PCI legacy intr SPI ID unique | No | Yes | Yes | |||
| PCI_LI_03 | 823 | Check Legacy Intr SPI level sensitive | Yes | Yes | No | |||
| PCI_LI_04 | Not Covered | |||||||
| PCI_SM_01 | Not Covered | |||||||
| PCI_SM_02 | 835 | Check Function level reset | Yes | Yes | No | |||
| PCI_IC_11 | 868 | PCIe RC,PE - Same Inr Shareable Domain | Yes | Yes | No | |||
| PCI_IC_12 | Not Covered | |||||||
| PCI_IC_13 | Not Covered | |||||||
| PCI_IC_14 | Not Covered | |||||||
| PCI_IC_15 | 1503 | Arrival order Check | Yes | Yes | No | Exerciser VIP required | ||
| PCI_IC_16 | Not Covered | |||||||
| PCI_IC_17 | Not Covered | |||||||
| PCI_IC_18 | Not Covered | |||||||
| PCI_IO_01 | Not Covered | |||||||
| PCI_IEP_1 | Not Covered | |||||||
| PCI_PP_01 | Not Covered | |||||||
| PCI_PP_02 | 1514 | P2P transactions must not deadlock | Yes | Yes | No | Exerciser VIP required | ||
| PCI_PP_03 | 819 | RP must suprt ACS if P2P Txn are allow | Yes | Yes | No | PCIe Hierarchy P2P support required | ||
| PCI_PP_04 | 818 | Check RP Adv Error Report | Yes | Yes | No | PCIe Hierarchy and Device P2P support required | ||
| PCI_PP_05 | 817 | Check Direct Transl P2P Support | Yes | Yes | No | PCIe Hierarchy and Device P2P support required | ||
| PCI_PAS_1 | 842 | PASID support atleast 16 bits | Yes | Yes | No | PASID support required | ||
| PCI_PTM_1 | Not Covered | |||||||
| IE_CFG_1 | Not Covered | |||||||
| IE_CFG_2 | Not Covered | |||||||
| IE_CFG_4 | Not Covered | |||||||
| IE_ORD_4 | 1538 | Tx pending bit clear correctness iEP | Yes | Yes | No | Exerciser VIP required | ||
| IE_RST_2 | 879 | Check Sec Bus Reset For iEP_RP | Yes | Yes | No | |||
| IE_RST_3 | Not Covered | |||||||
| IE_PWR_2 | Not Covered | |||||||
| IE_PWR_3 | Not Covered | |||||||
| IE_ACS_1 | 882 | Check ACS Cap on p2p support: iEP EP | Yes | Yes | No | PCIe Hierarchy and Device P2P support required | ||
| IE_ACS_2 | 881 | Check iEP-RootPort P2P Support | Yes | Yes | No | PCIe Hierarchy and Device P2P support required | ||
| IE_REG_1 | 849 | Check config header rule: iEP_EP | Yes | Yes | No | |||
| IE_REG_2 | 854 | Check Dev Cap & Ctrl Reg rule - iEP_EP | Yes | Yes | No | |||
| IE_REG_3 | 850 | Check config header rule: iEP_RP | Yes | Yes | No | |||
| IE_REG_4 | 888 | Slot Cap, Control and Status reg rules | Yes | Yes | No | |||
| IE_REG_5 | 857 | Check Power Mgmt Cap/Ctrl/Status - iEP | Yes | Yes | No | |||
| IE_REG_6 | 892 | Secondary PCIe ECap Check: iEP Pair | Yes | Yes | No | |||
| IE_REG_7 | 812 | Datalink feature ECap Check: iEP Pair | Yes | Yes | No | |||
| IE_REG_8 | 813 | Phy Layer 16GT/s ECap Check: iEP Pair | Yes | Yes | No | |||
| IE_REG_9 | 814 | Lane Margining at Rec ECap Check: iEP | Yes | Yes | No | |||
| FR | BJLPB | BJLPB | 900 | Check MSI/MSI-X if FRS is supported | Yes | Yes | No | MSI/MSI-X support required |
| FR | B_PCIe_10 | B_PCIe_10 | 1530 | Enable and disable STE.DCP bit | Yes | Yes | No | Exerciser VIP required |
| FR | B_PCIe_11 | B_PCIe_11 | 891 | Steering Tag value properties | No | Yes | Yes |
- RI_ Added: RI_PWR_1
- Updated B_WD_02.
- Updated checklist to be consistent with I-VGLFZ.
- Removed PCI_PP_06 from the checklist, as rule statement got moved to recommendation.
- Updated Rule Checklist as per BSA 1.2 Specification
- B_ Added: B_SEC_01–05, B_IEP_1, B_REP_1
- B_ Removed: B_MEM_04, B_PE_15, B_WAK_09
- IE_ Added: IE_ACS_1–2, IE_CFG_1/2/4, IE_ORD_4, IE_PWR_2–3, IE_REG_1
- RE_ Added: RE_REG_2–3
- RI_ Added: RI_BAR_1–3, RI_CRS_1, RI_INT_1, RI_ORD_1–3, RI_PWR_1, RI_RST_1, RI_SMU_1–3