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Update component naming
1 parent be4a737 commit 27728db

15 files changed

Lines changed: 88 additions & 116 deletions

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hwcomponents_library/_version.py

Lines changed: 34 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,34 @@
1+
# file generated by setuptools-scm
2+
# don't change, don't track in version control
3+
4+
__all__ = [
5+
"__version__",
6+
"__version_tuple__",
7+
"version",
8+
"version_tuple",
9+
"__commit_id__",
10+
"commit_id",
11+
]
12+
13+
TYPE_CHECKING = False
14+
if TYPE_CHECKING:
15+
from typing import Tuple
16+
from typing import Union
17+
18+
VERSION_TUPLE = Tuple[Union[int, str], ...]
19+
COMMIT_ID = Union[str, None]
20+
else:
21+
VERSION_TUPLE = object
22+
COMMIT_ID = object
23+
24+
version: str
25+
__version__: str
26+
__version_tuple__: VERSION_TUPLE
27+
version_tuple: VERSION_TUPLE
28+
commit_id: COMMIT_ID
29+
__commit_id__: COMMIT_ID
30+
31+
__version__ = version = '1.0.29'
32+
__version_tuple__ = version_tuple = (1, 0, 29)
33+
34+
__commit_id__ = commit_id = 'gbe4a7373c'

hwcomponents_library/base.py

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,8 @@
33

44

55
class LibraryEstimatorClassBase(EnergyAreaModel):
6+
priority: float = 0.8
7+
68
@actionDynamicEnergy
79
def write(self) -> float:
810
return 0

hwcomponents_library/library/aladdin.py

Lines changed: 36 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -39,9 +39,6 @@ class AladdinAdder(LibraryEstimatorClassBase):
3939
The width of the adder in bits. This is the number of bits of the input values.
4040
"""
4141

42-
component_name = ["adder", "intadder", "aladdin_adder"]
43-
priority = 0.9
44-
4542
def __init__(self, tech_node: float, width: int = 32):
4643
super().__init__(leak_power=2.40e-6, area=278.0e-12)
4744
self.tech_node: float = self.scale(
@@ -79,6 +76,14 @@ def read(self) -> float:
7976
return 0.21e-12
8077

8178

79+
class Adder(AladdinAdder):
80+
pass
81+
82+
83+
class IntAdder(AladdinAdder):
84+
pass
85+
86+
8287
# Original CSV contents:
8388
# tech_node,global_cycle_period,width|datawidth,dynamic energy(pJ),area(um^2),action
8489
# 40nm,1e-9,1,0.009,5.98E+00,read
@@ -95,8 +100,6 @@ class AladdinRegister(LibraryEstimatorClassBase):
95100
width : int, optional
96101
The width of the register in bits.
97102
"""
98-
component_name = ["register", "aladdin_register"]
99-
priority = 0.9
100103

101104
def __init__(
102105
self,
@@ -154,6 +157,10 @@ def write(self) -> float:
154157
return 0.009e-12
155158

156159

160+
class Register(AladdinRegister):
161+
pass
162+
163+
157164
# Original CSV contents:
158165
# tech_node,global_cycle_period,width|datawidth,energy(pJ),area(um^2),action
159166
# 40nm,1e-9,32,0.02947,71,compare|read
@@ -171,8 +178,6 @@ class AladdinComparator(LibraryEstimatorClassBase):
171178
width : int, optional
172179
The width of the comparator in bits.
173180
"""
174-
component_name = ["comparator", "aladdin_comparator"]
175-
priority = 0.9
176181

177182
def __init__(self, tech_node: float, width: int = 32):
178183
super().__init__(leak_power=2.51e-8, area=71.0e-12)
@@ -211,6 +216,10 @@ def read(self) -> float:
211216
return 0.02947e-12
212217

213218

219+
class Comparator(AladdinComparator):
220+
pass
221+
222+
214223
# Original CSV contents:
215224
# tech_node,global_cycle_period,width|datawidth,width_a|datawidth_a,width_b|datawidth_b,energy(pJ),area(um^2),action
216225
# 40nm,1e-9,32,32,32,12.68,6350,multiply|read
@@ -232,8 +241,6 @@ class AladdinMultiplier(LibraryEstimatorClassBase):
232241
width_b : int, optional
233242
The width of the second input value in bits.
234243
"""
235-
component_name = ["intmultiplier", "multiplier", "aladdin_multiplier"]
236-
priority = 0.9
237244

238245
def __init__(
239246
self,
@@ -263,7 +270,9 @@ def __init__(
263270
"width and width_b cannot both be set. Either set width of both inputs "
264271
"or width_a and width_b separately."
265272
)
266-
self.width: int = self.scale("width", width, 32, quadratic, quadratic, quadratic)
273+
self.width: int = self.scale(
274+
"width", width, 32, quadratic, quadratic, quadratic
275+
)
267276
self.width_a: int = self.scale("width_a", width_a, 32, linear, linear, linear)
268277
self.width_b: int = self.scale("width_b", width_b, 32, linear, linear, linear)
269278

@@ -292,6 +301,14 @@ def read(self) -> float:
292301
return 12.68e-12
293302

294303

304+
class IntMultiplier(AladdinMultiplier):
305+
pass
306+
307+
308+
class Multiplier(AladdinMultiplier):
309+
pass
310+
311+
295312
# Original CSV contents:
296313
# tech_node,global_cycle_period,width|datawidth,energy(pJ),area(um^2),action
297314
# 40nm,1e-9,32,0.25074,495.5,count|read
@@ -308,8 +325,6 @@ class AladdinCounter(LibraryEstimatorClassBase):
308325
width : int, optional
309326
The width of the counter in bits.
310327
"""
311-
component_name = ["counter", "aladdin_counter"]
312-
priority = 0.9
313328

314329
def __init__(self, tech_node: float, width: int = 32):
315330
super().__init__(leak_power=3.21e-7, area=495.5e-12)
@@ -347,6 +362,11 @@ def read(self) -> float:
347362
"""
348363
return 0.25074e-12
349364

365+
366+
class Counter(AladdinCounter):
367+
pass
368+
369+
350370
class AladdinIntMAC(LibraryEstimatorClassBase):
351371
"""
352372
A integer multiply-accumulate unit from the Aladdin paper. Multiplies two values
@@ -361,10 +381,12 @@ class AladdinIntMAC(LibraryEstimatorClassBase):
361381
multiplier_width : int, optional
362382
The width of the multiplier in bits.
363383
"""
384+
364385
component_name = ["intmac", "aladdin_intmac"]
365-
priority = 0.9
366386

367-
def __init__(self, tech_node: float, adder_width: int = 16, multiplier_width: int = 8):
387+
def __init__(
388+
self, tech_node: float, adder_width: int = 16, multiplier_width: int = 8
389+
):
368390
self.adder = AladdinAdder(tech_node, adder_width)
369391
self.multiplier = AladdinMultiplier(tech_node, multiplier_width)
370392
super().__init__(

hwcomponents_library/library/atomlayer.py

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -45,9 +45,6 @@ class AtomlayerRegisterLadder(LibraryEstimatorClassBase):
4545
= width * depth.
4646
"""
4747

48-
component_name = "atomlayer_register_ladder"
49-
priority = 0.9
50-
5148
def __init__(self, tech_node: float, width: int = 16, depth: int = 128):
5249
super().__init__(leak_power=0.0, area=1620.0e-12)
5350
self.tech_node: float = self.scale(
@@ -127,9 +124,6 @@ class AtomlayerInputBufferTransfers(LibraryEstimatorClassBase):
127124
width * depth.
128125
"""
129126

130-
component_name = "atomlayer_input_buffer_transfers"
131-
priority = 0.9
132-
133127
def __init__(self, tech_node: float, width: int = 16, depth: int = 128):
134128
super().__init__(leak_power=0.0, area=2100.0e-12)
135129
self.tech_node: float = self.scale(

hwcomponents_library/library/brahms.py

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -42,9 +42,6 @@ class BrahmsDAC(LibraryEstimatorClassBase):
4242
Resolution of the DAC in bits
4343
"""
4444

45-
component_name = "brahms_dac"
46-
priority = 0.9
47-
4845
def __init__(self, tech_node: float, resolution: int = 8):
4946
super().__init__(leak_power=0.0, area=438.0e-12)
5047
self.tech_node: float = self.scale(
@@ -71,7 +68,6 @@ def read(self) -> float:
7168
"""
7269
return 0.291e-12
7370

74-
7571
@actionDynamicEnergy
7672
def convert(self) -> float:
7773
"""

hwcomponents_library/library/dummy.py

Lines changed: 1 addition & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -15,8 +15,6 @@ class DummyStorage(LibraryEstimatorClassBase):
1515
tech_node: float, optional
1616
Technology node in meters. This is not used.
1717
"""
18-
component_name = "dummy_storage"
19-
priority = 0.9
2018

2119
def __init__(self, tech_node: float | None = None):
2220
super().__init__(leak_power=0.0, area=0.0)
@@ -59,8 +57,6 @@ class DummyCompute(LibraryEstimatorClassBase):
5957
tech_node: float, optional
6058
Technology node in meters. This is not used.
6159
"""
62-
component_name = "dummy_compute"
63-
priority = 0.9
6460

6561
def __init__(self, tech_node: float | None = None):
6662
super().__init__(leak_power=0.0, area=0.0)
@@ -100,8 +96,6 @@ class DummyMemory(LibraryEstimatorClassBase):
10096
tech_node: float
10197
Technology node in meters. This is not used.
10298
"""
103-
component_name = "dummy_memory"
104-
priority = 0.9
10599

106100
def __init__(self, tech_node: float | None = None):
107101
super().__init__(leak_power=0.0, area=0.0)
@@ -131,6 +125,7 @@ def write(self) -> float:
131125
"""
132126
return 0.0
133127

128+
134129
class DummyNetwork(LibraryEstimatorClassBase):
135130
"""
136131
A dummy network component. Has zero area, zero energy, and zero leakage power.
@@ -140,8 +135,6 @@ class DummyNetwork(LibraryEstimatorClassBase):
140135
tech_node: float
141136
Technology node in meters. This is not used.
142137
"""
143-
component_name = "dummy_network"
144-
priority = 0.9
145138

146139
def __init__(self, tech_node: float | None = None):
147140
super().__init__(leak_power=0.0, area=0.0)

hwcomponents_library/library/forms.py

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -34,8 +34,6 @@ class FormsADC(LibraryEstimatorClassBase):
3434
resolution: int
3535
Resolution of the ADC in bits.
3636
"""
37-
component_name = "forms_adc"
38-
priority = 0.9
3937

4038
def __init__(self, tech_node: float, resolution: int = 4):
4139
super().__init__(leak_power=0.0, area=284.375e-12)

hwcomponents_library/library/isaac.py

Lines changed: 0 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -39,8 +39,6 @@ class IsaacEDRAM(LibraryEstimatorClassBase):
3939
Depth of the eDRAM in bits. This is the number of entries in the eDRAM, each
4040
with `width` bits. Total size = width * depth.
4141
"""
42-
component_name = "isaac_eDRAM"
43-
priority = 0.9
4442

4543
def __init__(self, tech_node: float, width: int = 256, depth: int = 2048):
4644
super().__init__(leak_power=0.0, area=83000.0e-12)
@@ -97,8 +95,6 @@ class IsaacChip2ChipLink(LibraryEstimatorClassBase):
9795
width: int
9896
Width of the link in bits. This is the width of a read/write port.
9997
"""
100-
component_name = "isaac_chip2chip_link"
101-
priority = 0.9
10298

10399
def __init__(self, tech_node: float, width: int = 128):
104100
super().__init__(leak_power=0.0, area=23000000.0e-12)
@@ -155,9 +151,6 @@ class IsaacRouterSharedByFour(LibraryEstimatorClassBase):
155151
so this area is divided by four to match the paper.
156152
"""
157153

158-
component_name = "isaac_router_shared_by_four"
159-
priority = 0.9
160-
161154
def __init__(self, tech_node: float, width: int = 256):
162155
super().__init__(leak_power=0.0, area=37500.0e-12)
163156
self.tech_node: float = self.scale(
@@ -255,8 +248,6 @@ class IsaacADC(LibraryEstimatorClassBase):
255248
resolution: int
256249
Resolution of the ADC in bits.
257250
"""
258-
component_name = "isaac_adc"
259-
priority = 0.9
260251

261252
def __init__(self, tech_node: float, resolution: int = 8):
262253
super().__init__(leak_power=0.0, area=1200.0e-12)
@@ -321,8 +312,6 @@ class IsaacRouter(LibraryEstimatorClassBase):
321312
width: int
322313
Width of the router in bits. This is the width of a read/write port.
323314
"""
324-
component_name = "isaac_router"
325-
priority = 0.9
326315

327316
def __init__(self, tech_node: float, width: int = 256):
328317
super().__init__(leak_power=0.0, area=150000.0e-12)
@@ -360,7 +349,6 @@ def write(self) -> float:
360349
"""
361350
return 0
362351

363-
364352
@actionDynamicEnergy(bits_per_action="width")
365353
def transfer(self) -> float:
366354
"""
@@ -398,8 +386,6 @@ class IsaacShiftAdd(LibraryEstimatorClassBase):
398386
Width of the shift-and-add unit in bits. This is the number of bits of each
399387
input value that is added to the register.
400388
"""
401-
component_name = "isaac_shift_add"
402-
priority = 0.9
403389

404390
def __init__(self, tech_node: float, width: int = 16):
405391
super().__init__(leak_power=0.0, area=60.0e-12)
@@ -473,8 +459,6 @@ class IsaacEDRAMBus(LibraryEstimatorClassBase):
473459
width: int
474460
Width of the eDRAM bus in bits. This is the width of a read/write port.
475461
"""
476-
component_name = "isaac_eDRAM_bus"
477-
priority = 0.9
478462

479463
def __init__(self, tech_node: float, width: int = 1):
480464
super().__init__(leak_power=0.0, area=29.296875e-12)
@@ -559,8 +543,6 @@ class IsaacDAC(LibraryEstimatorClassBase):
559543
resolution: int
560544
Resolution of the DAC in bits.
561545
"""
562-
component_name = "isaac_dac"
563-
priority = 0.9
564546

565547
def __init__(self, tech_node: float, resolution: int = 1, rows: int = 1):
566548
super().__init__(leak_power=0.0, area=0.166015625e-12)

hwcomponents_library/library/jia.py

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -37,9 +37,6 @@ class JiaShiftAdd(LibraryEstimatorClassBase):
3737
Voltage of the shift-and-add unit in volts.
3838
"""
3939

40-
component_name = "jia_shift_add"
41-
priority = 0.9
42-
4340
def __init__(self, tech_node: float, resolution: int = 8, voltage: float = 1.2):
4441
super().__init__(leak_power=2.22e-6, area=5000.0e-12)
4542
self.tech_node: float = self.scale(
@@ -116,9 +113,6 @@ class JiaZeroGate(LibraryEstimatorClassBase):
116113
Voltage of the zero gating unit in volts.
117114
"""
118115

119-
component_name = "jia_zero_gate"
120-
priority = 0.9
121-
122116
def __init__(
123117
self, tech_node: float, rows: int = 1, resolution: int = 8, voltage: float = 1.2
124118
):
@@ -190,9 +184,6 @@ class JiaDatapath(LibraryEstimatorClassBase):
190184
191185
"""
192186

193-
component_name = "jia_datapath"
194-
priority = 0.9
195-
196187
def __init__(self, tech_node: float, voltage: float = 1.2):
197188
super().__init__(leak_power=4.44e-6, area=10535.0e-12)
198189
self.tech_node: float = self.scale(

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