Skip to content

Commit cd7ad91

Browse files
committed
[looptree] Merge memory latency analysis
1 parent 954e432 commit cd7ad91

5 files changed

Lines changed: 10 additions & 45 deletions

File tree

pytimeloop/looptree/latency/latency.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
from pytimeloop.isl.singular import get_value_from_singular_qpolynomial
22
from pytimeloop.looptree.latency.processors import LATENCY_PROCESSORS
33
from pytimeloop.looptree.reuse.isl.des import IslReuseAnalysisOutput
4-
from pytimeloop.looptree.latency.memory.isl import memory_latency
4+
from pytimeloop.looptree.latency.memory import memory_latency
55

66
from bindings.looptree import SpatialTag
77

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,14 +1,17 @@
11
from collections import defaultdict
22

33
from pytimeloop.looptree.accesses import buffer_accesses_from_buffet_actions
4-
from pytimeloop.looptree.reuse.isl.des import IslReuseAnalysisOutput
4+
from pytimeloop.looptree.reuse.isl import IslReuseAnalysisOutput
5+
from pytimeloop.looptree.reuse.summarized import SummarizedAnalysisOutput
56

67

7-
def memory_latency(looptree_results: IslReuseAnalysisOutput,
8-
arch,
9-
mapping,
10-
workload,
11-
bindings):
8+
def memory_latency(
9+
looptree_results: IslReuseAnalysisOutput | SummarizedAnalysisOutput,
10+
arch,
11+
mapping,
12+
workload,
13+
bindings
14+
):
1215
accesses_stats = buffer_accesses_from_buffet_actions(
1316
looptree_results,
1417
mapping,

pytimeloop/looptree/latency/memory/__init__.py

Whitespace-only changes.

pytimeloop/looptree/latency/memory/base.py

Lines changed: 0 additions & 32 deletions
This file was deleted.

pytimeloop/looptree/latency/memory/summarized.py

Lines changed: 0 additions & 6 deletions
This file was deleted.

0 commit comments

Comments
 (0)