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Looks like the Microbit build is failing. I guess that is not V2, ie not Cortex M4, and is instead an M0 and so doesn't have MPU support. But that's just a guess. |
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| -- This package provides subprograms to configure the Memory Protection | ||
| -- Unit (MPU) on the Cortex-M7 family of CPU. | ||
| -- | ||
| -- On Cortex-M7, the MPU is required when the D-cache is enabled in order | ||
| -- to prevent speculative reads from causing bus contention on external | ||
| -- memory interfaces (e.g., FMC/SDRAM). Without MPU configuration, the | ||
| -- default memory map treats all external memory as Normal, allowing the | ||
| -- CPU to issue speculative reads that can starve bus masters such as the | ||
| -- LTDC display controller. |
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As this is specific to the Cortex-M7 I suggest to move the file to arch/ARM/cortex_m/src/cm7. This should also fix the build failure. The failure is caused by the builds using Cortex-M0 failing as they pull this unit but don't provide an SVD for that.
If that unit is supposed to work on other Cortex-M I suggest to add the MPU SVD for Cortex-M0. According to the documentation I could find the M0 should also come with an MPU.
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Note that when used this will fix the LTDC "slew" problem too.