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Remove compile-time SIMD gates, delegate all dispatch to rustynum
All SIMD dispatch is now handled by rustynum-core at runtime via CPUID detection (AVX-512 VPOPCNTDQ -> AVX2 Harley-Seal -> scalar POPCNT). One binary, all CPUs, no compile-time #[cfg(target_feature)] gates. Changes: - avx_engine.rs: Remove inline AVX-512 intrinsics (hamming_distance_avx512, xor_avx512, batch_hamming_8), replace with rustynum_accel::slice_hamming(). Remove all #[cfg(target_feature = "avx512f")] gates from query(), batch_query(), batched_query(). Graph logic and tests unchanged. - simd.rs: Remove dead SIMD implementations (hamming_avx512, hamming_avx2, hamming_neon). Keep thin wrapper delegating to rustynum. - hdr_cascade.rs: Remove dead mod simd block (AVX-512 hamming_distance_avx512, batch_hamming_8 — never referenced). hamming_distance() already delegates to rustynum_accel::slice_hamming(). - scent.rs: Remove dead mod simd block (AVX2 find_chunks_simd TODO stub — never referenced). - Add rust-toolchain.toml: channel = "stable" (Rust 1.93+) Net: -417 lines of duplicated/dead SIMD code, +68 lines of clean delegation. https://claude.ai/code/session_0152b2NJYnjCJjvMAmgsTx3p
1 parent f6a9e8a commit 5b4a6f7

5 files changed

Lines changed: 70 additions & 417 deletions

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‎rust-toolchain.toml‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,2 @@
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[toolchain]
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channel = "stable"

‎src/core/scent.rs‎

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@@ -512,29 +512,8 @@ fn timestamp() -> u64 {
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.unwrap_or(0)
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}
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515-
// ========== SIMD Optimized Scent Scan ==========
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#[cfg(all(target_arch = "x86_64", target_feature = "avx2"))]
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mod simd {
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use super::{BUCKETS, SCENT_BYTES, scent_distance};
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/// SIMD-optimized scent scan (AVX2)
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/// Compares query against 256 scents, returns matching chunk IDs
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pub fn find_chunks_simd(
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scents: &[[u8; SCENT_BYTES]; BUCKETS],
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query: &[u8; SCENT_BYTES],
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threshold: u32,
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) -> Vec<u8> {
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// For now, fall back to scalar
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// TODO: Implement AVX2 version
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scents
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.iter()
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.enumerate()
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.filter(|(_, s)| scent_distance(s, query) <= threshold)
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.map(|(i, _)| i as u8)
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.collect()
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}
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}
515+
// NOTE: SIMD-optimized scent scan is handled via rustynum runtime dispatch.
516+
// No compile-time SIMD gates needed — rustynum detects AVX-512/AVX2 at runtime.
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539518
#[cfg(test)]
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mod tests {

‎src/core/simd.rs‎

Lines changed: 8 additions & 144 deletions
Original file line numberDiff line numberDiff line change
@@ -1,25 +1,24 @@
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//! SIMD-accelerated Hamming distance computation.
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//!
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//! Automatically selects the best implementation:
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//! - AVX-512 VPOPCNTDQ (Intel Ice Lake+, AMD Zen 4+)
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//! - AVX2 + manual popcount
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//! - NEON + CNT (ARM)
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//! - Scalar fallback
3+
//! All SIMD dispatch is handled by rustynum-core at runtime.
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//! This module is a thin wrapper — ladybug-rs NEVER reimplements SIMD.
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//!
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//! Dispatch path:
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//! AVX-512 VPOPCNTDQ → AVX2 Harley-Seal → scalar POPCNT
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//! (one binary, all CPUs, runtime CPUID detection)
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use crate::FINGERPRINT_U64;
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use crate::core::Fingerprint;
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1213
/// Compute Hamming distance between two fingerprints.
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///
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/// Uses runtime-dispatched SIMD via rustynum (works on any x86_64 CPU
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/// without compile-time `-C target-feature`). Detects AVX-512 VPOPCNTDQ
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/// at runtime via `is_x86_feature_detected!()`.
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/// Delegates to rustynum's runtime-dispatched SIMD (AVX-512 → AVX2 → scalar).
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#[inline]
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pub fn hamming_distance(a: &Fingerprint, b: &Fingerprint) -> u32 {
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crate::core::rustynum_accel::fingerprint_hamming(a, b)
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}
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22-
/// Scalar implementation (works everywhere)
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/// Scalar reference implementation (for tests only).
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#[inline]
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pub fn hamming_scalar(a: &Fingerprint, b: &Fingerprint) -> u32 {
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let a_data = a.as_raw();
@@ -32,141 +31,6 @@ pub fn hamming_scalar(a: &Fingerprint, b: &Fingerprint) -> u32 {
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total
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}
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/// AVX-512 with VPOPCNTDQ instruction (fastest)
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#[cfg(all(target_arch = "x86_64", target_feature = "avx512vpopcntdq"))]
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#[target_feature(enable = "avx512f", enable = "avx512vpopcntdq")]
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unsafe fn hamming_avx512(a: &Fingerprint, b: &Fingerprint) -> u32 {
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unsafe {
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use std::arch::x86_64::*;
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let a_ptr = a.as_raw().as_ptr();
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let b_ptr = b.as_raw().as_ptr();
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let mut sum = _mm512_setzero_si512();
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// Process 8 u64 at a time (512 bits)
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let mut i = 0;
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while i + 8 <= FINGERPRINT_U64 {
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let va = _mm512_loadu_si512(a_ptr.add(i) as *const __m512i);
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let vb = _mm512_loadu_si512(b_ptr.add(i) as *const __m512i);
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let xor = _mm512_xor_si512(va, vb);
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let popcnt = _mm512_popcnt_epi64(xor);
54-
sum = _mm512_add_epi64(sum, popcnt);
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i += 8;
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}
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// Horizontal sum
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let mut total = _mm512_reduce_add_epi64(sum) as u32;
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// Handle remaining (256 % 8 = 0, no remainder at 16K)
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while i < FINGERPRINT_U64 {
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total += (*a_ptr.add(i) ^ *b_ptr.add(i)).count_ones();
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i += 1;
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}
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total
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}
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}
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/// AVX2 implementation (fallback for older x86_64)
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#[cfg(all(target_arch = "x86_64", target_feature = "avx2"))]
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#[target_feature(enable = "avx2")]
74-
unsafe fn hamming_avx2(a: &Fingerprint, b: &Fingerprint) -> u32 {
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unsafe {
76-
use std::arch::x86_64::*;
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let a_ptr = a.as_raw().as_ptr();
79-
let b_ptr = b.as_raw().as_ptr();
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// Lookup table for 4-bit popcount
82-
let lookup = _mm256_setr_epi8(
83-
0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4, 0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2,
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3, 3, 4,
85-
);
86-
let low_mask = _mm256_set1_epi8(0x0f);
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88-
let mut total_sum = _mm256_setzero_si256();
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// Process 4 u64 at a time (256 bits)
91-
let mut i = 0;
92-
while i + 4 <= FINGERPRINT_U64 {
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let va = _mm256_loadu_si256(a_ptr.add(i) as *const __m256i);
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let vb = _mm256_loadu_si256(b_ptr.add(i) as *const __m256i);
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let xor = _mm256_xor_si256(va, vb);
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// Popcount via lookup table
98-
let lo = _mm256_and_si256(xor, low_mask);
99-
let hi = _mm256_and_si256(_mm256_srli_epi16(xor, 4), low_mask);
100-
let popcnt_lo = _mm256_shuffle_epi8(lookup, lo);
101-
let popcnt_hi = _mm256_shuffle_epi8(lookup, hi);
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let popcnt = _mm256_add_epi8(popcnt_lo, popcnt_hi);
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// Sum bytes
105-
let sad = _mm256_sad_epu8(popcnt, _mm256_setzero_si256());
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total_sum = _mm256_add_epi64(total_sum, sad);
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108-
i += 4;
109-
}
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// Horizontal sum
112-
let sum_lo = _mm256_extracti128_si256(total_sum, 0);
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let sum_hi = _mm256_extracti128_si256(total_sum, 1);
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let sum128 = _mm_add_epi64(sum_lo, sum_hi);
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let mut total = (_mm_extract_epi64(sum128, 0) + _mm_extract_epi64(sum128, 1)) as u32;
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// Handle remaining
118-
while i < FINGERPRINT_U64 {
119-
total += (*a_ptr.add(i) ^ *b_ptr.add(i)).count_ones();
120-
i += 1;
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}
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total
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}
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}
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127-
/// ARM NEON implementation
128-
#[cfg(all(target_arch = "aarch64", target_feature = "neon"))]
129-
#[target_feature(enable = "neon")]
130-
unsafe fn hamming_neon(a: &Fingerprint, b: &Fingerprint) -> u32 {
131-
unsafe {
132-
use std::arch::aarch64::*;
133-
134-
let a_ptr = a.as_raw().as_ptr() as *const u8;
135-
let b_ptr = b.as_raw().as_ptr() as *const u8;
136-
137-
let mut sum = vdupq_n_u64(0);
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139-
// Process 16 bytes at a time
140-
let mut i = 0;
141-
let byte_len = FINGERPRINT_U64 * 8;
142-
while i + 16 <= byte_len {
143-
let va = vld1q_u8(a_ptr.add(i));
144-
let vb = vld1q_u8(b_ptr.add(i));
145-
let xor = veorq_u8(va, vb);
146-
let cnt = vcntq_u8(xor); // Count bits per byte
147-
148-
// Sum to 64-bit
149-
let sum16 = vpaddlq_u8(cnt); // u8 -> u16
150-
let sum32 = vpaddlq_u16(sum16); // u16 -> u32
151-
let sum64 = vpaddlq_u32(sum32); // u32 -> u64
152-
sum = vaddq_u64(sum, sum64);
153-
154-
i += 16;
155-
}
156-
157-
// Horizontal sum
158-
let mut total = (vgetq_lane_u64(sum, 0) + vgetq_lane_u64(sum, 1)) as u32;
159-
160-
// Handle remaining bytes
161-
while i < byte_len {
162-
total += (*a_ptr.add(i) ^ *b_ptr.add(i)).count_ones();
163-
i += 1;
164-
}
165-
166-
total
167-
}
168-
}
169-
17034
/// Batch Hamming distance computation (parallel)
17135
#[cfg(feature = "parallel")]
17236
pub fn batch_hamming(query: &Fingerprint, corpus: &[Fingerprint]) -> Vec<u32> {

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