ci(simd): Phase 6 — AVX-512 dispatch check job

Phase 6 of the integration plan in `.claude/knowledge/
simd-dispatch-architecture.md`.

Adds a new `tier4-avx512-check` job that compiles the crate with
`-Ctarget-cpu=x86-64-v4` so the `#[cfg(target_feature = "avx512f")]`
dispatch arm in `src/simd.rs` is exercised on every PR. Without this
the AVX-512 code path bit-rots under the v3 default (`x86-64-v3` baseline
in `.cargo/config.toml`) — it compiles only when a developer happens to
build locally with `--config .cargo/config-avx512.toml`.

Implementation notes
--------------------

* `cargo check` instead of `cargo test`/`cargo build`. GH-hosted
  `ubuntu-latest` runners have intermittent AVX-512 silicon across VM
  SKUs (Azure D-series mix); a v4-baked binary would SIGILL on a
  non-AVX-512 host. `check` compiles through type/borrow/monomorphization
  without producing a runnable artifact — catches the dispatch-arm
  type mismatches that motivated this PR series in the first place
  (PR #170 CI failure mode).

* Job-level `env: RUSTFLAGS: "-D warnings -Ctarget-cpu=x86-64-v4"`
  overrides the global `RUSTFLAGS="-D warnings"` set at the top of
  `ci.yaml`. Without the override, `.cargo/config-avx512.toml`'s
  rustflags would be ignored — env wins over config file in cargo's
  precedence (the same issue that broke PR #172 with the v3 setting
  in config.toml).

* Two check passes: default features + `hpc-extras`. The latter pulls
  the p64/fractal dep tree which exercises a different slice of the
  AVX-512 codepaths (BF16 RNE, AMX byte-asm). Each runs ~30 s with
  Swatinem cache hit, ~3 min cold.

* Added to the `conclusion` job's `needs` list so a v4 check failure
  blocks merge.

Author: claude

.github/workflows/ci.yaml

@@ -171,6 +171,38 @@ jobs:
       - name: clippy --features rayon
         run: cargo clippy -p ndarray --features rayon --lib -- -D warnings
 
+  tier4-avx512-check:
+    # Phase 6 of the SIMD integration plan (.claude/knowledge/
+    # simd-dispatch-architecture.md). Exercises the AVX-512 dispatch
+    # arm (`#[cfg(target_feature = "avx512f")]` in `src/simd.rs`) so it
+    # doesn't bit-rot under the v3-default cargo config.
+    #
+    # `cargo check` rather than `cargo test`: GH-hosted `ubuntu-latest`
+    # runners may not have AVX-512 silicon (intermittent across SKUs),
+    # so a v4-baked binary would SIGILL at run time. `check` compiles
+    # the AVX-512 code path through the type checker + borrow checker
+    # + monomorphization without producing a runnable artifact —
+    # catches type mismatches and dispatch-arm holes that the v3
+    # default never touches.
+    #
+    # The job-level `RUSTFLAGS` env overrides the global
+    # `RUSTFLAGS="-D warnings"` set at the top of this file so the v4
+    # target-cpu actually applies. Without the override, `.cargo/
+    # config-avx512.toml`'s rustflags would be ignored (env wins over
+    # config file in cargo's precedence).
+    runs-on: ubuntu-latest
+    name: tier4-avx512-check
+    env:
+      RUSTFLAGS: "-D warnings -Ctarget-cpu=x86-64-v4"
+    steps:
+      - uses: actions/checkout@v4
+      - uses: dtolnay/rust-toolchain@stable
+      - uses: Swatinem/rust-cache@v2
+      - name: cargo check (v4 / AVX-512 dispatch arm)
+        run: cargo check -p ndarray --features approx,serde,rayon
+      - name: cargo check (v4 / AVX-512 + hpc-extras)
+        run: cargo check -p ndarray --features approx,serde,rayon,hpc-extras
+
   blas-msrv:
     runs-on: ubuntu-latest
     name: blas-msrv
@@ -269,6 +301,7 @@ jobs:
       - tests
       - native-backend
       - hpc-stream-parallel
+      - tier4-avx512-check
       - miri
       - cross_test
       - cargo-careful