fix(simd_profile): target_arch guards on cpu-* features + std-gate example

Two independent bug fixes for codex P2 on de52a44 and the
no-default-features CI failure:

1) codex P2 — Reject ARM cpu-* on x86 builds (and vice versa).
   Without target_arch guards, `--features cpu-a76` on an x86_64
   build silently routes simd_profile() to A76DotProd, breaking
   the is_x86()/is_aarch64() partitioning and routing callers
   into the wrong dispatch family. Add compile_error! checks
   that fail fast for the current target_arch — same fail-fast
   pattern as the existing _PIN_COUNT mutual-exclusion assert.

2) CI fix — examples/simd_profile_probe.rs uses ndarray::hpc::*
   and ndarray::simd_amx::* which are gated behind the "std"
   feature. On `cargo test --no-default-features` the example
   target still tries to compile, producing E0433 "cannot find
   hpc in ndarray". Add `required-features = ["std"]` to the
   example's Cargo.toml entry so it is skipped when std is
   disabled, matching the existing pattern for ocr_benchmark.

No behavioral change on default builds. Both fixes are
independent of the architectural question about whether cpu-*
features should exist at all (which is for the originating
session to revisit if they want to unify with cpu_ops_for_cpu);
this just makes the existing features less of a footgun.

Author: claude

Cargo.toml

@@ -42,6 +42,10 @@ required-features = ["std"]
 name = "splat3d_flex"
 required-features = ["splat3d"]
 
+[[example]]
+name = "simd_profile_probe"
+required-features = ["std"]
+
 [dependencies]
 num-integer = { workspace = true }
 num-traits = { workspace = true }

src/hpc/simd_profile.rs

@@ -271,6 +271,44 @@ const _: () = assert!(
     "cpu-* cargo features are mutually exclusive: enable at most one (cpu-gnr, cpu-spr, cpu-zen4, cpu-cpl, cpu-tigerlake, cpu-icx, cpu-clx, cpu-skx, cpu-arrowlake, cpu-haswell, cpu-a76, cpu-a72, cpu-a53)"
 );
 
+// ────────────────────────────────────────────────────────────────────
+// target_arch guards (codex P2 closure).
+//
+// Each `cpu-<codename>` pin is only valid on its native silicon
+// family. Without these guards `--features cpu-a76` on an x86_64
+// build would silently route `simd_profile()` to `A76DotProd`,
+// breaking the `is_x86()` / `is_aarch64()` partitioning and routing
+// callers into the wrong dispatch family. Fail fast at compile time
+// instead.
+// ────────────────────────────────────────────────────────────────────
+
+#[cfg(all(
+    not(target_arch = "x86_64"),
+    any(
+        feature = "cpu-gnr",
+        feature = "cpu-spr",
+        feature = "cpu-zen4",
+        feature = "cpu-cpl",
+        feature = "cpu-tigerlake",
+        feature = "cpu-icx",
+        feature = "cpu-clx",
+        feature = "cpu-skx",
+        feature = "cpu-arrowlake",
+        feature = "cpu-haswell",
+    )
+))]
+compile_error!(
+    "x86 cpu-* pinning features (cpu-gnr, cpu-spr, cpu-zen4, cpu-cpl, cpu-tigerlake, cpu-icx, cpu-clx, cpu-skx, cpu-arrowlake, cpu-haswell) require target_arch = \"x86_64\""
+);
+
+#[cfg(all(
+    not(target_arch = "aarch64"),
+    any(feature = "cpu-a76", feature = "cpu-a72", feature = "cpu-a53",)
+))]
+compile_error!(
+    "ARM cpu-* pinning features (cpu-a76, cpu-a72, cpu-a53) require target_arch = \"aarch64\""
+);
+
 /// The compile-time pinned profile, or `None` when runtime detection is in
 /// effect. `Some(_)` exactly when one of the `cpu-*` cargo features is
 /// enabled; mutually exclusive features are enforced by the `_PIN_COUNT`