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@@ -229,7 +229,8 @@ <h5>Introduction to Processor Architecture</h5>
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<span class="badge bg-primary ms-1" style="font-size: 0.7rem;"
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data-tooltip="CPU architecture and system organization.">Arch</span>
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</div>
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<p class="flex-grow-1">Introduction to processor architecture concepts, computer organization
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<p class="flex-grow-1 text-secondary">Introduction to processor architecture concepts, computer
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organization
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fundamentals, and basic computing principles.</p>
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<a href="https://github.com/Amey-Thakur/COMPUTER-ORGANIZATION-AND-ARCHITECTURE-AND-PROCESSOR-ARCHITECTURE-LAB/tree/main/Processor%20Architecture%20Lab/Experiment-1"
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class="launch-link mt-3" target="_blank" rel="noopener noreferrer">
@@ -253,7 +254,8 @@ <h5>Booth's Multiplication Algorithm</h5>
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<span class="badge bg-primary ms-1" style="font-size: 0.7rem;"
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data-tooltip="Signed binary multiplication via two's complement.">Logic</span>
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</div>
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<p class="flex-grow-1">Implementation of Booth's Multiplication Algorithm for signed binary
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<p class="flex-grow-1 text-secondary">Implementation of Booth's Multiplication Algorithm for
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signed binary
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numbers using two's complement arithmetic.</p>
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<a href="https://github.com/Amey-Thakur/COMPUTER-ORGANIZATION-AND-ARCHITECTURE-AND-PROCESSOR-ARCHITECTURE-LAB/tree/main/Processor%20Architecture%20Lab/Experiment-2"
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class="launch-link mt-3" target="_blank" rel="noopener noreferrer">
@@ -277,7 +279,8 @@ <h5>Restoring Division Algorithm</h5>
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<span class="badge bg-primary ms-1" style="font-size: 0.7rem;"
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data-tooltip="High-efficiency binary division algorithm.">Logic</span>
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</div>
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<p class="flex-grow-1">Implementation of Restoring Division Algorithm to perform binary division
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<p class="flex-grow-1 text-secondary">Implementation of Restoring Division Algorithm to perform
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binary division
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of unsigned integers.</p>
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<a href="https://github.com/Amey-Thakur/COMPUTER-ORGANIZATION-AND-ARCHITECTURE-AND-PROCESSOR-ARCHITECTURE-LAB/tree/main/Processor%20Architecture%20Lab/Experiment-3"
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class="launch-link mt-3" target="_blank" rel="noopener noreferrer">
@@ -301,7 +304,8 @@ <h5>Ripple Carry Adder Design</h5>
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<span class="badge bg-primary ms-1" style="font-size: 0.7rem;"
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data-tooltip="Gate-level 4-bit ripple carry adder logic.">Circuit</span>
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</div>
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<p class="flex-grow-1">Design of Half Adder, Full Adder and 4-bit Ripple Carry Adder using
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<p class="flex-grow-1 text-secondary">Design of Half Adder, Full Adder and 4-bit Ripple Carry
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Adder using
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Logisim digital circuit simulator.</p>
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<a href="https://github.com/Amey-Thakur/COMPUTER-ORGANIZATION-AND-ARCHITECTURE-AND-PROCESSOR-ARCHITECTURE-LAB/tree/main/Processor%20Architecture%20Lab/Experiment-4"
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class="launch-link mt-3" target="_blank" rel="noopener noreferrer">
@@ -325,7 +329,8 @@ <h5>ALU Design</h5>
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<span class="badge bg-primary ms-1" style="font-size: 0.7rem;"
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data-tooltip="Arithmetic and bitwise operation control unit.">Circuit</span>
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</div>
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<p class="flex-grow-1">Design and simulation of an Arithmetic Logic Unit (ALU) capable of
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<p class="flex-grow-1 text-secondary">Design and simulation of an Arithmetic Logic Unit (ALU)
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capable of
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performing arithmetic and bitwise operations.</p>
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<a href="https://github.com/Amey-Thakur/COMPUTER-ORGANIZATION-AND-ARCHITECTURE-AND-PROCESSOR-ARCHITECTURE-LAB/tree/main/Processor%20Architecture%20Lab/Experiment-5"
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class="launch-link mt-3" target="_blank" rel="noopener noreferrer">
@@ -349,7 +354,8 @@ <h5>Shift Register Design</h5>
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<span class="badge bg-primary ms-1" style="font-size: 0.7rem;"
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data-tooltip="SISO, PIPO, and bidirectional shift registers.">Circuit</span>
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</div>
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<p class="flex-grow-1">Design of Serial-In Serial-Out (SISO), PIPO, Left Shift and Right Shift
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<p class="flex-grow-1 text-secondary">Design of Serial-In Serial-Out (SISO), PIPO, Left Shift
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and Right Shift
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registers using Flip-Flops.</p>
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<a href="https://github.com/Amey-Thakur/COMPUTER-ORGANIZATION-AND-ARCHITECTURE-AND-PROCESSOR-ARCHITECTURE-LAB/tree/main/Processor%20Architecture%20Lab/Experiment-6"
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class="launch-link mt-3" target="_blank" rel="noopener noreferrer">
@@ -373,7 +379,8 @@ <h5>RAM and ROM Simulation</h5>
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<span class="badge bg-primary ms-1" style="font-size: 0.7rem;"
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data-tooltip="Simulation of RAM and ROM memory units.">Circuit</span>
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</div>
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<p class="flex-grow-1">Simulation of RAM (Random Access Memory) and ROM (Read Only Memory) using
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<p class="flex-grow-1 text-secondary">Simulation of RAM (Random Access Memory) and ROM (Read
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Only Memory) using
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Logisim digital circuit simulator.</p>
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<a href="https://github.com/Amey-Thakur/COMPUTER-ORGANIZATION-AND-ARCHITECTURE-AND-PROCESSOR-ARCHITECTURE-LAB/tree/main/Processor%20Architecture%20Lab/Experiment-7"
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class="launch-link mt-3" target="_blank" rel="noopener noreferrer">
@@ -396,7 +403,8 @@ <h5>Case Study: ISA, PCI and USB</h5>
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<span class="badge bg-primary ms-1" style="font-size: 0.7rem;"
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data-tooltip="Study of ISA, PCI, and modern USB standards.">Case Study</span>
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</div>
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<p class="flex-grow-1">Case study on different bus architectures including ISA, PCI and USB
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<p class="flex-grow-1 text-secondary">Case study on different bus architectures including ISA,
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PCI and USB
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standards in computer systems.</p>
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<a href="https://github.com/Amey-Thakur/COMPUTER-ORGANIZATION-AND-ARCHITECTURE-AND-PROCESSOR-ARCHITECTURE-LAB/tree/main/Processor%20Architecture%20Lab/Experiment-8"
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class="launch-link mt-3" target="_blank" rel="noopener noreferrer">
@@ -419,7 +427,8 @@ <h5>Case Study: Multi-Core Processors</h5>
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<span class="badge bg-primary ms-1" style="font-size: 0.7rem;"
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data-tooltip="Multi-core and parallel processing study.">Case Study</span>
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</div>
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<p class="flex-grow-1">Case study on Multi-Core Processors, parallel processing architectures
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<p class="flex-grow-1 text-secondary">Case study on Multi-Core Processors, parallel processing
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architectures
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and performance optimization techniques.</p>
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<a href="https://github.com/Amey-Thakur/COMPUTER-ORGANIZATION-AND-ARCHITECTURE-AND-PROCESSOR-ARCHITECTURE-LAB/tree/main/Processor%20Architecture%20Lab/Experiment-9"
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class="launch-link mt-3" target="_blank" rel="noopener noreferrer">
@@ -442,7 +451,8 @@ <h5>Types of Interrupts & Handling</h5>
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<span class="badge bg-primary ms-1" style="font-size: 0.7rem;"
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data-tooltip="Hardware and software interrupt handling logic.">Case Study</span>
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</div>
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<p class="flex-grow-1">Study of types of Interrupts (hardware, software, maskable) and
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<p class="flex-grow-1 text-secondary">Study of types of Interrupts (hardware, software,
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maskable) and
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techniques to handle interrupts in processors.</p>
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<a href="https://github.com/Amey-Thakur/COMPUTER-ORGANIZATION-AND-ARCHITECTURE-AND-PROCESSOR-ARCHITECTURE-LAB/tree/main/Processor%20Architecture%20Lab/Experiment-10"
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class="launch-link mt-3" target="_blank" rel="noopener noreferrer">

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