@@ -118,49 +118,49 @@ namespace xsimd
118118 const auto cpuid = xsimd::x86_cpu_id::read ();
119119 auto xcr0 = xsimd::x86_xcr0::make_false ();
120120
121- bool sse_state_os_enabled = true ;
121+ bool sse_enabled = true ;
122122 // AVX and AVX512 strictly require OSXSAVE to be enabled by the OS.
123123 // If OSXSAVE is disabled (e.g., via bcdedit /set xsavedisable 1),
124124 // AVX state won't be preserved across context switches, so AVX cannot be used.
125- bool avx_state_os_enabled = false ;
126- bool avx512_state_os_enabled = false ;
125+ bool avx_enabled = false ;
126+ bool avx512_enabled = false ;
127127
128128 if (cpuid.osxsave ())
129129 {
130130 xcr0 = xsimd::x86_xcr0::read ();
131131
132- sse_state_os_enabled = xcr0.sse_state_os_enabled ();
133- avx_state_os_enabled = xcr0.avx_state_os_enabled ();
134- avx512_state_os_enabled = xcr0.avx512_state_os_enabled ();
132+ sse_enabled = xcr0.sse_enabled ();
133+ avx_enabled = xcr0.avx_enabled ();
134+ avx512_enabled = xcr0.avx512_enabled ();
135135 }
136136
137- sse2 = cpuid.sse2 () && sse_state_os_enabled ;
138- sse3 = cpuid.sse3 () && sse_state_os_enabled ;
139- ssse3 = cpuid.ssse3 () && sse_state_os_enabled ;
140- sse4_1 = cpuid.sse4_1 () && sse_state_os_enabled ;
141- sse4_2 = cpuid.sse4_2 () && sse_state_os_enabled ;
142- fma3_sse42 = cpuid.fma3 () && sse_state_os_enabled ;
137+ sse2 = cpuid.sse2 () && sse_enabled ;
138+ sse3 = cpuid.sse3 () && sse_enabled ;
139+ ssse3 = cpuid.ssse3 () && sse_enabled ;
140+ sse4_1 = cpuid.sse4_1 () && sse_enabled ;
141+ sse4_2 = cpuid.sse4_2 () && sse_enabled ;
142+ fma3_sse42 = cpuid.fma3 () && sse_enabled ;
143143
144144 // sse4a not implemented in cpu_id yet
145145 // xop not implemented in cpu_id yet
146146
147- avx = cpuid.avx () && avx_state_os_enabled ;
147+ avx = cpuid.avx () && avx_enabled ;
148148 fma3_avx = avx && fma3_sse42;
149- fma4 = cpuid.fma4 () && avx_state_os_enabled ;
150- avx2 = cpuid.avx2 () && avx_state_os_enabled ;
151- avxvnni = cpuid.avxvnni () && avx_state_os_enabled ;
149+ fma4 = cpuid.fma4 () && avx_enabled ;
150+ avx2 = cpuid.avx2 () && avx_enabled ;
151+ avxvnni = cpuid.avxvnni () && avx_enabled ;
152152 fma3_avx2 = avx2 && fma3_sse42;
153153
154- avx512f = cpuid.avx512f () && avx512_state_os_enabled ;
155- avx512cd = cpuid.avx512cd () && avx512_state_os_enabled ;
156- avx512dq = cpuid.avx512dq () && avx512_state_os_enabled ;
157- avx512bw = cpuid.avx512bw () && avx512_state_os_enabled ;
158- avx512er = cpuid.avx512er () && avx512_state_os_enabled ;
159- avx512pf = cpuid.avx512pf () && avx512_state_os_enabled ;
160- avx512ifma = cpuid.avx512ifma () && avx512_state_os_enabled ;
161- avx512vbmi = cpuid.avx512vbmi () && avx512_state_os_enabled ;
162- avx512vbmi2 = cpuid.avx512vbmi2 () && avx512_state_os_enabled ;
163- avx512vnni_bw = cpuid.avx512vnni_bw () && avx512_state_os_enabled ;
154+ avx512f = cpuid.avx512f () && avx512_enabled ;
155+ avx512cd = cpuid.avx512cd () && avx512_enabled ;
156+ avx512dq = cpuid.avx512dq () && avx512_enabled ;
157+ avx512bw = cpuid.avx512bw () && avx512_enabled ;
158+ avx512er = cpuid.avx512er () && avx512_enabled ;
159+ avx512pf = cpuid.avx512pf () && avx512_enabled ;
160+ avx512ifma = cpuid.avx512ifma () && avx512_enabled ;
161+ avx512vbmi = cpuid.avx512vbmi () && avx512_enabled ;
162+ avx512vbmi2 = cpuid.avx512vbmi2 () && avx512_enabled ;
163+ avx512vnni_bw = cpuid.avx512vnni_bw () && avx512_enabled ;
164164 avx512vnni_vbmi2 = avx512vbmi2 && avx512vnni_bw;
165165 }
166166 };
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