README completed

Author: ReinhardKeil

Documentation/image/Run_RPS_AppKit-E8.png

@@ -1,3 +1,8 @@
+[![Build and Run RPS on Simulator](https://github.com/Arm-Examples/ModelNova/actions/workflows/Test_RPS_SSE-320-U85.yml/badge.svg)](https://github.com/Arm-Examples/ModelNova/actions/workflows/Test_RPS_SSE-320-U85.yml)
+[![Build RPS for AppKit-E8 Hardware](https://github.com/Arm-Examples/ModelNova/actions/workflows/Build_RPS_AppKit-E8.yml/badge.svg)](https://github.com/Arm-Examples/ModelNova/actions/workflows/Build_RPS_AppKit-E8.yml)
+[![Run RPS on AppKit-E8 Hardware](https://github.com/Arm-Examples/ModelNova/actions/workflows/Run_RPS_AppKit-E8.yml/badge.svg)](https://github.com/Arm-Examples/ModelNova/actions/workflows/Run_RPS_AppKit-E8.yml)
+[![Build RPS Context Variants](https://github.com/Arm-Examples/ModelNova/actions/workflows/Build_RPS_Variants.yml/badge.svg)](https://github.com/Arm-Examples/ModelNova/actions/workflows/Build_RPS_Variants.yml)
+
 **Work in Progress**
 
 ![ModelNova Fusion Studio](./Documentation/image/ModelNova.png "ModelNova Fusion Studio")
@@ -68,21 +73,94 @@ The diagram below illustrates the RPS application architecture. During algorithm
 
     While Fusion Studio supports multiple workspace creation methods (Scratch, Starter Pack, AI Assist), the **ML workflow remains identical for all workspaces**.
 
-## Test with SystemView
+## Analyze Timing with SystemView
+
+[SEGGER SystemView](https://www.segger.com/products/development-tools/systemview/) can be used for timing analysis. The application includes annotations that let you measure the timing of different compute blocks, as shown below.
+
+![System View Output](./Documentation/image/SystemView2.png)
+
+### Capture SystemView Data with J-Link
+
+> [!NOTE]
+> This configuration is used for interactive debugging with the on-board J-Link adapter of the AppKit-E8.
+
+- Open `Manage Solution Settings`, select `Target Set: J-Link` and download the application to the AppKit-E8.
+- Start the [SystemView tool](https://www.segger.com/downloads/systemview/) on the host computer and:
+    - Select Target - Recorder Configuration and use the following settings:
+        - SystemView Recorder: J-Link
+        - J-Link Connection: USB
+        - Target Connection: AE822FA0E5597BS0_M55_HP
+        - RTT Control Block Detection: Address of .bss._SEGGER_RTT in linker map file (i.e. 0x02002200)
+
+### Capture SystemView Data with PyOCD
 
-## Contiguous Integration (CI)
+> [!NOTE]
+> This configuration is used for CI testing with [Run_RPS_AppKit-E8](./.github/workflows/Run_RPS_AppKit-E8.yml). The relevant RTT and SystemView settings are part of [`AppKit-E8_USB/SDS.csolution.yml`](./RockPaperScissors/AppKit-E8_USB/SDS.csolution.yml). It requires a CMSIS-DAP debug adapter that is connected to the JTAG port of the AppKit-E8.
 
-This repository uses [CI Workflows](https://github.com/Arm-Examples/.github/blob/main/profile/CICD.md) listed below to build artifacts and verify projects. Examples are verified with the build system of Keil Studio that uses the CMSIS-Toolbox and CMake. Using this toolchain supports CI with:
+- Open `Manage Solution Settings`, select `Target Set: HIL` and download the application to the AppKit-E8.
+- Start the pyOCD Run task (Terminal - Run Task... - pyOCD Run). You may terminate pyOCD using the keyboard. This should generate the following output:
 
-Tool installation based on a single vcpkg-configuration.json file for desktop and CI environments.
-CMSIS solution files (*.csolution.yml) that enable seamless builds in CI, for example using GitHub actions.
+```txt
+  0002041 W Skipping CoreSight discovery for AHB5-AP@0x40000 because it is disabled [ap]
+  0002223 I RTT channel 1 configuration for core 0: mode=systemview-server, port=19021 [rtt_manager]
+  0002223 W RTT for core 1: no channels configured; RTT disabled [rtt_manager]
+  0002226 I Run server started for M55_HP (core 0); STDIO mode: console; RTT: enabled [run_cmd]
+  0002227 I Run server started for M55_HE (core 1); STDIO mode: off; RTT: disabled [run_cmd]
+  0002231 E Error writing RTT down channel 1: SWD/JTAG communication failure (WAIT ACK) [rtt_server]
+  0002245 W Target core 1 unexpectedly halted at pc=0x00000ed2 [run_cmd]
+  0043783 I KeyboardInterrupt received; shutting down Run servers [run_cmd]
+```
 
-CI Workflow                                                          | Description
+The `pyOCD run` command captures the file `./out/SDS+AppKit-E8-U85.SVDat`. Open that file with the SystemView application on the host computer to view the recording.
+
+## Continuous Integration (CI)
+
+This repository uses the [CI workflows](https://github.com/Arm-Examples/.github/blob/main/profile/CICD.md) listed below to build artifacts and verify projects. Examples are verified with the Keil Studio build system, which uses CMSIS-Toolbox and CMake. This toolchain supports CI by:
+
+- Installing tools from a single [vcpkg-configuration.json](./vcpkg-configuration.json) file for desktop and CI environments.
+- Using CMSIS solution files (`*.csolution.yml`) to enable seamless builds in CI, for example with GitHub Actions.
+
+[GitHub Action](./actions)                                                        | Description
 :--------------------------------------------------------------------|:---------------------------------------
-[Test_RPS_SSE-320-U85](./.github/workflows/Test_RPS_SSE-320-U85.yml) | Build and run image with SDS data input on FVP simulation model
-[Build_RPS_AppKit-E8](./.github/workflows/Build_RPS_AppKit-E8.yml)   | Build image with SystemView enabled for testing on hardware
-[Run_RPS_AppKit-E8](./.github/workflows/Run_RPS_AppKit-E8.yml)       | Run image on hardware with SDSIO-Server and SystemView for timing analysis
-[Build_Variants](./.github/workflows/Build_Variants.yml)             | Ensure that everything builds; Build the different context variants: `project.build-type+target-type`
+[Test_RPS_SSE-320-U85.yml](./.github/workflows/Test_RPS_SSE-320-U85.yml) | Build and run image with SDS data input on FVP simulation model
+[Build_RPS_AppKit-E8.yml](./.github/workflows/Build_RPS_AppKit-E8.yml)   | Build image with SystemView enabled for testing on [target hardware](./Documentation/README.md#target-hardware).
+[Run_RPS_AppKit-E8.yml](./.github/workflows/Run_RPS_AppKit-E8.yml)       | Run image on hardware with SDSIO-Server and SystemView for timing analysis
+[Build_Variants.yml](./.github/workflows/Build_Variants.yml)             | Ensure that everything builds; Build the different context variants: `project.build-type+target-type`
+
+### Build and Run Image on FVP Simulation Model
+
+The action [Test_RPS_SSE-320-U85.yml](./.github/workflows/Test_RPS_SSE-320-U85.yml) builds and executes the application on the FVP simulation model. The same commands can be executed in the IDE by selecting the target type `SSE-320-U85` in the Manage Solution dialog (which uses a simulation model compatible with the AppKit-E8).
+
+The action executes the following commands to build and test the application.
+
+```cmd
+>cbuild SDS.csolution.yml --active SSE-320-U85 --packs
+>
+>FVP_Corstone_SSE-320 -f ./Board/Corstone-320/fvp_config.txt -a ./out/AlgorithmTest/SSE-320-U85/Debug/AlgorithmTest.axf --simlimit 120
+```
+
+> [!TIP]
+> You can clone the repository and run the workflow and examine the test results in detail.
+
+The picture below shows the output of the [Test_RPS_SSE-320-U85.yml action](./actions/workflows/Test_RPS_SSE-320-U85.yml). The artifacts file `RPS_SSE-320-U85_FVP` contains the `out` directory with the generated image and new `SDS recordings` captured during playback (`*.p.sds` files) along with the simulation log file (`sdsio.log`).
+
+![GitHub Action Output: Test_RPS_SSE-320-U85.yml](./Documentation/image/Test_RPS_SSE-320-U85.png)
+
+### Build and Run Image on Target Hardware
+
+The [Build_RPS_AppKit-E8.yml](./.github/workflows/Build_RPS_AppKit-E8.yml) workflow executes on a GitHub-hosted runner and generates the image with SystemView enabled for testing on [target hardware](./Documentation/README.md#target-hardware). Once generated, the image is stored as the artifact `RPS_AppKit-E8-U85_HIL`, which is then downloaded by [Run_RPS_AppKit-E8.yml](./.github/workflows/Run_RPS_AppKit-E8.yml).
+
+The [Run_RPS_AppKit-E8.yml](./.github/workflows/Run_RPS_AppKit-E8.yml) workflow executes on a Raspberry Pi (RPi). It therefore requires [setting up and configuring a self-hosted GitHub Runner on Raspberry Pi 5](https://github.com/Arm-Examples/.github/blob/main/profile/RPI_GH_Runner.md). The AppKit-E8 is connected to the RPi as shown below.
+
+![Hardware Setup of Raspberry Pi5](./Documentation/image/Setup_RPi5.png)
+
+The [Run_RPS_AppKit-E8.yml](./.github/workflows/Run_RPS_AppKit-E8.yml) workflow is triggered when [Build_RPS_AppKit-E8.yml](./.github/workflows/Build_RPS_AppKit-E8.yml) stores a new `RPS_AppKit-E8-U85_HIL` artifact. pyOCD connects through a CMSIS-DAP debug unit to download and execute the image on the AppKit-E8. During execution, pyOCD captures RTT `printf` output and the SystemView data file. The SDSIO-Server (also running on the RPi) uses the configuration file `SDS.sdsio.yml`. The `play:` node defines the SDS data files that are streamed for playback and recording.
+
+Once the test completes, the RTT output and SystemView data file (captured with pyOCD), and the recorded SDS data files with extension `.p.sds` (captured with SDSIO-Server), are uploaded as artifacts.
+
+The picture below shows the output of the [Run_RPS_AppKit-E8.yml action](./.actions/workflows/Run_RPS_AppKit-E8.yml). The artifact `RPS_AppKit-E8-U85_HIL` contains the generated image, and the run uploads the log file `sdsio-server.log` together with new `SDS recordings` captured during playback (`*.p.sds` files).
+
+![GitHub Action Output: Run_RPS_AppKit-E8.yml](./Documentation/image/Run_RPS_AppKit-E8.png)
 
 ## Issues or Questions
 

Documentation/image/Setup_RPi5.png

@@ -17,7 +17,8 @@ solution:
   packs:
     - pack: ARM::SDS@^3.0.0-0
     - pack: AlifSemiconductor::Ensemble@^2.2.0-0
-
+    - pack: ARM::SSE_320_BSP@1.1.0
+    
   # List different hardware targets that are used to deploy the solution.
   target-types:
     - type: AppKit-E8-U85
@@ -104,4 +105,4 @@ solution:
       target: AppKit-E8-U85@HIL # explicit target-type name (default: first target-type)
     simulator:
       # simulator target for testing
-      target: SSE-320-U85       # explicit target-type name (default: last target-type, check if debugger name: Arm-FVP)
+      target: SSE-320-U85 # explicit target-type name (default: last target-type, check if debugger name: Arm-FVP)