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Copy file name to clipboardExpand all lines: content/learning-paths/automotive/zenacssdebug/config.md
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layout: "learningpathall"
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---
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## Debug configuration
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## Set up a debug configuration for the Zena CSS FVP
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Now you'll walk through setting up an Arm Development Studio debug configuration for the Zena CSS FVP using the Iris interface. This is a fast, reliable path to a working configuration.
Copy file name to clipboardExpand all lines: content/learning-paths/automotive/zenacssdebug/connect.md
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layout: "learningpathall"
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---
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## Debug Connections
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## Overview
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You are now ready to create debug connections for each of the sub-systems within Zena CSS. In this section you will create the connections, which will be subsequently enhanced in the following section. You may prefer to fully set up one such connection before moving to others.
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- Use **File > New > Model Connection**.
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- Select your **Zena_CSS_FVP** model.
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- In **Edit configuration**, expand **Linux Kernel Debug** and choose **ARM_Cortex-A720AEx16 SMP Cluster 1**.
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This connects to all 16 Cortex-A720AE processors described in the FVP. Only cores 0 to 3 are used by the default Linux configuration
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This connects to all 16 Cortex-A720AE processors described in the FVP. Only cores 0 to 3 are used by the default Linux configuration.
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To learn more about OS awareness in Arm Debugger, see the [OS awareness documentation](https://developer.arm.com/documentation/101470/latest/Debugging-Embedded-Systems/About-OS-awareness).
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## Next steps: enhance connections (symbols, reset, semihosting)
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{{% notice Next %}}
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In the next section, you will enhance these connections with symbol loading, reset behavior, semihosting, and Linux kernel awareness settings.
Copy file name to clipboardExpand all lines: content/learning-paths/automotive/zenacssdebug/primarycompute.md
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---
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# User change
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title: "Debug Primary Compute and Linux"
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title: "Debug primary compute and Linux"
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weight: 8# 1 is first, 2 is second, etc.
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# Do not modify these elements
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layout: "learningpathall"
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---
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## Debug Primary Compute
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## Debug primary compute
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The Primary Compute application processors (`Cortex-A720AE`) are the final processors to be enabled.
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Symbol loading is Exception Level–aware. If execution changes Exception Level, load symbols into the corresponding EL address space. For example, the processors start in EL3 and transition to EL2N when the Linux kernel is enabled.
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{{% /notice %}}
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## Debug the Linux kernel with OS awareness (SMP)
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## Debug the Linux kernel with OS awareness (symmetric multiprocessing)
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Switch to the `Primary_Linux.launch` connection you created earlier to enable Arm Development Studio OS awareness for the Linux kernel. Load the kernel symbols and set source mapping if your kernel sources are located outside the default paths:
Copy file name to clipboardExpand all lines: content/learning-paths/automotive/zenacssdebug/rse.md
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layout: "learningpathall"
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---
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## Overview
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You'll now move on to debug the initial code that runs on the Runtime Security Engine (RSE) based on Cortex-M55 in the Zena CSS FVP. You will launch the model with the Iris debug server, connect from Arm Development Studio, load Trusted Firmware-M (TF‑M) symbols, and step from reset.
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## Launch the FVP and hold at reset
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Load TF‑M symbols and map sources:
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- In **Debug Control**, open the pane menu and choose **Load...**
Copy file name to clipboardExpand all lines: content/learning-paths/automotive/zenacssdebug/safetyisland.md
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---
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## Debug Safety Island code from beginning
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The Safety Island (Cortex-R82AE) is released from reset by the RSE code, and so the RSE code must proceed to that point before the Safety Island core can execute.
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The Safety Island subsystem based on the Cortex-R82AE is released from reset by RSE code. To debug Safety Island from first instruction, you must let the RSE (Cortex‑M55) code reach the point where it enables Safety Island on the Zena CSS FVP.
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###Launch FVP
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## Launch the FVP and reconnect RSE
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If necessary, restart the FVP in the reset state as before, and reconnect `RSE`.
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If necessary, start (or restart) the FVP held at reset and reconnect the RSE model connection in Arm Development Studio:
Set up the `SI` connection in a similar way as the `RSE` connection. Use the following commands in the `Debugger` pane. This will load debug symbols and perform the necessary path substitution. You can then set a breakpoint on the entry of the `SI` code, `arch_exception_reset`.
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{{% notice Tip %}}
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For remote debugging, add `-A` and ensure the chosen Iris port (default `7100`) is reachable.
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{{% /notice %}}
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## Connect the debugger to Safety Island (Cortex-R82AE)
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```text
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Configure the **SI** model connection similarly to **RSE**. Add the following **Debugger commands** to load symbols, set up source path substitution, and break at the Safety Island reset entry (`arch_exception_reset`):
set substitute-path /usr/src/debug/scp-firmware/2.14.0/ /arm-auto-solutions/build/tmp_baremetal/work/fvp_rd_aspen-poky-linux/scp-firmware/2.14.0/git/
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b arch_exception_reset
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```
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{{% notice Note %}}
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Exact paths may differ for your set up.
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Paths vary by environment. Use your actual build output and source locations when adding symbols or configuring path substitution.
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{{% /notice %}}
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###Start execution
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## Start execution to release Safety Island
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Select the `RSE` connection in the `Debug Control` pane, and start execution (this will be unavailable in the `SI` connection, as that is currently powered down).
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In **Debug Control**, select the **RSE** connection and start execution (run). The **SI** connection remains unavailable to run until Safety Island is powered up.
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The `RSE` code will run until the point that the `SI` is enabled. This is reflected in the output log.
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When RSE enables Safety Island, you will see a log message like:
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```output
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```output
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[INF] BL2: SI CL0 post load start
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```
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####Full output log
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## Full output log
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The full output lof is shown here for your reference:
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The full output log is shown here for your reference:
Copy file name to clipboardExpand all lines: content/learning-paths/automotive/zenacssdebug/zena.md
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layout: "learningpathall"
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# Arm Zena Compute Subsystem
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##Arm Zena Compute Subsystem
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The Arm Zena Compute Subsystem (CSS) consists of a high-performance Arm Cortex-A720AE application processor system (primary compute), augmented with an Arm Cortex-R82AE–based Safety Island (SI) and a real-time domain to host additional system-safety monitoring and real-time services.
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Here the default **Arm Automotive Solutions Demo** build is used.
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{{% notice Note %}}
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The focus of this Learning Path primarily is to demonstrate how to debug the software stack.
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The primary focus of this Learning Path is to demonstrate how to debug the software stack.
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{{% /notice %}}
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## Verify the build and execution
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Arm Development Studio is a commercial, license-managed product. For installation and setup instructions, see the [Arm Development Studio Install Guide](/install-guides/armds/).
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Launch the IDE. It’s recommended that you create a new workspace folder.
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Launch the IDE and create a new workspace folder.
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If you’re prompted by the launcher (this prompt is disabled by default), create a new folder there.
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