|
| 1 | +--- |
| 2 | +title: Use TF-A extra build options to build cpu_ops into images |
| 3 | +weight: 4 |
| 4 | + |
| 5 | +### FIXED, DO NOT MODIFY |
| 6 | +layout: learningpathall |
| 7 | +--- |
| 8 | + |
| 9 | +### 1. Why build cpu_ops into images |
| 10 | + |
| 11 | +If you build the software without any modification, you might get the following error message after running the software stack: |
| 12 | + |
| 13 | +``` |
| 14 | +ASSERT: File lib/cpus/aarch64/cpu_helpers.S Line 00035 |
| 15 | +``` |
| 16 | + |
| 17 | +The previous error message is issued because the TF-A does not build the cpu_ops into the images: |
| 18 | + |
| 19 | +``` |
| 20 | +31 /* Get the matching cpu_ops pointer */ |
| 21 | +
|
| 22 | +32 bl get_cpu_ops_ptr |
| 23 | +
|
| 24 | +33 #if ENABLE_ASSERTIONS |
| 25 | +
|
| 26 | +34 cmp x0, #0 |
| 27 | +
|
| 28 | +35 ASM_ASSERT(ne) |
| 29 | +
|
| 30 | +36 #endif |
| 31 | +``` |
| 32 | + |
| 33 | + |
| 34 | +The cpu_ops are defined in the source file as follows: |
| 35 | + |
| 36 | +``` |
| 37 | +lib/cpus/aarch64/cortex_a510.S |
| 38 | +lib/cpus/aarch64/cortex_a53.S |
| 39 | +lib/cpus/aarch64/cortex_a55.S |
| 40 | +lib/cpus/aarch64/cortex_a57.S |
| 41 | +lib/cpus/aarch64/cortex_a65.S |
| 42 | +lib/cpus/aarch64/cortex_a65ae.S |
| 43 | +lib/cpus/aarch64/cortex_a710.S |
| 44 | +lib/cpus/aarch64/cortex_a715.S |
| 45 | +lib/cpus/aarch64/cortex_a72.S |
| 46 | +lib/cpus/aarch64/cortex_a73.S |
| 47 | +``` |
| 48 | + |
| 49 | +Check the Makefile (plat/arm/board/fvp/platform.mk) of the FVP platform. You can find the following code: |
| 50 | + |
| 51 | +``` |
| 52 | +ifeq (${HW_ASSISTED_COHERENCY}, 0) |
| 53 | +# Cores used without DSU |
| 54 | + FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \ |
| 55 | + lib/cpus/aarch64/cortex_a53.S \ |
| 56 | + lib/cpus/aarch64/cortex_a57.S \ |
| 57 | + lib/cpus/aarch64/cortex_a72.S \ |
| 58 | + lib/cpus/aarch64/cortex_a73.S |
| 59 | +else |
| 60 | +# Cores used with DSU only |
| 61 | + ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) |
| 62 | + # AArch64-only cores |
| 63 | + FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \ |
| 64 | + lib/cpus/aarch64/cortex_a76ae.S \ |
| 65 | + lib/cpus/aarch64/cortex_a77.S \ |
| 66 | + lib/cpus/aarch64/cortex_a78.S \ |
| 67 | + lib/cpus/aarch64/neoverse_n_common.S \ |
| 68 | + lib/cpus/aarch64/neoverse_n1.S \ |
| 69 | + lib/cpus/aarch64/neoverse_n2.S \ |
| 70 | + lib/cpus/aarch64/neoverse_e1.S \ |
| 71 | + lib/cpus/aarch64/neoverse_v1.S \ |
| 72 | + lib/cpus/aarch64/neoverse_v2.S \ |
| 73 | + lib/cpus/aarch64/cortex_a78_ae.S \ |
| 74 | + lib/cpus/aarch64/cortex_a510.S \ |
| 75 | + lib/cpus/aarch64/cortex_a710.S \ |
| 76 | + lib/cpus/aarch64/cortex_a715.S \ |
| 77 | + lib/cpus/aarch64/cortex_x3.S \ |
| 78 | + lib/cpus/aarch64/cortex_a65.S \ |
| 79 | + lib/cpus/aarch64/cortex_a65ae.S \ |
| 80 | + lib/cpus/aarch64/cortex_a78c.S \ |
| 81 | + lib/cpus/aarch64/cortex_hayes.S \ |
| 82 | + lib/cpus/aarch64/cortex_hunter.S \ |
| 83 | + lib/cpus/aarch64/cortex_x2.S \ |
| 84 | + lib/cpus/aarch64/neoverse_poseidon.S |
| 85 | + endif |
| 86 | + # AArch64/AArch32 cores |
| 87 | + FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \ |
| 88 | + lib/cpus/aarch64/cortex_a75.S |
| 89 | +endif |
| 90 | +``` |
| 91 | + |
| 92 | +HW_ASSISTED_COHERENCY = 0 and CTX_INCLUDE_AARCH32_REGS =1 are default build options. |
| 93 | + |
| 94 | +### 2. Required build options |
| 95 | + |
| 96 | +Building the cpu_ops into the TF-A image requires different build options, depending on the CPU type. For example, different platforms require different build options when building the TF-A: |
| 97 | + |
| 98 | +* For the A55 CPU FVP, add the HW_ASSISTED_COHERENCY=1 and USE_COHERENT_MEM=0 build options. |
| 99 | +* For the A78 CPU FVP, add the HW_ASSISTED_COHERENCY=1, USE_COHERENT_MEM=0, and CTX_INCLUDE_AARCH32_REGS=0 build options. |
| 100 | +* For the A53 CPU FVP, you do not need extra build options. |
| 101 | + |
| 102 | +Note: The build option USE_COHERENT_MEM cannot be enabled with HW_ASSISTED_COHERENCY=1. |
| 103 | + |
| 104 | + |
| 105 | +### 3. Steps to build cpu_ops into the TF-A image |
| 106 | + |
| 107 | +Perform the following steps to build cpu_ops into the TF-A image: |
| 108 | + |
| 109 | +3.1 Modify the following build script to add build options. The [Arm reference software stack](https://gitlab.arm.com/arm-reference-solutions/arm-reference-solutions-docs/-/blob/master/docs/aemfvp-a/user-guide.rst) uses the [build-scripts](https://gitlab.arm.com/arm-reference-solutions/build-scripts) to build the TF-A. |
| 110 | + |
| 111 | +``` |
| 112 | +build-scripts/ configs/aemfvp-a/aemfvp-a |
| 113 | +``` |
| 114 | + |
| 115 | +3.2 Add TF-A build options, depending on the CPU type. For example: |
| 116 | + |
| 117 | +* For A55 CPU FVP, add the following line: |
| 118 | + |
| 119 | +``` |
| 120 | +ARM_TF_BUILD_FLAGS="$ARM_TF_BUILD_FLAGS HW_ASSISTED_COHERENCY=1 USE_COHERENT_MEM=0 " |
| 121 | +``` |
| 122 | + |
| 123 | +* For A78 CPU FVP, add the following line: |
| 124 | + |
| 125 | +``` |
| 126 | +ARM_TF_BUILD_FLAGS="$ARM_TF_BUILD_FLAGS HW_ASSISTED_COHERENCY=1 USE_COHERENT_MEM=0 CTX_INCLUDE_AARCH32_REGS=0" |
| 127 | +``` |
| 128 | + |
| 129 | +3.3 Rebuild the TF-A by using the following commands: |
| 130 | + |
| 131 | +``` |
| 132 | +./build-scripts/build-arm-tf.sh -p aemfvp-a -f busybox clean |
| 133 | +
|
| 134 | +./build-scripts/build-arm-tf.sh -p aemfvp-a -f busybox build |
| 135 | +``` |
| 136 | + |
| 137 | +3.4 Package the built TF-A into the BusyBox disk image by using the following command: |
| 138 | + |
| 139 | +``` |
| 140 | +./build-scripts/aemfvp-a/build-test-busybox.sh -p aemfvp-a package |
| 141 | +``` |
| 142 | + |
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