Merge pull request #809 from odidev/cadence_updates

ranimandepudi · web-flow · commit 3f66731fdb9f · 2025-12-15T11:44:04.000-06:00
Update Cadence Products
diff --git a/content/commercial_packages/EMX.md b/content/commercial_packages/EMX.md
@@ -5,12 +5,12 @@ category: EDA
 description: Cadence EMX Designer is a fast, flexible tool for synthesizing and optimizing passive components, generating accurate, DRC-clean PCells for inductors, transformers, and other devices at technology nodes down to 3nm, using EMX’s proven 3D planar solver.
 product_url: https://www.cadence.com/en_US/home/tools/system-analysis/em-solver/emx-designer.html
 works_on_arm: true
-release_date_on_arm: 2025/12/31
+release_date_on_arm: 2025/12/04
 
 
 optional_info:
     homepage_url: https://www.cadence.com/en_US/home/tools/system-analysis/em-solver/emx-designer.html
-    support_caveats: Arm (AArch64) support is planned for Q4 2025 according to Cadence’s platform support roadmap. For early-access builds, contact arm-ecosystem@cadence.com.
+    support_caveats: New customers interested in this product should contact Cadence at arm-ecosystem@cadence.com to request access.
     alternative_options:
     getting_started_resources:
         official_docs: https://www.cadence.com/en_US/home/resources/datasheets/emx-designer-ds.html
diff --git a/content/commercial_packages/Liberate.md b/content/commercial_packages/Liberate.md
@@ -9,7 +9,7 @@ release_date_on_arm: 2020/02/21
 
 optional_info:
     homepage_url: https://www.cadence.com/en_US/home/tools/custom-ic-analog-rf-design/library-characterization/liberate-trio-characterization-suite.html
-    support_caveats:
+    support_caveats: New customers interested in this product should contact Cadence at arm-ecosystem@cadence.com to request access.
     alternative_options:
     getting_started_resources:
         official_docs: https://www.cadence.com/en_US/home/resources/datasheets/liberate-trio-characterization-suite-ds.html
diff --git a/content/commercial_packages/Spectre.md b/content/commercial_packages/Spectre.md
@@ -9,7 +9,7 @@ release_date_on_arm: 2024/09/30
 
 optional_info:
     homepage_url: https://www.cadence.com/en_US/home/tools/custom-ic-analog-rf-design/circuit-simulation/spectre-x-simulator.html
-    support_caveats:
+    support_caveats: New customers interested in this product should contact Cadence at arm-ecosystem@cadence.com to request access.
     alternative_options:
     getting_started_resources:
         official_docs: https://www.cadence.com/en_US/home/resources/white-papers/revolution-by-evolution-getting-to-the-next-technology-breakthrough-in-analog-simulation-wp.html
diff --git a/content/commercial_packages/celcius.md b/content/commercial_packages/celcius.md
@@ -5,12 +5,12 @@ category: EDA
 description: Cadence Celsius Thermal Solver is an electrothermal co-simulation platform for chips, packages, boards, and systems, enabling early detection and mitigation of thermal issues to improve reliability and reduce design iterations.
 product_url: https://www.cadence.com/en_US/home/tools/system-analysis/thermal-solutions/celsius-thermal-solver.html
 works_on_arm: true
-release_date_on_arm: 2025/12/31
+release_date_on_arm: 2025/12/04
 
 
 optional_info:
     homepage_url: https://www.cadence.com/en_US/home/tools/system-analysis/thermal-solutions/celsius-thermal-solver.html
-    support_caveats: Arm support is coming in 2025-Q4. For access to early releases, please contact arm-ecosystem@cadence.com
+    support_caveats: New customers interested in this product should contact Cadence at arm-ecosystem@cadence.com to request access.
     alternative_options:
     getting_started_resources:
         official_docs: https://www.cadence.com/en_US/home/resources/datasheets/secured/celsius-thermal-ds.html
diff --git a/content/commercial_packages/certus.md b/content/commercial_packages/certus.md
@@ -5,12 +5,12 @@ category: EDA
 description: Cadence Certus Closure Solution is the industry’s first fully automated, massively parallel environment for full-chip optimization and signoff, delivering faster closure across timing, extraction, and verification for advanced and 3D-IC designs.
 product_url: https://www.cadence.com/en_US/home/tools/digital-design-and-signoff/silicon-signoff/certus-closure-solution.html
 works_on_arm: true
-release_date_on_arm: 2025/12/31
+release_date_on_arm: 2025/12/04
 
 
 optional_info:
     homepage_url: https://www.cadence.com/en_US/home/tools/digital-design-and-signoff/silicon-signoff/certus-closure-solution.html
-    support_caveats: Arm64 support is planned for Q4 2025 according to Cadence’s platform roadmap. For early-access builds, contact arm-ecosystem@cadence.com.
+    support_caveats: New customers interested in this product should contact Cadence at arm-ecosystem@cadence.com to request access.
     alternative_options:
     getting_started_resources:
         official_docs: https://www.cadence.com/en_US/home/resources/datasheets/cadence-certus-closure-solution-ds.html
diff --git a/content/commercial_packages/genus.md b/content/commercial_packages/genus.md
@@ -5,17 +5,17 @@ category: EDA
 description: Cadence Genus Synthesis Solution is a next-generation RTL synthesis tool that boosts productivity with faster turnaround, fewer iterations, and physically aware optimization for high-quality results in implementation.
 product_url: https://www.cadence.com/en_US/home/tools/digital-design-and-signoff/synthesis/genus-synthesis-solution.html
 works_on_arm: true
-release_date_on_arm: 2025/12/31
+release_date_on_arm: 2025/12/04
 
 
 optional_info:
     homepage_url: https://www.cadence.com/en_US/home/tools/digital-design-and-signoff/synthesis/genus-synthesis-solution.html
-    support_caveats: Arm64 support is planned for Q4 2025 according to Cadence’s platform roadmap. For early-access builds, contact arm-ecosystem@cadence.com.
+    support_caveats: New customers interested in this product should contact Cadence at arm-ecosystem@cadence.com to request access.
     alternative_options:
     getting_started_resources:
         official_docs: https://www.cadence.com/en_US/home/resources/datasheets/genus-synthesis-solution-ds.html
         arm_content:
-        vendor_announcement:
+        vendor_announcement: https://community.cadence.com/cadence_blogs_8/b/di/posts/enabling-end-to-end-eda-flow-on-arm-based-compute-for-infrastructure-flexibility
 optional_hidden_info:
     other_info:
 
diff --git a/content/commercial_packages/helium.md b/content/commercial_packages/helium.md
@@ -10,7 +10,7 @@ release_date_on_arm: 2025/02/28
 
 optional_info:
     homepage_url: https://www.cadence.com/en_US/home/tools/system-design-and-verification/helium-virtual-and-hybrid-studio.html
-    support_caveats:
+    support_caveats: New customers interested in this product should contact Cadence at arm-ecosystem@cadence.com to request access.
     alternative_options:
     getting_started_resources:
         official_docs: https://www.cadence.com/en_US/home/multimedia.html/content/dam/cadence-www/global/en_US/videos/tools/system_design_verification/helium-virtual-hybrid-studio.mp4
diff --git a/content/commercial_packages/innovus.md b/content/commercial_packages/innovus.md
@@ -5,17 +5,17 @@ category: EDA
 description: Cadence Innovus Implementation System is Cadence’s advanced digital design platform optimized for the latest process nodes (16nm → 3nm), enabling designers to meet stringent PPA (Power, Performance, Area) and TAT (Turnaround Time) requirements. With massively parallel architecture, solver-based placement, advanced optimization, machine learning, and seamless integration with Cadence signoff tools, it accelerates physical implementation while ensuring power integrity, scalability, and faster design closure.
 product_url: https://www.cadence.com/en_US/home/tools/digital-design-and-signoff/soc-implementation-and-floorplanning/innovus-implementation-system.html
 works_on_arm: true
-release_date_on_arm: 2025/12/31
+release_date_on_arm: 2025/12/04
 
 
 optional_info:
     homepage_url: https://www.cadence.com/en_US/home/tools/digital-design-and-signoff/soc-implementation-and-floorplanning/innovus-implementation-system.html
-    support_caveats: Arm64 support is planned for Q4 2025 according to Cadence’s platform roadmap. For early-access builds, contact arm-ecosystem@cadence.com.
+    support_caveats: New customers interested in this product should contact Cadence at arm-ecosystem@cadence.com to request access.
     alternative_options:
     getting_started_resources:
         official_docs: https://www.cadence.com/en_US/home/resources/datasheets/innovus-implementation-system-ds.html
         arm_content:
-        vendor_announcement:
+        vendor_announcement: https://community.cadence.com/cadence_blogs_8/b/di/posts/enabling-end-to-end-eda-flow-on-arm-based-compute-for-infrastructure-flexibility
 optional_hidden_info:
     other_info:
 
diff --git a/content/commercial_packages/jasper.md b/content/commercial_packages/jasper.md
@@ -10,7 +10,7 @@ release_date_on_arm: 2023/09/30
 
 optional_info:
     homepage_url: https://www.cadence.com/en_US/home/tools/system-design-and-verification/formal-and-static-verification/jasper-verification-platform.html
-    support_caveats:
+    support_caveats: New customers interested in this product should contact Cadence at arm-ecosystem@cadence.com to request access.
     alternative_options:
     getting_started_resources:
         official_docs: https://www.cadence.com/en_US/home/tools/system-design-and-verification/formal-and-static-verification.html
diff --git a/content/commercial_packages/joules.md b/content/commercial_packages/joules.md
@@ -5,12 +5,12 @@ category: EDA
 description: Cadence Joules RTL Design Studio is an RTL analysis and optimization tool that enables designers to evaluate and improve power, performance, area, and congestion early in the design cycle, reducing iterations and accelerating implementation.
 product_url: https://www.cadence.com/en_US/home/tools/digital-design-and-signoff/rtl-analysis/joules-rtl-design-studio.html
 works_on_arm: true
-release_date_on_arm: 2025/12/31
+release_date_on_arm: 2025/12/04
 
 
 optional_info:
     homepage_url: https://www.cadence.com/en_US/home/tools/digital-design-and-signoff/rtl-analysis/joules-rtl-design-studio.html
-    support_caveats: Arm64 support is planned for Q4 2025 according to Cadence’s platform roadmap. For early-access builds, contact arm-ecosystem@cadence.com.
+    support_caveats: New customers interested in this product should contact Cadence at arm-ecosystem@cadence.com to request access.
     alternative_options:
     getting_started_resources:
         official_docs: https://www.cadence.com/en_US/home/resources/datasheets/cadence-joules-rtl-design-studio-ds.html
diff --git a/content/commercial_packages/pegasus.md b/content/commercial_packages/pegasus.md
@@ -5,17 +5,17 @@ category: EDA
 description: Cadence Pegasus Physical Verification System is a cloud-ready physical verification signoff solution with massively parallel, gigascale processing that delivers faster full-chip DRC, reducing runtimes from days to hours for advanced-node designs.
 product_url: https://www.cadence.com/en_US/home/tools/digital-design-and-signoff/silicon-signoff/pegasus-verification-system.html
 works_on_arm: true
-release_date_on_arm: 2025/12/31
+release_date_on_arm: 2025/12/04
 
 
 optional_info:
     homepage_url: https://www.cadence.com/en_US/home/tools/digital-design-and-signoff/silicon-signoff/pegasus-verification-system.html
-    support_caveats: Arm (AArch64) support is planned for Q4 2025 according to Cadence’s platform roadmap. For early-access builds, contact arm-ecosystem@cadence.com.
+    support_caveats: New customers interested in this product should contact Cadence at arm-ecosystem@cadence.com to request access.
     alternative_options:
     getting_started_resources:
         official_docs: https://www.cadence.com/en_US/home/resources/datasheets/pegasus-verification-system-ds.html
         arm_content:
-        vendor_announcement:
+        vendor_announcement: https://community.cadence.com/cadence_blogs_8/b/di/posts/enabling-end-to-end-eda-flow-on-arm-based-compute-for-infrastructure-flexibility
 optional_hidden_info:
     other_info: 
 
diff --git a/content/commercial_packages/quantus.md b/content/commercial_packages/quantus.md
@@ -5,12 +5,12 @@ category: EDA
 description: Cadence Quantus Extraction Solution is a foundry-certified parasitic extraction tool that delivers faster, highly accurate RC extractions for both digital and transistor-level designs, ensuring efficient signoff and faster tapeout.
 product_url: https://www.cadence.com/en_US/home/tools/digital-design-and-signoff/silicon-signoff/quantus-extraction-solution.html
 works_on_arm: true
-release_date_on_arm: 2025/12/31
+release_date_on_arm: 2025/12/04
 
 
 optional_info:
     homepage_url: https://www.cadence.com/en_US/home/tools/digital-design-and-signoff/silicon-signoff/quantus-extraction-solution.html
-    support_caveats: Arm64 support is planned for Q4 2025 according to Cadence’s platform roadmap. For early-access builds, contact arm-ecosystem@cadence.com.
+    support_caveats: New customers interested in this product should contact Cadence at arm-ecosystem@cadence.com to request access.
     alternative_options:
     getting_started_resources:
         official_docs: https://www.cadence.com/en_US/home/resources/datasheets/quantus-insight-solution-ds.html
diff --git a/content/commercial_packages/tempus.md b/content/commercial_packages/tempus.md
@@ -5,17 +5,17 @@ category: EDA
 description: Cadence Tempus Timing Solution is a high-performance static timing analysis (STA) tool optimized for advanced-node FinFET designs, enabling faster design closure and best-in-class PPA with trusted signoff accuracy.
 product_url: https://www.cadence.com/en_US/home/tools/digital-design-and-signoff/silicon-signoff/tempus-timing-signoff-solution.html
 works_on_arm: true
-release_date_on_arm: 2025/12/31
+release_date_on_arm: 2025/12/04
 
 
 optional_info:
     homepage_url: https://www.cadence.com/en_US/home/tools/digital-design-and-signoff/silicon-signoff/tempus-timing-signoff-solution.html
-    support_caveats: Arm64 support is planned for Q4 2025 according to Cadence’s platform roadmap. For early-access builds, contact arm-ecosystem@cadence.com
+    support_caveats: New customers interested in this product should contact Cadence at arm-ecosystem@cadence.com to request access.
     alternative_options:
     getting_started_resources:
         official_docs: https://www.cadence.com/en_US/home/resources/datasheets/tempus-timing-signoff-solution-ds.html
         arm_content:
-        vendor_announcement:
+        vendor_announcement: https://community.cadence.com/cadence_blogs_8/b/di/posts/enabling-end-to-end-eda-flow-on-arm-based-compute-for-infrastructure-flexibility
 optional_hidden_info:
     other_info:
 
diff --git a/content/commercial_packages/voltus.md b/content/commercial_packages/voltus.md
@@ -5,12 +5,12 @@ category: EDA
 description: Cadence Voltus IC Power Integrity Solution is a full-chip electromigration, IR drop, and power analysis tool that enables fast, hierarchical power signoff and IR-aware implementation for large-scale SoC designs.
 product_url: https://www.cadence.com/en_US/home/tools/digital-design-and-signoff/silicon-signoff/voltus-ic-power-integrity-solution.html
 works_on_arm: true
-release_date_on_arm: 2025/12/31
+release_date_on_arm: 2025/12/04
 
 
 optional_info:
     homepage_url: https://www.cadence.com/en_US/home/tools/digital-design-and-signoff/silicon-signoff/voltus-ic-power-integrity-solution.html
-    support_caveats: Arm support is coming in 2025-Q4. For access to early releases, please contact arm-ecosystem@cadence.com
+    support_caveats: New customers interested in this product should contact Cadence at arm-ecosystem@cadence.com to request access.
     alternative_options:
     getting_started_resources:
         official_docs: https://www.cadence.com/en_US/home/resources/datasheets/voltus-ic-power-integrity-solution-gt-ds.html
diff --git a/content/commercial_packages/xcelium.md b/content/commercial_packages/xcelium.md
@@ -10,7 +10,7 @@ release_date_on_arm: 2018/10/25
 
 optional_info:
     homepage_url: https://www.cadence.com/en_US/home/tools/system-design-and-verification/simulation-and-testbench-verification/xcelium-simulator.html
-    support_caveats:
+    support_caveats: New customers interested in this product should contact Cadence at arm-ecosystem@cadence.com to request access.
     alternative_options:
     getting_started_resources:
         official_docs: https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/tools/system-design-verification/secured/xcelium-logic-simulator-ds.pdf
