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1 parent 661b895 commit 85bdfa4

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Lines changed: 4 additions & 5 deletions

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edg/jlcparts/JlcPartsBase.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -95,7 +95,7 @@ def config_root_dir(root_dir: str):
9595
CapacitorsMultilayer_Ceramic_Capacitors_MLCC___SMDakaSMT.json.gz
9696
This setting is on a JlcPartsBase-wide basis."""
9797
assert JlcPartsBase._config_parts_root_dir is None, \
98-
f"attempted to reassign configure_root_dir, was {JlcPartsBase._config_parts_root_dir}, new {root_dir}"
98+
f"attempted to reassign config_root_dir, was {JlcPartsBase._config_parts_root_dir}, new {root_dir}"
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JlcPartsBase._config_parts_root_dir = root_dir
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101101
_JLC_PARTS_FILE_NAMES: ClassVar[List[str]] # set by subclass

edg/parts/BuckConverter_Mps.py

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@ def __init__(self, charging_current: RangeLike):
1313
current_limits=(0, 5)*Amp # up to 5A charge / system current
1414
)) # internal switch specs not defined, only bulk current limit defined
1515
self.vin = self.Port(VoltageSink(
16-
voltage_limits=(3.9, 16)*Volt, # abs max up to 26v, UV threshold up to 3.45
16+
voltage_limits=(3.9, 26)*Volt, # abs max up to 26v, UV threshold up to 3.45
1717
current_draw=self.sw.link().current_drawn # TODO quiescent current
1818
), [Power])
1919
self.pmid = self.Port(VoltageSource(
@@ -89,7 +89,7 @@ def contents(self) -> None:
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'9': self.pg,
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'11': self.stat,
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},
92-
mfr='Texas Instruments', part='MP2722GRH-0000-P',
92+
mfr='Monolithic Power Systems Inc.', part='MP2722GRH-0000-P',
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datasheet='https://www.monolithicpower.com/en/documentview/productdocument/index/version/2/document_type/Datasheet/lang/en/sku/MP2722GRH/document_id/10035/'
9494
)
9595
self.assign(self.lcsc_part, 'C20099550')
@@ -135,7 +135,6 @@ def contents(self):
135135

136136
# TODO only allow subset of frequencies, based on SW_FREQ table
137137
self.require(self.frequency.within((630, 1680)*kHertz))
138-
self.frequency.upper() - self.frequency.center()
139138
self.assign(self.actual_frequency, self.frequency)
140139

141140
self.connect(self.ic.batt, self.ic.battsns) # TODO allow remote sense

examples/BleJoystick/BleJoystick.net

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -104,7 +104,7 @@
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(property (name "edg_path") (value "mp2722.ic"))
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(property (name "edg_short_path") (value "mp2722.ic"))
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(property (name "edg_refdes") (value "JU1"))
107-
(property (name "edg_part") (value "MP2722GRH-0000-P (Texas Instruments)"))
107+
(property (name "edg_part") (value "MP2722GRH-0000-P (Monolithic Power Systems Inc.)"))
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(property (name "edg_value") (value "MP2722GRH-0000-P"))
109109
(sheetpath (names "/mp2722/") (tstamps "/06c701ab/"))
110110
(tstamps "013700cd"))

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