From 80c422183e69c8653d31ff6457fd29ce4703d057 Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Sun, 24 May 2026 00:45:57 -0700 Subject: [PATCH 01/26] wip --- edg/parts/microcontroller/Rp2040.py | 239 ++++++++++++++++++++-------- examples/test_blinky.py | 5 +- 2 files changed, 174 insertions(+), 70 deletions(-) diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index 1e96109c5..1581511fb 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -407,27 +407,10 @@ def _crystal_required(self) -> bool: # crystal needed for USB b/c tighter freq return len(self.get(self.usb.requested())) > 0 or super()._crystal_required() -class Xiao_Rp2040( - IoControllerUsbOut, IoControllerPowerOut, IoControllerVin, Rp2040_Ios, IoController, GeneratorBlock, FootprintBlock -): - """RP2040 development board, a tiny development (21x17.5mm) daughterboard. - Has an onboard USB connector, so this can also source power. - - Limited pins (only 11 for IOs, of which 6 are usable as the other 5 have boot requirements). +class Xiao_Rp2040_Device(Rp2040_Interfaces, InternalSubcircuit, GeneratorBlock, FootprintBlock): + """Footprint-only device model for the Xiao RP2040 microcontroller dev board""" - Requires Seeed Studio's KiCad library for the footprint: https://github.com/Seeed-Studio/OPL_Kicad_Library - The 'Seeed Studio XIAO Series Library' must have been added as a footprint library of the same name. - - Pinning data: https://www.seeedstudio.com/blog/wp-content/uploads/2022/08/Seeed-Studio-XIAO-Series-Package-and-PCB-Design.pdf - Internal data: https://files.seeedstudio.com/wiki/XIAO-RP2040/res/Seeed-Studio-XIAO-RP2040-v1.3.pdf - """ - - SYSTEM_PIN_REMAP: Dict[str, Union[str, List[str]]] = { - "VDD": "12", - "GND": "13", - "VUSB": "14", - } - RESOURCE_PIN_REMAP = { + PIN_REMAP = { "GPIO26": "1", "GPIO27": "2", "GPIO28": "3", @@ -441,47 +424,82 @@ class Xiao_Rp2040( "GPIO3": "11", } - @override - def _vddio(self) -> Port[VoltageLink]: - if self.get(self.pwr.is_connected()): # board sinks power - return self.pwr - else: - return self.pwr_out + def __init__(self, device_actual_pin_assigns: ArrayStringLike): + super().__init__() + self.device_actual_pin_assigns = self.ArgParameter(device_actual_pin_assigns) + self.v3v3 = self.Port(VoltageSink.empty()) + self.gnd = self.Port(Ground.empty()) + self.vcc = self.Port(VoltageSink.empty()) # VUsb @override - def _system_pinmap(self) -> Dict[str, Union[Passive, HasPassivePort]]: - if self.get(self.pwr.is_connected()): # board sinks power - return VariantPinRemapper( - { - "VDD": self.pwr, - "GND": self.gnd, - } - ).remap(self.SYSTEM_PIN_REMAP) - else: # board sources power (default) - return VariantPinRemapper( - { - "VDD": self.pwr_out, - "GND": self.gnd, - "VUSB": self.vusb_out, - } - ).remap(self.SYSTEM_PIN_REMAP) + def generate(self) -> None: + super().generate() + + pinning = { + "12": self.v3v3, + "13": self.gnd, + "14": self.vcc, + } + + self.footprint( + "U", + "Seeed Studio XIAO Series Library:XIAO-RP2040-SMD", + pinning, + mfr="", + part="XIAO RP2040", + datasheet="https://www.seeedstudio.com/XIAO-RP2040-v1-0-p-5026.html", + ) + + +class Xiao_Rp2040( + IoControllerUsbOut, + IoControllerPowerOut, + IoControllerVin, + IoController, + BaseIoControllerExportable, # TODO this breaks something + GeneratorBlock, + WrapperSubboardBlock, +): + """RP2040 development board, a tiny development (21x17.5mm) daughterboard. + Has an onboard USB connector, so this can also source power. + + Limited pins (only 11 for IOs, of which 6 are usable as the other 5 have boot requirements). + + Requires Seeed Studio's KiCad library for the footprint: https://github.com/Seeed-Studio/OPL_Kicad_Library + The 'Seeed Studio XIAO Series Library' must have been added as a footprint library of the same name. + + Pinning data: https://www.seeedstudio.com/blog/wp-content/uploads/2022/08/Seeed-Studio-XIAO-Series-Package-and-PCB-Design.pdf + Internal data: https://files.seeedstudio.com/wiki/XIAO-RP2040/res/Seeed-Studio-XIAO-RP2040-v1.3.pdf + """ + + def __init__(self, **kwargs: Any) -> None: + super().__init__(**kwargs) + self.ic: Rp2040_Device # device model only + self.generator_param(self.pwr.is_connected()) @override def contents(self) -> None: super().contents() - self.gnd.init_from(Ground()) - self.pwr.init_from(self._iovdd_model()) - self.pwr_vin.init_from( VoltageSink( # based on RS3236-3.3 voltage_limits=(3.3 * 1.025 + 0.55, 7.5) * Volt, # output * tolerance + dropout @ 300mA - current_draw=RangeExpr(), + current_draw=self.pwr_out.is_connected().then_else( # prop output current draw + self.pwr_out.link().current_drawn, (0, 0) * Amp + ), ) ) self.vusb_out.init_from( VoltageSource(voltage_out=UsbConnector.USB2_VOLTAGE_RANGE, current_limits=UsbConnector.USB2_CURRENT_LIMITS) ) + self.pwr_out_model = self.Block( + DummyVoltageSource( + voltage_out=3.3 * Volt(tol=0.05), # tolerance is a guess + current_limits=UsbConnector.USB2_CURRENT_LIMITS, + ) + ) + self.connect(self.pwr_out, self.pwr_out_model.pwr) + self.require( ~self.pwr_vin.is_connected() | ~self.vusb_out.is_connected(), "cannot use both VUsb out and VUsb in" ) @@ -489,32 +507,117 @@ def contents(self) -> None: (self.pwr_vin.is_connected() | self.vusb_out.is_connected()).implies(~self.pwr.is_connected()), "cannot use 3.3v input if VUsb used", ) - - self.pwr_out.init_from( - VoltageSource( - voltage_out=3.3 * Volt(tol=0.05), # tolerance is a guess - current_limits=UsbConnector.USB2_CURRENT_LIMITS, - ) - ) self.require(~self.pwr_out.is_connected() | ~self.pwr.is_connected(), "cannot use both 3.3v out and 3.3v in") - self.assign( - self.pwr_vin.current_draw, - self.pwr_out.is_connected().then_else( # prop output current draw - self.pwr_out.link().current_drawn, (0, 0) * Amp - ), - ) - self.generator_param(self.pwr.is_connected()) + self.ic = self.Block(Rp2040()) + self.connect(self.gnd, self.ic.gnd) @override def generate(self) -> None: super().generate() - self.footprint( - "U", - "Seeed Studio XIAO Series Library:XIAO-RP2040-SMD", - self._make_pinning(), - mfr="", - part="XIAO RP2040", - datasheet="https://www.seeedstudio.com/XIAO-RP2040-v1-0-p-5026.html", - ) + self.device = self.Block(Xiao_Rp2040_Device(self.ic.actual_pin_assigns), external=True) + self.export_tap(self.pwr, self.device.v3v3) + self.export_tap(self.gnd, self.device.gnd) + + if self.get(self.pwr.is_connected()): # power supplied externally + self.connect(self.pwr, self.ic.pwr) + else: # board sources power from USB + self.connect(self.pwr_out, self.ic.pwr) + + # SYSTEM_PIN_REMAP: Dict[str, Union[str, List[str]]] = { + # "VDD": "12", + # "GND": "13", + # "VUSB": "14", + # } + # RESOURCE_PIN_REMAP = { + # "GPIO26": "1", + # "GPIO27": "2", + # "GPIO28": "3", + # "GPIO29": "4", + # "GPIO6": "5", + # "GPIO7": "6", + # "GPIO0": "7", + # "GPIO1": "8", + # "GPIO2": "9", + # "GPIO4": "10", + # "GPIO3": "11", + # } + # + # @override + # def _vddio(self) -> Port[VoltageLink]: + # if self.get(self.pwr.is_connected()): # board sinks power + # return self.pwr + # else: + # return self.pwr_out + # + # @override + # def _system_pinmap(self) -> Dict[str, Union[Passive, HasPassivePort]]: + # if self.get(self.pwr.is_connected()): # board sinks power + # return VariantPinRemapper( + # { + # "VDD": self.pwr, + # "GND": self.gnd, + # } + # ).remap(self.SYSTEM_PIN_REMAP) + # else: # board sources power (default) + # return VariantPinRemapper( + # { + # "VDD": self.pwr_out, + # "GND": self.gnd, + # "VUSB": self.vusb_out, + # } + # ).remap(self.SYSTEM_PIN_REMAP) + # + # @override + # def contents(self) -> None: + # super().contents() + # + # self.gnd.init_from(Ground()) + # self.pwr.init_from(self._iovdd_model()) + # + # self.pwr_vin.init_from( + # VoltageSink( # based on RS3236-3.3 + # voltage_limits=(3.3 * 1.025 + 0.55, 7.5) * Volt, # output * tolerance + dropout @ 300mA + # current_draw=RangeExpr(), + # ) + # ) + # self.vusb_out.init_from( + # VoltageSource(voltage_out=UsbConnector.USB2_VOLTAGE_RANGE, current_limits=UsbConnector.USB2_CURRENT_LIMITS) + # ) + # self.require( + # ~self.pwr_vin.is_connected() | ~self.vusb_out.is_connected(), "cannot use both VUsb out and VUsb in" + # ) + # self.require( + # (self.pwr_vin.is_connected() | self.vusb_out.is_connected()).implies(~self.pwr.is_connected()), + # "cannot use 3.3v input if VUsb used", + # ) + # + # self.pwr_out.init_from( + # VoltageSource( + # voltage_out=3.3 * Volt(tol=0.05), # tolerance is a guess + # current_limits=UsbConnector.USB2_CURRENT_LIMITS, + # ) + # ) + # self.require(~self.pwr_out.is_connected() | ~self.pwr.is_connected(), "cannot use both 3.3v out and 3.3v in") + # self.assign( + # self.pwr_vin.current_draw, + # self.pwr_out.is_connected().then_else( # prop output current draw + # self.pwr_out.link().current_drawn, (0, 0) * Amp + # ), + # ) + # + # self.generator_param(self.pwr.is_connected()) + # + # @override + # def generate(self) -> None: + # super().generate() + # + # self.footprint( + # "U", + # "Seeed Studio XIAO Series Library:XIAO-RP2040-SMD", + # self._make_pinning(), + # mfr="", + # part="XIAO RP2040", + # datasheet="https://www.seeedstudio.com/XIAO-RP2040-v1-0-p-5026.html", + # ) diff --git a/examples/test_blinky.py b/examples/test_blinky.py index 6b91e39de..4e81d0676 100644 --- a/examples/test_blinky.py +++ b/examples/test_blinky.py @@ -20,11 +20,12 @@ def contents(self) -> None: class TestBlinkyBasic(SimpleBoardTop): - """The simplest cirucit, a microcontroller dev board with a LED.""" + """The simplest cirucit, a microcontroller dev board with a LED. + This also tests the dev board wrapper concept.""" @override def contents(self) -> None: - self.mcu = self.Block(Nucleo_F303k8()) + self.mcu = self.Block(Xiao_Rp2040()) self.led = self.Block(IndicatorLed()) self.connect(self.led.signal, self.mcu.gpio.request()) From 04d45d7b1b1a66024adc1b35fe0a36b09f688ce8 Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Sun, 24 May 2026 00:57:53 -0700 Subject: [PATCH 02/26] wip --- edg/core/Blocks.py | 2 -- edg/core/Core.py | 3 +-- edg/electronics_model/SubboardBlock.py | 1 + 3 files changed, 2 insertions(+), 4 deletions(-) diff --git a/edg/core/Blocks.py b/edg/core/Blocks.py index 9b2e20be7..9342586dc 100644 --- a/edg/core/Blocks.py +++ b/edg/core/Blocks.py @@ -432,8 +432,6 @@ def _populate_def_proto_block_contents(self, pb: edgir.BlockLikeTypes, ref_map: or self._elaboration_state == BlockElaborationState.post_generate ) - self._constraints.finalize() - for name, constraint in self._constraints.items(): constraint._populate_expr_proto(edgir.add_pair(pb.constraints, name), ref_map) diff --git a/edg/core/Core.py b/edg/core/Core.py index 9e901bda1..e1647bb53 100644 --- a/edg/core/Core.py +++ b/edg/core/Core.py @@ -39,8 +39,6 @@ def add_element(self, name: str, item: Any) -> None: # TODO should this be automatically called? def finalize(self) -> None: - if self.closed: - return if self.anon_prefix is None: assert not self.anons, f"can't have unnamed objects: {self.anons}" else: @@ -51,6 +49,7 @@ def finalize(self) -> None: self.names[elt] = name self.keys_list.append(name) self.anons = IdentitySet[ElementType]() # TODO needs clear operation + self.closed = True def all_values_temp(self) -> Iterable[ElementType]: # TODO needs better API name, reconcile w/ values? return list(self.container.values()) + list(self.anons) diff --git a/edg/electronics_model/SubboardBlock.py b/edg/electronics_model/SubboardBlock.py index 5b6eba0a9..8e8eba483 100644 --- a/edg/electronics_model/SubboardBlock.py +++ b/edg/electronics_model/SubboardBlock.py @@ -47,6 +47,7 @@ def export_tap(self, exterior_port: BasePort, internal_port: BasePort) -> None: @override def _populate_def_proto_hierarchy(self, pb: edgir.HierarchyBlock, ref_map: Refable.RefMapType) -> None: + # TODO THIS HAPPENS POST FINALIZE AND IS BROKEN self.assign(self.fp_external_blocks, [self._blocks.name_of(block) for block in self._external_blocks]) super()._populate_def_proto_hierarchy(pb, ref_map) From f57684521474357d01389b7f031d4c2c4626c588 Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Sun, 24 May 2026 01:04:23 -0700 Subject: [PATCH 03/26] netlist compiling, fix gnarly subboard bug --- edg/electronics_model/SubboardBlock.py | 7 +++++-- edg/parts/microcontroller/Rp2040.py | 8 ++++---- 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/edg/electronics_model/SubboardBlock.py b/edg/electronics_model/SubboardBlock.py index 8e8eba483..e43572b20 100644 --- a/edg/electronics_model/SubboardBlock.py +++ b/edg/electronics_model/SubboardBlock.py @@ -46,10 +46,13 @@ def export_tap(self, exterior_port: BasePort, internal_port: BasePort) -> None: self._export_taps.append((exterior_port, internal_port)) @override - def _populate_def_proto_hierarchy(self, pb: edgir.HierarchyBlock, ref_map: Refable.RefMapType) -> None: - # TODO THIS HAPPENS POST FINALIZE AND IS BROKEN + def _def_to_proto(self) -> edgir.HierarchyBlock: + # create this assign after the block definition has run self.assign(self.fp_external_blocks, [self._blocks.name_of(block) for block in self._external_blocks]) + return super()._def_to_proto() + @override + def _populate_def_proto_hierarchy(self, pb: edgir.HierarchyBlock, ref_map: Refable.RefMapType) -> None: super()._populate_def_proto_hierarchy(pb, ref_map) for exterior_port, internal_port in self._export_taps: diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index 1581511fb..460de3f80 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -512,14 +512,14 @@ def contents(self) -> None: self.ic = self.Block(Rp2040()) self.connect(self.gnd, self.ic.gnd) + # self.device = self.Block(Xiao_Rp2040_Device(self.ic.actual_pin_assigns), external=True) + # self.export_tap(self.pwr, self.device.v3v3) + # self.export_tap(self.gnd, self.device.gnd) + @override def generate(self) -> None: super().generate() - self.device = self.Block(Xiao_Rp2040_Device(self.ic.actual_pin_assigns), external=True) - self.export_tap(self.pwr, self.device.v3v3) - self.export_tap(self.gnd, self.device.gnd) - if self.get(self.pwr.is_connected()): # power supplied externally self.connect(self.pwr, self.ic.pwr) else: # board sources power from USB From 48307d5a53e0c83d01407e408f2f049c7effad92 Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Sun, 24 May 2026 10:43:20 -0700 Subject: [PATCH 04/26] don't crash on empty array case --- edg/core/TransformUtil.py | 2 ++ edg/parts/microcontroller/Rp2040.py | 6 +++--- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/edg/core/TransformUtil.py b/edg/core/TransformUtil.py index 0356960e7..9b622637f 100644 --- a/edg/core/TransformUtil.py +++ b/edg/core/TransformUtil.py @@ -236,6 +236,8 @@ def _traverse_portlike(self, context: TransformContext, elt: edgir.PortLike) -> elif elt.HasField("array") and elt.array.HasField("ports"): for port_pair in elt.array.ports.ports: self._traverse_portlike(context.append_port(port_pair.name), port_pair.value) + elif elt.HasField("array") and not elt.array.HasField("ports"): + pass # array with no defined ports, effectively a no-op else: raise ValueError(f"_traverse_portlike encountered unknown type {elt} at {context}") diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index 460de3f80..91d9da03e 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -512,9 +512,9 @@ def contents(self) -> None: self.ic = self.Block(Rp2040()) self.connect(self.gnd, self.ic.gnd) - # self.device = self.Block(Xiao_Rp2040_Device(self.ic.actual_pin_assigns), external=True) - # self.export_tap(self.pwr, self.device.v3v3) - # self.export_tap(self.gnd, self.device.gnd) + self.device = self.Block(Xiao_Rp2040_Device(self.ic.actual_pin_assigns), external=True) + self.export_tap(self.pwr, self.device.v3v3) + self.export_tap(self.gnd, self.device.gnd) @override def generate(self) -> None: From da23832937aaae076da2f123fca109a49f769110 Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Sun, 24 May 2026 10:51:03 -0700 Subject: [PATCH 05/26] Update Rp2040.py --- edg/parts/microcontroller/Rp2040.py | 43 ++++++++++++----------------- 1 file changed, 17 insertions(+), 26 deletions(-) diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index 91d9da03e..20fde831b 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -427,18 +427,21 @@ class Xiao_Rp2040_Device(Rp2040_Interfaces, InternalSubcircuit, GeneratorBlock, def __init__(self, device_actual_pin_assigns: ArrayStringLike): super().__init__() self.device_actual_pin_assigns = self.ArgParameter(device_actual_pin_assigns) - self.v3v3 = self.Port(VoltageSink.empty()) self.gnd = self.Port(Ground.empty()) - self.vcc = self.Port(VoltageSink.empty()) # VUsb + self.v3v3 = self.Port(VoltageSink.empty(), optional=True) + self.v3v3_out = self.Port(VoltageSource.empty(), optional=True) + self.vcc = self.Port(VoltageSink.empty(), optional=True) # VUsb + self.vcc_out = self.Port(VoltageSource.empty(), optional=True) + self.generator_param(self.v3v3.is_connected(), self.vcc.is_connected()) @override def generate(self) -> None: super().generate() - pinning = { - "12": self.v3v3, + pinning: Dict[str, HasPassivePort] = { + "12": self.v3v3 if self.get(self.v3v3.is_connected()) else self.v3v3_out, "13": self.gnd, - "14": self.vcc, + "14": self.vcc if self.get(self.vcc.is_connected()) else self.vcc_out, # VUsb } self.footprint( @@ -475,7 +478,7 @@ class Xiao_Rp2040( def __init__(self, **kwargs: Any) -> None: super().__init__(**kwargs) self.ic: Rp2040_Device # device model only - self.generator_param(self.pwr.is_connected()) + self.generator_param(self.pwr.is_connected(), self.pwr_vin.is_connected(), self.vusb_out.is_connected()) @override def contents(self) -> None: @@ -513,7 +516,7 @@ def contents(self) -> None: self.connect(self.gnd, self.ic.gnd) self.device = self.Block(Xiao_Rp2040_Device(self.ic.actual_pin_assigns), external=True) - self.export_tap(self.pwr, self.device.v3v3) + self.export_tap(self.gnd, self.device.gnd) @override @@ -522,28 +525,16 @@ def generate(self) -> None: if self.get(self.pwr.is_connected()): # power supplied externally self.connect(self.pwr, self.ic.pwr) + self.export_tap(self.pwr, self.device.v3v3) else: # board sources power from USB self.connect(self.pwr_out, self.ic.pwr) + self.export_tap(self.pwr_out, self.device.v3v3_out) + + if self.get(self.pwr_vin.is_connected()): + self.export_tap(self.pwr_vin, self.device.vcc) + if self.get(self.vusb_out.is_connected()): + self.export_tap(self.vusb_out, self.device.vcc_out) - # SYSTEM_PIN_REMAP: Dict[str, Union[str, List[str]]] = { - # "VDD": "12", - # "GND": "13", - # "VUSB": "14", - # } - # RESOURCE_PIN_REMAP = { - # "GPIO26": "1", - # "GPIO27": "2", - # "GPIO28": "3", - # "GPIO29": "4", - # "GPIO6": "5", - # "GPIO7": "6", - # "GPIO0": "7", - # "GPIO1": "8", - # "GPIO2": "9", - # "GPIO4": "10", - # "GPIO3": "11", - # } - # # @override # def _vddio(self) -> Port[VoltageLink]: # if self.get(self.pwr.is_connected()): # board sinks power From 2bbf1a98161efe11eb1d75398a8874d6ba567b4f Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Sun, 24 May 2026 10:55:13 -0700 Subject: [PATCH 06/26] Update Rp2040.py --- edg/parts/microcontroller/Rp2040.py | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index 20fde831b..f088cdf99 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -495,13 +495,6 @@ def contents(self) -> None: self.vusb_out.init_from( VoltageSource(voltage_out=UsbConnector.USB2_VOLTAGE_RANGE, current_limits=UsbConnector.USB2_CURRENT_LIMITS) ) - self.pwr_out_model = self.Block( - DummyVoltageSource( - voltage_out=3.3 * Volt(tol=0.05), # tolerance is a guess - current_limits=UsbConnector.USB2_CURRENT_LIMITS, - ) - ) - self.connect(self.pwr_out, self.pwr_out_model.pwr) self.require( ~self.pwr_vin.is_connected() | ~self.vusb_out.is_connected(), "cannot use both VUsb out and VUsb in" @@ -516,7 +509,6 @@ def contents(self) -> None: self.connect(self.gnd, self.ic.gnd) self.device = self.Block(Xiao_Rp2040_Device(self.ic.actual_pin_assigns), external=True) - self.export_tap(self.gnd, self.device.gnd) @override @@ -527,7 +519,13 @@ def generate(self) -> None: self.connect(self.pwr, self.ic.pwr) self.export_tap(self.pwr, self.device.v3v3) else: # board sources power from USB - self.connect(self.pwr_out, self.ic.pwr) + self.pwr_out_model = self.Block( + DummyVoltageSource( + voltage_out=3.3 * Volt(tol=0.05), # tolerance is a guess + current_limits=UsbConnector.USB2_CURRENT_LIMITS, + ) + ) + self.connect(self.pwr_out, self.pwr_out_model.pwr, self.ic.pwr) self.export_tap(self.pwr_out, self.device.v3v3_out) if self.get(self.pwr_vin.is_connected()): From 22ad5334634a940b7540f008f77bc7fa0f962653 Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Sun, 24 May 2026 11:03:30 -0700 Subject: [PATCH 07/26] proper empty pinning --- edg/abstract_parts/IoControllerMixins.py | 5 +++-- edg/abstract_parts/IoControllerProgramming.py | 11 +++++++---- edg/parts/microcontroller/Rp2040.py | 13 ++++++++++--- 3 files changed, 20 insertions(+), 9 deletions(-) diff --git a/edg/abstract_parts/IoControllerMixins.py b/edg/abstract_parts/IoControllerMixins.py index a1b77d401..07c0f3303 100644 --- a/edg/abstract_parts/IoControllerMixins.py +++ b/edg/abstract_parts/IoControllerMixins.py @@ -1,3 +1,4 @@ +from typing import Any from typing_extensions import override from .IoController import IoController @@ -11,8 +12,8 @@ class WithCrystalGenerator(IoController, GeneratorBlock): DEFAULT_CRYSTAL_FREQUENCY: RangeLike - def __init__(self) -> None: - super().__init__() + def __init__(self, **kwargs: Any) -> None: + super().__init__(**kwargs) self.xtal_node = self.connect() # connect this internal node to the microcontroller; this may be empty def _crystal_required(self) -> bool: diff --git a/edg/abstract_parts/IoControllerProgramming.py b/edg/abstract_parts/IoControllerProgramming.py index e48f7eceb..8efd352f7 100644 --- a/edg/abstract_parts/IoControllerProgramming.py +++ b/edg/abstract_parts/IoControllerProgramming.py @@ -1,5 +1,4 @@ -from typing import List - +from typing import List, Any from typing_extensions import override from ..electronics_model import * @@ -23,9 +22,13 @@ class IoControllerWithSwdTargetConnector(IoController, BaseIoControllerExportabl the subclass.""" def __init__( - self, swd_swo_pin: StringLike = "NC", swd_tdi_pin: StringLike = "NC", swd_connect_reset: BoolLike = True + self, + swd_swo_pin: StringLike = "NC", + swd_tdi_pin: StringLike = "NC", + swd_connect_reset: BoolLike = True, + **kwargs: Any, ): - super().__init__() + super().__init__(**kwargs) self.swd_swo_pin = self.ArgParameter(swd_swo_pin) self.swd_tdi_pin = self.ArgParameter(swd_tdi_pin) self.swd_connect_reset = self.ArgParameter(swd_connect_reset) diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index f088cdf99..1292d7321 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -478,7 +478,12 @@ class Xiao_Rp2040( def __init__(self, **kwargs: Any) -> None: super().__init__(**kwargs) self.ic: Rp2040_Device # device model only - self.generator_param(self.pwr.is_connected(), self.pwr_vin.is_connected(), self.vusb_out.is_connected()) + self.generator_param( + self.pwr.is_connected(), + self.pwr_out.is_connected(), + self.pwr_vin.is_connected(), + self.vusb_out.is_connected(), + ) @override def contents(self) -> None: @@ -505,7 +510,7 @@ def contents(self) -> None: ) self.require(~self.pwr_out.is_connected() | ~self.pwr.is_connected(), "cannot use both 3.3v out and 3.3v in") - self.ic = self.Block(Rp2040()) + self.ic = self.Block(Rp2040(pin_assigns=ArrayStringExpr())) self.connect(self.gnd, self.ic.gnd) self.device = self.Block(Xiao_Rp2040_Device(self.ic.actual_pin_assigns), external=True) @@ -525,7 +530,9 @@ def generate(self) -> None: current_limits=UsbConnector.USB2_CURRENT_LIMITS, ) ) - self.connect(self.pwr_out, self.pwr_out_model.pwr, self.ic.pwr) + self.connect(self.pwr_out_model.pwr, self.ic.pwr) + if self.get(self.pwr_out.is_connected()): + self.connect(self.pwr_out, self.pwr_out_model.pwr) self.export_tap(self.pwr_out, self.device.v3v3_out) if self.get(self.pwr_vin.is_connected()): From 477d701ed4f53f58a7c72d95ce85cc649802d794 Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Sun, 24 May 2026 11:04:06 -0700 Subject: [PATCH 08/26] Update Rp2040.py --- edg/parts/microcontroller/Rp2040.py | 78 ----------------------------- 1 file changed, 78 deletions(-) diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index 1292d7321..706585bbc 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -539,81 +539,3 @@ def generate(self) -> None: self.export_tap(self.pwr_vin, self.device.vcc) if self.get(self.vusb_out.is_connected()): self.export_tap(self.vusb_out, self.device.vcc_out) - - # @override - # def _vddio(self) -> Port[VoltageLink]: - # if self.get(self.pwr.is_connected()): # board sinks power - # return self.pwr - # else: - # return self.pwr_out - # - # @override - # def _system_pinmap(self) -> Dict[str, Union[Passive, HasPassivePort]]: - # if self.get(self.pwr.is_connected()): # board sinks power - # return VariantPinRemapper( - # { - # "VDD": self.pwr, - # "GND": self.gnd, - # } - # ).remap(self.SYSTEM_PIN_REMAP) - # else: # board sources power (default) - # return VariantPinRemapper( - # { - # "VDD": self.pwr_out, - # "GND": self.gnd, - # "VUSB": self.vusb_out, - # } - # ).remap(self.SYSTEM_PIN_REMAP) - # - # @override - # def contents(self) -> None: - # super().contents() - # - # self.gnd.init_from(Ground()) - # self.pwr.init_from(self._iovdd_model()) - # - # self.pwr_vin.init_from( - # VoltageSink( # based on RS3236-3.3 - # voltage_limits=(3.3 * 1.025 + 0.55, 7.5) * Volt, # output * tolerance + dropout @ 300mA - # current_draw=RangeExpr(), - # ) - # ) - # self.vusb_out.init_from( - # VoltageSource(voltage_out=UsbConnector.USB2_VOLTAGE_RANGE, current_limits=UsbConnector.USB2_CURRENT_LIMITS) - # ) - # self.require( - # ~self.pwr_vin.is_connected() | ~self.vusb_out.is_connected(), "cannot use both VUsb out and VUsb in" - # ) - # self.require( - # (self.pwr_vin.is_connected() | self.vusb_out.is_connected()).implies(~self.pwr.is_connected()), - # "cannot use 3.3v input if VUsb used", - # ) - # - # self.pwr_out.init_from( - # VoltageSource( - # voltage_out=3.3 * Volt(tol=0.05), # tolerance is a guess - # current_limits=UsbConnector.USB2_CURRENT_LIMITS, - # ) - # ) - # self.require(~self.pwr_out.is_connected() | ~self.pwr.is_connected(), "cannot use both 3.3v out and 3.3v in") - # self.assign( - # self.pwr_vin.current_draw, - # self.pwr_out.is_connected().then_else( # prop output current draw - # self.pwr_out.link().current_drawn, (0, 0) * Amp - # ), - # ) - # - # self.generator_param(self.pwr.is_connected()) - # - # @override - # def generate(self) -> None: - # super().generate() - # - # self.footprint( - # "U", - # "Seeed Studio XIAO Series Library:XIAO-RP2040-SMD", - # self._make_pinning(), - # mfr="", - # part="XIAO RP2040", - # datasheet="https://www.seeedstudio.com/XIAO-RP2040-v1-0-p-5026.html", - # ) From bf8c1fd394f0045b8fc4211520225979a1ba3b4f Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Sun, 24 May 2026 11:15:18 -0700 Subject: [PATCH 09/26] simplify --- edg/parts/microcontroller/Rp2040.py | 398 +++++++++++++--------------- 1 file changed, 182 insertions(+), 216 deletions(-) diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index 706585bbc..92924a4c2 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -12,27 +12,56 @@ class Rp2040_Interfaces(IoControllerI2cTarget, IoControllerUsb, BaseIoController """Defines base interfaces for ESP32C3 microcontrollers""" -@non_library -class Rp2040_Ios(Rp2040_Interfaces, BaseIoControllerPinmapGenerator): - """IOs definitions independent of infrastructural (e.g. power) pins.""" - - RESOURCE_PIN_REMAP: Dict[str, str] # resource name in base -> pin name +class Rp2040_Device(BaseIoControllerPinmapGenerator, InternalSubcircuit, GeneratorBlock, JlcPart, FootprintBlock): + def __init__(self, **kwargs: Any) -> None: + super().__init__(**kwargs) - @abstractmethod - def _vddio(self) -> Port[VoltageLink]: - """Returns VDDIO (can be VoltageSink or VoltageSource).""" - ... + self.gnd = self.Port(Ground(), [Common]) + self.iovdd = self.Port( + VoltageSink( + voltage_limits=(1.62, 3.63) * Volt, # Table 628 + current_draw=(1.2, 4.3) * mAmp + self.io_current_draw.upper(), # Table 629 + ), + [Power], + ) - def _iovdd_model(self) -> VoltageSink: - return VoltageSink( - voltage_limits=(1.62, 3.63) * Volt, # Table 628 - current_draw=(1.2, 4.3) * mAmp + self.io_current_draw.upper(), # Table 629 + self.dvdd = self.Port( + VoltageSink( # Digital Core + voltage_limits=(0.99, 1.21) * Volt, # Table 628 + current_draw=(0.18, 40) * mAmp, # Table 629 typ Dormant to Figure 171 approx max DVdd + ) + ) + self.vreg_vout = self.Port( + VoltageSource( # actually adjustable, section 2.10.3 + voltage_out=1.1 * Volt(tol=0.03), # default is 1.1v nominal with 3% variation (Table 192) + current_limits=(0, 100) * mAmp, # Table 1, max current + ) + ) + self.vreg_vin = self.Port( + VoltageSink( + voltage_limits=(1.62, 3.63) * Volt, # Table 628 + current_draw=self.vreg_vout.is_connected().then_else( + self.vreg_vout.link().current_drawn, 0 * Amp(tol=0) + ), + ) + ) + self.usb_vdd = self.Port( + VoltageSink( + voltage_limits=RangeExpr(), # depends on if USB is needed + current_draw=(0.2, 2.0) * mAmp, # Table 629 typ BOOTSEL Idle to max BOOTSEL Active + ) + ) + self.adc_avdd = self.Port( + VoltageSink( + voltage_limits=(2.97, 3.63) * Volt, # Table 628, performance compromised at <2.97V, lowest 1.62V + # current draw not specified in datasheet + ) ) - def _dio_model(self, pwr: Port[VoltageLink]) -> DigitalBidir: - return DigitalBidir.from_supply( # table 4.4 + # Additional ports (on top of IoController) + self._dio_usb_model = self._dio_ft_model = self._dio_std_model = DigitalBidir.from_supply( # table 4.4 self.gnd, - pwr, + self.iovdd, voltage_limit_tolerance=(-0.3, 0.3) * Volt, current_limits=(-12, 12) * mAmp, # by IOH / IOL modes input_threshold_abs=(0.8, 2.0) * Volt, # for IOVdd=3.3, TODO other IOVdd ranges @@ -40,14 +69,78 @@ def _dio_model(self, pwr: Port[VoltageLink]) -> DigitalBidir: pulldown_capable=True, ) + self.qspi = self.Port(SpiController(self._dio_std_model)) # TODO actually QSPI + self.qspi_cs = self.Port(self._dio_std_model) + self.qspi_sd2 = self.Port(self._dio_std_model) + self.qspi_sd3 = self.Port(self._dio_std_model) + + self.xosc = self.Port( + CrystalDriver( + frequency_limits=(1, 15) * MHertz, voltage_out=self.iovdd.link().voltage # datasheet 2.15.2.2 + ), + optional=True, + ) + + self.swd = self.Port(SwdTargetPort.empty()) + self.run = self.Port(DigitalSink.from_bidir(self._dio_ft_model), optional=True) # internally pulled up + self._io_ports.insert(0, self.swd) + @override - def _io_pinmap(self) -> PinMapUtil: - pwr = self._vddio() - dio_usb_model = dio_ft_model = dio_std_model = self._dio_model(pwr) + def generate(self) -> None: + super().generate() + + if not self.get(self.usb.requested()): # Table 628, VDD_USB can be lower if USB not used (section 2.9.4) + self.assign(self.usb_vdd.voltage_limits, (1.62, 3.63) * Volt) + else: + self.assign(self.usb_vdd.voltage_limits, (3.135, 3.63) * Volt) + + self.footprint( + "U", + "Package_DFN_QFN:QFN-56-1EP_7x7mm_P0.4mm_EP3.2x3.2mm", + self._make_pinning(), + mfr="Raspberry Pi", + part="RP2040", + datasheet="https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf", + ) + self.assign(self.lcsc_part, "C2040") + self.assign(self.actual_basic_part, False) + + # Pin/peripheral resource definitions (table 3) + @override + def _system_pinmap(self) -> Dict[str, Union[Passive, HasPassivePort]]: + return { + "51": self.qspi_sd3, + "52": self.qspi.sck, + "53": self.qspi.mosi, # IO0 + "54": self.qspi_sd2, + "55": self.qspi.miso, # IO1 + "56": self.qspi_cs, # IO1 + "20": self.xosc.xtal_in, + "21": self.xosc.xtal_out, + "24": self.swd.swclk, + "25": self.swd.swdio, + "26": self.run, + "19": self.gnd, # TESTEN, connect to gnd + "1": self.iovdd, + "10": self.iovdd, + "22": self.iovdd, + "33": self.iovdd, + "42": self.iovdd, + "49": self.iovdd, + "23": self.dvdd, + "50": self.dvdd, + "44": self.vreg_vin, + "45": self.vreg_vout, + "48": self.usb_vdd, + "43": self.adc_avdd, + "57": self.gnd, # pad + } + @override + def _io_pinmap(self) -> PinMapUtil: adc_model = AnalogSink.from_supply( # Table 626 self.gnd, - pwr, + self.iovdd, voltage_limit_tolerance=(0, 0), # ADC input voltage range signal_limit_tolerance=(0, 0), # ADC input voltage range impedance=(100, float("inf")) * kOhm, @@ -60,38 +153,38 @@ def _io_pinmap(self) -> PinMapUtil: return PinMapUtil( [ - PinResource("GPIO0", {"GPIO0": dio_ft_model}), - PinResource("GPIO1", {"GPIO1": dio_ft_model}), - PinResource("GPIO2", {"GPIO2": dio_ft_model}), - PinResource("GPIO3", {"GPIO3": dio_ft_model}), - PinResource("GPIO4", {"GPIO4": dio_ft_model}), - PinResource("GPIO5", {"GPIO5": dio_ft_model}), - PinResource("GPIO6", {"GPIO6": dio_ft_model}), - PinResource("GPIO7", {"GPIO7": dio_ft_model}), - PinResource("GPIO8", {"GPIO8": dio_ft_model}), - PinResource("GPIO9", {"GPIO9": dio_ft_model}), - PinResource("GPIO10", {"GPIO10": dio_ft_model}), - PinResource("GPIO11", {"GPIO11": dio_ft_model}), - PinResource("GPIO12", {"GPIO12": dio_ft_model}), - PinResource("GPIO13", {"GPIO13": dio_ft_model}), - PinResource("GPIO14", {"GPIO14": dio_ft_model}), - PinResource("GPIO15", {"GPIO15": dio_ft_model}), - PinResource("GPIO16", {"GPIO16": dio_ft_model}), - PinResource("GPIO17", {"GPIO17": dio_ft_model}), - PinResource("GPIO18", {"GPIO18": dio_ft_model}), - PinResource("GPIO19", {"GPIO19": dio_ft_model}), - PinResource("GPIO20", {"GPIO20": dio_ft_model}), - PinResource("GPIO21", {"GPIO21": dio_ft_model}), - PinResource("GPIO22", {"GPIO22": dio_ft_model}), - PinResource("GPIO23", {"GPIO23": dio_ft_model}), - PinResource("GPIO24", {"GPIO24": dio_ft_model}), - PinResource("GPIO25", {"GPIO25": dio_ft_model}), - PinResource("GPIO26", {"GPIO26": dio_std_model, "ADC0": adc_model}), - PinResource("GPIO27", {"GPIO27": dio_std_model, "ADC1": adc_model}), - PinResource("GPIO28", {"GPIO28": dio_std_model, "ADC2": adc_model}), - PinResource("GPIO29", {"GPIO29": dio_std_model, "ADC3": adc_model}), + PinResource("GPIO0", {"GPIO0": self._dio_ft_model}), + PinResource("GPIO1", {"GPIO1": self._dio_ft_model}), + PinResource("GPIO2", {"GPIO2": self._dio_ft_model}), + PinResource("GPIO3", {"GPIO3": self._dio_ft_model}), + PinResource("GPIO4", {"GPIO4": self._dio_ft_model}), + PinResource("GPIO5", {"GPIO5": self._dio_ft_model}), + PinResource("GPIO6", {"GPIO6": self._dio_ft_model}), + PinResource("GPIO7", {"GPIO7": self._dio_ft_model}), + PinResource("GPIO8", {"GPIO8": self._dio_ft_model}), + PinResource("GPIO9", {"GPIO9": self._dio_ft_model}), + PinResource("GPIO10", {"GPIO10": self._dio_ft_model}), + PinResource("GPIO11", {"GPIO11": self._dio_ft_model}), + PinResource("GPIO12", {"GPIO12": self._dio_ft_model}), + PinResource("GPIO13", {"GPIO13": self._dio_ft_model}), + PinResource("GPIO14", {"GPIO14": self._dio_ft_model}), + PinResource("GPIO15", {"GPIO15": self._dio_ft_model}), + PinResource("GPIO16", {"GPIO16": self._dio_ft_model}), + PinResource("GPIO17", {"GPIO17": self._dio_ft_model}), + PinResource("GPIO18", {"GPIO18": self._dio_ft_model}), + PinResource("GPIO19", {"GPIO19": self._dio_ft_model}), + PinResource("GPIO20", {"GPIO20": self._dio_ft_model}), + PinResource("GPIO21", {"GPIO21": self._dio_ft_model}), + PinResource("GPIO22", {"GPIO22": self._dio_ft_model}), + PinResource("GPIO23", {"GPIO23": self._dio_ft_model}), + PinResource("GPIO24", {"GPIO24": self._dio_ft_model}), + PinResource("GPIO25", {"GPIO25": self._dio_ft_model}), + PinResource("GPIO26", {"GPIO26": self._dio_std_model, "ADC0": adc_model}), + PinResource("GPIO27", {"GPIO27": self._dio_std_model, "ADC1": adc_model}), + PinResource("GPIO28", {"GPIO28": self._dio_std_model, "ADC2": adc_model}), + PinResource("GPIO29", {"GPIO29": self._dio_std_model, "ADC3": adc_model}), # fixed-pin peripherals - PeripheralFixedPin("USB", UsbDevicePort(dio_usb_model), {"dm": "USB_DM", "dp": "USB_DP"}), + PeripheralFixedPin("USB", UsbDevicePort(self._dio_usb_model), {"dm": "USB_DM", "dp": "USB_DP"}), # reassignable peripherals PeripheralFixedResource( "UART0", @@ -156,178 +249,51 @@ def _io_pinmap(self) -> PinMapUtil: ), PeripheralFixedPin( "SWD", - SwdTargetPort(dio_std_model), + SwdTargetPort(self._dio_std_model), { "swdio": "SWDIO", "swclk": "SWCLK", }, ), ] - ).remap_pins(self.RESOURCE_PIN_REMAP) - - -class Rp2040_Device( - Rp2040_Ios, BaseIoControllerPinmapGenerator, InternalSubcircuit, GeneratorBlock, JlcPart, FootprintBlock -): - RESOURCE_PIN_REMAP = { - "GPIO0": "2", - "GPIO1": "3", - "GPIO2": "4", - "GPIO3": "5", - "GPIO4": "6", - "GPIO5": "7", - "GPIO6": "8", - "GPIO7": "9", - "GPIO8": "11", - "GPIO9": "12", - "GPIO10": "13", - "GPIO11": "14", - "GPIO12": "15", - "GPIO13": "16", - "GPIO14": "17", - "GPIO15": "18", - "GPIO16": "27", - "GPIO17": "28", - "GPIO18": "29", - "GPIO19": "30", - "GPIO20": "31", - "GPIO21": "32", - "GPIO22": "34", - "GPIO23": "35", - "GPIO24": "36", - "GPIO25": "37", - "GPIO26": "38", - "GPIO27": "39", - "GPIO28": "40", - "GPIO29": "41", - "USB_DM": "46", - "USB_DP": "47", - "SWDIO": "25", - "SWCLK": "24", - } - - @override - def _vddio(self) -> Port[VoltageLink]: - return self.iovdd - - def __init__(self, **kwargs: Any) -> None: - super().__init__(**kwargs) - - self.gnd = self.Port(Ground(), [Common]) - self.iovdd = self.Port(self._iovdd_model(), [Power]) - - self.dvdd = self.Port( - VoltageSink( # Digital Core - voltage_limits=(0.99, 1.21) * Volt, # Table 628 - current_draw=(0.18, 40) * mAmp, # Table 629 typ Dormant to Figure 171 approx max DVdd - ) - ) - self.vreg_vout = self.Port( - VoltageSource( # actually adjustable, section 2.10.3 - voltage_out=1.1 * Volt(tol=0.03), # default is 1.1v nominal with 3% variation (Table 192) - current_limits=(0, 100) * mAmp, # Table 1, max current - ) - ) - self.vreg_vin = self.Port( - VoltageSink( - voltage_limits=(1.62, 3.63) * Volt, # Table 628 - current_draw=self.vreg_vout.is_connected().then_else( - self.vreg_vout.link().current_drawn, 0 * Amp(tol=0) - ), - ) + ).remap_pins( + { + "GPIO0": "2", + "GPIO1": "3", + "GPIO2": "4", + "GPIO3": "5", + "GPIO4": "6", + "GPIO5": "7", + "GPIO6": "8", + "GPIO7": "9", + "GPIO8": "11", + "GPIO9": "12", + "GPIO10": "13", + "GPIO11": "14", + "GPIO12": "15", + "GPIO13": "16", + "GPIO14": "17", + "GPIO15": "18", + "GPIO16": "27", + "GPIO17": "28", + "GPIO18": "29", + "GPIO19": "30", + "GPIO20": "31", + "GPIO21": "32", + "GPIO22": "34", + "GPIO23": "35", + "GPIO24": "36", + "GPIO25": "37", + "GPIO26": "38", + "GPIO27": "39", + "GPIO28": "40", + "GPIO29": "41", + "USB_DM": "46", + "USB_DP": "47", + "SWDIO": "25", + "SWCLK": "24", + } ) - self.usb_vdd = self.Port( - VoltageSink( - voltage_limits=RangeExpr(), # depends on if USB is needed - current_draw=(0.2, 2.0) * mAmp, # Table 629 typ BOOTSEL Idle to max BOOTSEL Active - ) - ) - self.adc_avdd = self.Port( - VoltageSink( - voltage_limits=(2.97, 3.63) * Volt, # Table 628, performance compromised at <2.97V, lowest 1.62V - # current draw not specified in datasheet - ) - ) - - # Additional ports (on top of IoController) - self.qspi = self.Port(SpiController.empty()) # TODO actually QSPI - self.qspi_cs = self.Port(DigitalBidir.empty()) - self.qspi_sd2 = self.Port(DigitalBidir.empty()) - self.qspi_sd3 = self.Port(DigitalBidir.empty()) - - self.xosc = self.Port( - CrystalDriver( - frequency_limits=(1, 15) * MHertz, voltage_out=self.iovdd.link().voltage # datasheet 2.15.2.2 - ), - optional=True, - ) - - self.swd = self.Port(SwdTargetPort.empty()) - self.run = self.Port(DigitalSink.empty(), optional=True) # internally pulled up - self._io_ports.insert(0, self.swd) - - @override - def contents(self) -> None: - super().contents() - - # Port models - dio_ft_model = dio_std_model = self._dio_model(self.iovdd) - self.qspi.init_from(SpiController(dio_std_model)) - self.qspi_cs.init_from(dio_std_model) - self.qspi_sd2.init_from(dio_std_model) - self.qspi_sd3.init_from(dio_std_model) - self.run.init_from(DigitalSink.from_bidir(dio_ft_model)) - - # Pin/peripheral resource definitions (table 3) - @override - def _system_pinmap(self) -> Dict[str, Union[Passive, HasPassivePort]]: - return { - "51": self.qspi_sd3, - "52": self.qspi.sck, - "53": self.qspi.mosi, # IO0 - "54": self.qspi_sd2, - "55": self.qspi.miso, # IO1 - "56": self.qspi_cs, # IO1 - "20": self.xosc.xtal_in, - "21": self.xosc.xtal_out, - "24": self.swd.swclk, - "25": self.swd.swdio, - "26": self.run, - "19": self.gnd, # TESTEN, connect to gnd - "1": self.iovdd, - "10": self.iovdd, - "22": self.iovdd, - "33": self.iovdd, - "42": self.iovdd, - "49": self.iovdd, - "23": self.dvdd, - "50": self.dvdd, - "44": self.vreg_vin, - "45": self.vreg_vout, - "48": self.usb_vdd, - "43": self.adc_avdd, - "57": self.gnd, # pad - } - - @override - def generate(self) -> None: - super().generate() - - if not self.get(self.usb.requested()): # Table 628, VDD_USB can be lower if USB not used (section 2.9.4) - self.assign(self.usb_vdd.voltage_limits, (1.62, 3.63) * Volt) - else: - self.assign(self.usb_vdd.voltage_limits, (3.135, 3.63) * Volt) - - self.footprint( - "U", - "Package_DFN_QFN:QFN-56-1EP_7x7mm_P0.4mm_EP3.2x3.2mm", - self._make_pinning(), - mfr="Raspberry Pi", - part="RP2040", - datasheet="https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf", - ) - self.assign(self.lcsc_part, "C2040") - self.assign(self.actual_basic_part, False) class Rp2040( From ad0c0832f16afacb289bd040963c71f80f34266f Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Sun, 24 May 2026 11:36:10 -0700 Subject: [PATCH 10/26] wip --- edg/parts/microcontroller/Rp2040.py | 107 +++++++++++++++++----------- 1 file changed, 64 insertions(+), 43 deletions(-) diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index 92924a4c2..2934e88af 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -1,4 +1,3 @@ -from abc import abstractmethod from typing import * from typing_extensions import override @@ -13,6 +12,43 @@ class Rp2040_Interfaces(IoControllerI2cTarget, IoControllerUsb, BaseIoController class Rp2040_Device(BaseIoControllerPinmapGenerator, InternalSubcircuit, GeneratorBlock, JlcPart, FootprintBlock): + _PIN_MAPPING = { + "GPIO0": "2", + "GPIO1": "3", + "GPIO2": "4", + "GPIO3": "5", + "GPIO4": "6", + "GPIO5": "7", + "GPIO6": "8", + "GPIO7": "9", + "GPIO8": "11", + "GPIO9": "12", + "GPIO10": "13", + "GPIO11": "14", + "GPIO12": "15", + "GPIO13": "16", + "GPIO14": "17", + "GPIO15": "18", + "GPIO16": "27", + "GPIO17": "28", + "GPIO18": "29", + "GPIO19": "30", + "GPIO20": "31", + "GPIO21": "32", + "GPIO22": "34", + "GPIO23": "35", + "GPIO24": "36", + "GPIO25": "37", + "GPIO26": "38", + "GPIO27": "39", + "GPIO28": "40", + "GPIO29": "41", + "USB_DM": "46", + "USB_DP": "47", + "SWDIO": "25", + "SWCLK": "24", + } + def __init__(self, **kwargs: Any) -> None: super().__init__(**kwargs) @@ -256,44 +292,7 @@ def _io_pinmap(self) -> PinMapUtil: }, ), ] - ).remap_pins( - { - "GPIO0": "2", - "GPIO1": "3", - "GPIO2": "4", - "GPIO3": "5", - "GPIO4": "6", - "GPIO5": "7", - "GPIO6": "8", - "GPIO7": "9", - "GPIO8": "11", - "GPIO9": "12", - "GPIO10": "13", - "GPIO11": "14", - "GPIO12": "15", - "GPIO13": "16", - "GPIO14": "17", - "GPIO15": "18", - "GPIO16": "27", - "GPIO17": "28", - "GPIO18": "29", - "GPIO19": "30", - "GPIO20": "31", - "GPIO21": "32", - "GPIO22": "34", - "GPIO23": "35", - "GPIO24": "36", - "GPIO25": "37", - "GPIO26": "38", - "GPIO27": "39", - "GPIO28": "40", - "GPIO29": "41", - "USB_DM": "46", - "USB_DP": "47", - "SWDIO": "25", - "SWCLK": "24", - } - ) + ).remap_pins(self._PIN_MAPPING) class Rp2040( @@ -376,7 +375,7 @@ def _crystal_required(self) -> bool: # crystal needed for USB b/c tighter freq class Xiao_Rp2040_Device(Rp2040_Interfaces, InternalSubcircuit, GeneratorBlock, FootprintBlock): """Footprint-only device model for the Xiao RP2040 microcontroller dev board""" - PIN_REMAP = { + _PIN_REMAPPING = { "GPIO26": "1", "GPIO27": "2", "GPIO28": "3", @@ -390,15 +389,20 @@ class Xiao_Rp2040_Device(Rp2040_Interfaces, InternalSubcircuit, GeneratorBlock, "GPIO3": "11", } - def __init__(self, device_actual_pin_assigns: ArrayStringLike): + def __init__(self, model_actual_pin_assigns: ArrayStringLike): super().__init__() - self.device_actual_pin_assigns = self.ArgParameter(device_actual_pin_assigns) + self.model_actual_pin_assigns = self.ArgParameter(model_actual_pin_assigns) self.gnd = self.Port(Ground.empty()) self.v3v3 = self.Port(VoltageSink.empty(), optional=True) self.v3v3_out = self.Port(VoltageSource.empty(), optional=True) self.vcc = self.Port(VoltageSink.empty(), optional=True) # VUsb self.vcc_out = self.Port(VoltageSource.empty(), optional=True) - self.generator_param(self.v3v3.is_connected(), self.vcc.is_connected()) + self.generator_param(self.v3v3.is_connected(), self.vcc.is_connected(), self.model_actual_pin_assigns) + + def _remap_pinning(self, actual_pin_assigns: List[str], remapping: Dict[str, str]) -> Dict[str, HasPassivePort]: + """Given the actual pin assignments and a remapping dict, returns the pinning dict for the footprint.""" + print(self.get(self.model_actual_pin_assigns)) + return {} @override def generate(self) -> None: @@ -409,6 +413,7 @@ def generate(self) -> None: "13": self.gnd, "14": self.vcc if self.get(self.vcc.is_connected()) else self.vcc_out, # VUsb } + pinning.update(self._remap_pinning(self.get(self.model_actual_pin_assigns), self._PIN_REMAPPING)) self.footprint( "U", @@ -481,6 +486,22 @@ def contents(self) -> None: self.device = self.Block(Xiao_Rp2040_Device(self.ic.actual_pin_assigns), external=True) self.export_tap(self.gnd, self.device.gnd) + self.export_tap_iocontroller(self.device) + + def export_tap_iocontroller(self, inner: BaseIoController) -> None: + from ...core.Blocks import BlockElaborationState + + assert self._elaboration_state in ( + BlockElaborationState.contents, + BlockElaborationState.generate, + ), "can only export in contents() or generate()" + inner_ios_by_type = {self._type_of_io(io_port): io_port for io_port in inner._io_ports} + + for self_io in self._io_ports: + self_io_type = self._type_of_io(self_io) + assert self_io_type in inner_ios_by_type, f"inner missing IO of type {self_io_type}" + inner_io = inner_ios_by_type[self_io_type] + self.export_tap(self_io, inner_io) @override def generate(self) -> None: From 7d39df68e20b8f527dddc94b1a454ae2b06143bb Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Sun, 24 May 2026 11:41:28 -0700 Subject: [PATCH 11/26] wip empty port generator --- edg/parts/microcontroller/Rp2040.py | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index 2934e88af..8f712e1be 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -399,6 +399,26 @@ def __init__(self, model_actual_pin_assigns: ArrayStringLike): self.vcc_out = self.Port(VoltageSource.empty(), optional=True) self.generator_param(self.v3v3.is_connected(), self.vcc.is_connected(), self.model_actual_pin_assigns) + # TODO MOVE TO INFRASTRUCTURE + for io_port in self._io_ports: + if isinstance(io_port, Vector): + self.generator_param(io_port.requested()) + elif isinstance(io_port, Port): + self.generator_param(io_port.is_connected()) + else: + raise NotImplementedError(f"unknown port type {io_port}") + + def _generate_empty_ios(self) -> None: + from ...core.Blocks import BlockElaborationState + + assert self._elaboration_state == BlockElaborationState.generate, "can only run in generate()" + + for io_port in self._io_ports: + if isinstance(io_port, Vector): + io_port.defined() + for subport_name in self.get(io_port.requested()): + io_port.append_elt(io_port._tpe.empty(), subport_name) + def _remap_pinning(self, actual_pin_assigns: List[str], remapping: Dict[str, str]) -> Dict[str, HasPassivePort]: """Given the actual pin assignments and a remapping dict, returns the pinning dict for the footprint.""" print(self.get(self.model_actual_pin_assigns)) @@ -408,6 +428,8 @@ def _remap_pinning(self, actual_pin_assigns: List[str], remapping: Dict[str, str def generate(self) -> None: super().generate() + self._generate_empty_ios() + pinning: Dict[str, HasPassivePort] = { "12": self.v3v3 if self.get(self.v3v3.is_connected()) else self.v3v3_out, "13": self.gnd, @@ -494,7 +516,7 @@ def export_tap_iocontroller(self, inner: BaseIoController) -> None: assert self._elaboration_state in ( BlockElaborationState.contents, BlockElaborationState.generate, - ), "can only export in contents() or generate()" + ), "can only run in contents() or generate()" inner_ios_by_type = {self._type_of_io(io_port): io_port for io_port in inner._io_ports} for self_io in self._io_ports: From 1dcc3e7edba97be5e2f0b1f958d40d1b2b5be11d Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Sun, 24 May 2026 12:57:40 -0700 Subject: [PATCH 12/26] working end to end --- edg/parts/microcontroller/Rp2040.py | 66 ++++++++++++++++++++++------- 1 file changed, 50 insertions(+), 16 deletions(-) diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index 8f712e1be..bd24c042c 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -389,15 +389,15 @@ class Xiao_Rp2040_Device(Rp2040_Interfaces, InternalSubcircuit, GeneratorBlock, "GPIO3": "11", } - def __init__(self, model_actual_pin_assigns: ArrayStringLike): + def __init__(self, model_pin_assigns: ArrayStringLike): super().__init__() - self.model_actual_pin_assigns = self.ArgParameter(model_actual_pin_assigns) + self.model_pin_assigns = self.ArgParameter(model_pin_assigns) self.gnd = self.Port(Ground.empty()) self.v3v3 = self.Port(VoltageSink.empty(), optional=True) self.v3v3_out = self.Port(VoltageSource.empty(), optional=True) self.vcc = self.Port(VoltageSink.empty(), optional=True) # VUsb self.vcc_out = self.Port(VoltageSource.empty(), optional=True) - self.generator_param(self.v3v3.is_connected(), self.vcc.is_connected(), self.model_actual_pin_assigns) + self.generator_param(self.v3v3.is_connected(), self.vcc.is_connected(), self.model_pin_assigns) # TODO MOVE TO INFRASTRUCTURE for io_port in self._io_ports: @@ -408,34 +408,67 @@ def __init__(self, model_actual_pin_assigns: ArrayStringLike): else: raise NotImplementedError(f"unknown port type {io_port}") - def _generate_empty_ios(self) -> None: - from ...core.Blocks import BlockElaborationState - - assert self._elaboration_state == BlockElaborationState.generate, "can only run in generate()" + def _remap_pinning_assigns( + self, model_pin_assigns: List[str], remapping: Dict[str, str] + ) -> Tuple[Dict[str, HasPassivePort], Dict[str, str]]: + """Given the actual pin assignments and a remapping dict, returns the pinning dict for the footprint + and the updated actual pin assignments. + Generates concrete ports elements for IO Vectors""" + pinning: Dict[str, HasPassivePort] = {} + actual_pin_assigns: Dict[str, str] = {} + seen_names: Set[str] = set() + + model_pin_assigns_dict: Dict[str, str] = {} + for assign in model_pin_assigns: + name, pindef = assign.split("=") + pins = pindef.split(",") + model_pin_assigns_dict[name.strip()] = pins[0].strip() # use the GPIO name + + def remap_port_recursive(port: Port, prefix: str = "") -> None: + """Remaps a port, recursively for bundles""" + if isinstance(port, HasPassivePort): + if prefix not in model_pin_assigns_dict: + raise ValueError(f"pin {prefix} not assigned") + pin = model_pin_assigns_dict[prefix] + if pin not in remapping: + raise ValueError(f"pin {pin} not in remapping") + remapped_pin = remapping[pin] + pinning[remapped_pin] = port + actual_pin_assigns[prefix] = f"{pin}, {remapped_pin}" + + for subport_name, subport in port._ports.items(): + remap_port_recursive(subport, f"{prefix}.{subport_name}") for io_port in self._io_ports: if isinstance(io_port, Vector): io_port.defined() for subport_name in self.get(io_port.requested()): - io_port.append_elt(io_port._tpe.empty(), subport_name) + assert subport_name not in seen_names, f"duplicate pin name {subport_name}" + subport = io_port.append_elt(io_port._tpe.empty(), subport_name) + remap_port_recursive(subport, subport_name) + seen_names.add(subport_name) + elif isinstance(io_port, Port): + if self.get(io_port.is_connected()): + raise NotImplementedError("TODO implement me") + else: + raise NotImplementedError(f"unknown port type {io_port}") - def _remap_pinning(self, actual_pin_assigns: List[str], remapping: Dict[str, str]) -> Dict[str, HasPassivePort]: - """Given the actual pin assignments and a remapping dict, returns the pinning dict for the footprint.""" - print(self.get(self.model_actual_pin_assigns)) - return {} + return pinning, actual_pin_assigns @override def generate(self) -> None: super().generate() - self._generate_empty_ios() - pinning: Dict[str, HasPassivePort] = { "12": self.v3v3 if self.get(self.v3v3.is_connected()) else self.v3v3_out, "13": self.gnd, "14": self.vcc if self.get(self.vcc.is_connected()) else self.vcc_out, # VUsb } - pinning.update(self._remap_pinning(self.get(self.model_actual_pin_assigns), self._PIN_REMAPPING)) + remap_pinnings, remap_pin_assigns = self._remap_pinning_assigns( + self.get(self.model_pin_assigns), self._PIN_REMAPPING + ) + pinning.update(remap_pinnings) + self.assign(self.actual_pin_assigns, [f"{k}={v}" for k, v in remap_pin_assigns.items()]) self.footprint( "U", @@ -506,9 +539,10 @@ def contents(self) -> None: self.ic = self.Block(Rp2040(pin_assigns=ArrayStringExpr())) self.connect(self.gnd, self.ic.gnd) - self.device = self.Block(Xiao_Rp2040_Device(self.ic.actual_pin_assigns), external=True) + self.device = self.Block(Xiao_Rp2040_Device(model_pin_assigns=self.ic.actual_pin_assigns), external=True) self.export_tap(self.gnd, self.device.gnd) self.export_tap_iocontroller(self.device) + # TODO propgate actual_pin_assigns from device instead of model def export_tap_iocontroller(self, inner: BaseIoController) -> None: from ...core.Blocks import BlockElaborationState From 987aad12f383c5d4ab5b4cc11c4424c7691a60ad Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Sun, 24 May 2026 14:09:56 -0700 Subject: [PATCH 13/26] cleaning --- edg/parts/microcontroller/Rp2040.py | 28 +++++++++++++++---- examples/BasicKeyboard/BasicKeyboard.net.ref | 4 +-- .../BasicKeyboard/BasicKeyboard.svgpcb.js | 6 ++-- .../TestBlinkyBasic/TestBlinkyBasic.net.ref | 19 ++++++------- .../TestBlinkyBasic/TestBlinkyBasic.svgpcb.js | 20 ++++++------- .../TestBlinkyBasicBattery.net.ref | 11 ++++---- .../TestBlinkyBasicBattery.svgpcb.js | 11 ++++---- 7 files changed, 57 insertions(+), 42 deletions(-) diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index bd24c042c..55702a49b 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -11,7 +11,9 @@ class Rp2040_Interfaces(IoControllerI2cTarget, IoControllerUsb, BaseIoController """Defines base interfaces for ESP32C3 microcontrollers""" -class Rp2040_Device(BaseIoControllerPinmapGenerator, InternalSubcircuit, GeneratorBlock, JlcPart, FootprintBlock): +class Rp2040_Device( + Rp2040_Interfaces, BaseIoControllerPinmapGenerator, InternalSubcircuit, GeneratorBlock, JlcPart, FootprintBlock +): _PIN_MAPPING = { "GPIO0": "2", "GPIO1": "3", @@ -392,7 +394,7 @@ class Xiao_Rp2040_Device(Rp2040_Interfaces, InternalSubcircuit, GeneratorBlock, def __init__(self, model_pin_assigns: ArrayStringLike): super().__init__() self.model_pin_assigns = self.ArgParameter(model_pin_assigns) - self.gnd = self.Port(Ground.empty()) + self.gnd = self.Port(Ground.empty(), optional=True) self.v3v3 = self.Port(VoltageSink.empty(), optional=True) self.v3v3_out = self.Port(VoltageSource.empty(), optional=True) self.vcc = self.Port(VoltageSink.empty(), optional=True) # VUsb @@ -485,7 +487,7 @@ class Xiao_Rp2040( IoControllerPowerOut, IoControllerVin, IoController, - BaseIoControllerExportable, # TODO this breaks something + BaseIoControllerExportable, GeneratorBlock, WrapperSubboardBlock, ): @@ -505,6 +507,7 @@ def __init__(self, **kwargs: Any) -> None: super().__init__(**kwargs) self.ic: Rp2040_Device # device model only self.generator_param( + self.gnd.is_connected(), self.pwr.is_connected(), self.pwr_out.is_connected(), self.pwr_vin.is_connected(), @@ -535,12 +538,20 @@ def contents(self) -> None: "cannot use 3.3v input if VUsb used", ) self.require(~self.pwr_out.is_connected() | ~self.pwr.is_connected(), "cannot use both 3.3v out and 3.3v in") + self.require( + ( + self.pwr_vin.is_connected() + | self.vusb_out.is_connected() + | self.pwr.is_connected() + | self.pwr_out.is_connected() + ).implies(self.gnd.is_connected()), + "ground required if power used", + ) self.ic = self.Block(Rp2040(pin_assigns=ArrayStringExpr())) - self.connect(self.gnd, self.ic.gnd) self.device = self.Block(Xiao_Rp2040_Device(model_pin_assigns=self.ic.actual_pin_assigns), external=True) - self.export_tap(self.gnd, self.device.gnd) + self.export_tap_iocontroller(self.device) # TODO propgate actual_pin_assigns from device instead of model @@ -582,3 +593,10 @@ def generate(self) -> None: self.export_tap(self.pwr_vin, self.device.vcc) if self.get(self.vusb_out.is_connected()): self.export_tap(self.vusb_out, self.device.vcc_out) + + self.export_tap(self.gnd, self.device.gnd) + if self.get(self.gnd.is_connected()): + self.connect(self.gnd, self.ic.gnd) + else: + self.gnd_model = self.Block(DummyGround()) + self.connect(self.gnd_model.gnd, self.ic.gnd) diff --git a/examples/BasicKeyboard/BasicKeyboard.net.ref b/examples/BasicKeyboard/BasicKeyboard.net.ref index 1430d5ed6..d9309348f 100644 --- a/examples/BasicKeyboard/BasicKeyboard.net.ref +++ b/examples/BasicKeyboard/BasicKeyboard.net.ref @@ -5,7 +5,7 @@ (footprint "Seeed Studio XIAO Series Library:XIAO-RP2040-SMD") (property (name "Sheetname") (value "")) (property (name "Sheetfile") (value "")) - (property (name "edg_path") (value "mcu")) + (property (name "edg_path") (value "mcu.device")) (property (name "edg_short_path") (value "mcu")) (property (name "edg_refdes") (value "U1")) (property (name "edg_part") (value "XIAO RP2040")) @@ -183,7 +183,7 @@ (node (ref U1) (pin 13))) (net (code 7) (name "mcu.pwr_out") (node (ref U1) (pin 12))) -(net (code 8) (name "mcu.vusb_out") +(net (code 8) (name "mcu.device.vcc_out") (node (ref U1) (pin 14))) (net (code 9) (name "sw.sw[0,0].sw") (node (ref SW1) (pin 1)) diff --git a/examples/BasicKeyboard/BasicKeyboard.svgpcb.js b/examples/BasicKeyboard/BasicKeyboard.svgpcb.js index 055e7e1f9..12949d788 100644 --- a/examples/BasicKeyboard/BasicKeyboard.svgpcb.js +++ b/examples/BasicKeyboard/BasicKeyboard.svgpcb.js @@ -1,7 +1,7 @@ const board = new PCB(); const sw = SwitchMatrix_2_3_sw(pt(0.039, 0.039)) -// mcu +// mcu.device const U1 = board.add(XIAO_RP2040_SMD, { translate: pt(1.466, 0.410), rotate: 0, id: 'U1' @@ -15,7 +15,7 @@ board.setNetlist([ {name: "mcu.gpio.1_2", pads: [["U1", "10"], ["D3", "2"], ["D6", "2"]]}, {name: "mcu.gnd", pads: [["U1", "13"]]}, {name: "mcu.pwr_out", pads: [["U1", "12"]]}, - {name: "mcu.vusb_out", pads: [["U1", "14"]]}, + {name: "mcu.device.vcc_out", pads: [["U1", "14"]]}, {name: "sw.sw[0,0].sw", pads: [["SW1", "1"], ["D1", "1"]]}, {name: "sw.sw[0,1].sw", pads: [["SW2", "1"], ["D2", "1"]]}, {name: "sw.sw[0,2].sw", pads: [["SW3", "1"], ["D3", "1"]]}, @@ -25,7 +25,7 @@ board.setNetlist([ ]) const limit0 = pt(-0.07874015748031496, -0.07874015748031496); -const limit1 = pt(1.85748031496063, 2.1181102362204722); +const limit1 = pt(1.936220472440945, 2.1181102362204722); const xMin = Math.min(limit0[0], limit1[0]); const xMax = Math.max(limit0[0], limit1[0]); const yMin = Math.min(limit0[1], limit1[1]); diff --git a/examples/TestBlinkyBasic/TestBlinkyBasic.net.ref b/examples/TestBlinkyBasic/TestBlinkyBasic.net.ref index ffaabad2c..4f6524606 100644 --- a/examples/TestBlinkyBasic/TestBlinkyBasic.net.ref +++ b/examples/TestBlinkyBasic/TestBlinkyBasic.net.ref @@ -2,14 +2,14 @@ (components (comp (ref "U1") (value "mcu") - (footprint "edg:Nucleo32") + (footprint "Seeed Studio XIAO Series Library:XIAO-RP2040-SMD") (property (name "Sheetname") (value "")) (property (name "Sheetfile") (value "")) - (property (name "edg_path") (value "mcu")) + (property (name "edg_path") (value "mcu.device")) (property (name "edg_short_path") (value "mcu")) (property (name "edg_refdes") (value "U1")) - (property (name "edg_part") (value "NUCLEO-F303K8 (STMicroelectronics)")) - (property (name "edg_value") (value "NUCLEO-F303K8")) + (property (name "edg_part") (value "XIAO RP2040")) + (property (name "edg_value") (value "XIAO RP2040")) (sheetpath (names "/") (tstamps "/")) (tstamps "02850146")) (comp (ref "D1") @@ -38,15 +38,14 @@ (tstamps "0296014b"))) (nets (net (code 1) (name "mcu.gnd") - (node (ref U1) (pin 17)) - (node (ref U1) (pin 4)) + (node (ref U1) (pin 13)) (node (ref R1) (pin 2))) (net (code 2) (name "mcu.pwr_out") - (node (ref U1) (pin 29))) -(net (code 3) (name "mcu.vusb_out") - (node (ref U1) (pin 19))) + (node (ref U1) (pin 12))) +(net (code 3) (name "mcu.device.vcc_out") + (node (ref U1) (pin 14))) (net (code 4) (name "led.signal") - (node (ref U1) (pin 10)) + (node (ref U1) (pin 7)) (node (ref D1) (pin 2))) (net (code 5) (name "led.package.k") (node (ref D1) (pin 1)) diff --git a/examples/TestBlinkyBasic/TestBlinkyBasic.svgpcb.js b/examples/TestBlinkyBasic/TestBlinkyBasic.svgpcb.js index 252493c03..64dacd4ad 100644 --- a/examples/TestBlinkyBasic/TestBlinkyBasic.svgpcb.js +++ b/examples/TestBlinkyBasic/TestBlinkyBasic.svgpcb.js @@ -1,31 +1,31 @@ const board = new PCB(); -// mcu -const U1 = board.add(Nucleo32, { - translate: pt(0.365, 0.990), rotate: 0, +// mcu.device +const U1 = board.add(XIAO_RP2040_SMD, { + translate: pt(0.348, 0.410), rotate: 0, id: 'U1' }) // led.package const D1 = board.add(LED_0603_1608Metric, { - translate: pt(0.828, 0.029), rotate: 0, + translate: pt(0.877, 0.029), rotate: 0, id: 'D1' }) // led.res const R1 = board.add(R_0603_1608Metric, { - translate: pt(0.828, 0.126), rotate: 0, + translate: pt(0.876, 0.126), rotate: 0, id: 'R1' }) board.setNetlist([ - {name: "mcu.gnd", pads: [["U1", "17"], ["U1", "4"], ["R1", "2"]]}, - {name: "mcu.pwr_out", pads: [["U1", "29"]]}, - {name: "mcu.vusb_out", pads: [["U1", "19"]]}, - {name: "led.signal", pads: [["U1", "10"], ["D1", "2"]]}, + {name: "mcu.gnd", pads: [["U1", "13"], ["R1", "2"]]}, + {name: "mcu.pwr_out", pads: [["U1", "12"]]}, + {name: "mcu.device.vcc_out", pads: [["U1", "14"]]}, + {name: "led.signal", pads: [["U1", "7"], ["D1", "2"]]}, {name: "led.package.k", pads: [["D1", "1"], ["R1", "1"]]} ]) const limit0 = pt(-0.07874015748031496, -0.07874015748031496); -const limit1 = pt(1.0041338582677166, 2.0192913385826774); +const limit1 = pt(1.0529527559055119, 0.9986220472440945); const xMin = Math.min(limit0[0], limit1[0]); const xMax = Math.max(limit0[0], limit1[0]); const yMin = Math.min(limit0[1], limit1[1]); diff --git a/examples/TestBlinkyBasicBattery/TestBlinkyBasicBattery.net.ref b/examples/TestBlinkyBasicBattery/TestBlinkyBasicBattery.net.ref index 2ce5636b1..d6862010e 100644 --- a/examples/TestBlinkyBasicBattery/TestBlinkyBasicBattery.net.ref +++ b/examples/TestBlinkyBasicBattery/TestBlinkyBasicBattery.net.ref @@ -53,7 +53,7 @@ (footprint "Seeed Studio XIAO Series Library:XIAO-RP2040-SMD") (property (name "Sheetname") (value "")) (property (name "Sheetfile") (value "")) - (property (name "edg_path") (value "mcu")) + (property (name "edg_path") (value "mcu.device")) (property (name "edg_short_path") (value "mcu")) (property (name "edg_refdes") (value "U5")) (property (name "edg_part") (value "XIAO RP2040")) @@ -86,7 +86,8 @@ (tstamps "0296014b"))) (nets (net (code 1) (name "bat.pwr") - (node (ref U4) (pin 1))) + (node (ref U4) (pin 1)) + (node (ref U5) (pin 14))) (net (code 2) (name "bat.gnd") (node (ref U1) (pin 2)) (node (ref U5) (pin 13)) @@ -102,12 +103,10 @@ (node (ref U4) (pin 2))) (net (code 6) (name "mcu.pwr_out") (node (ref U5) (pin 12))) -(net (code 7) (name "mcu.vusb_out") - (node (ref U5) (pin 14))) -(net (code 8) (name "led.signal") +(net (code 7) (name "led.signal") (node (ref U5) (pin 7)) (node (ref D1) (pin 2))) -(net (code 9) (name "led.package.k") +(net (code 8) (name "led.package.k") (node (ref D1) (pin 1)) (node (ref R1) (pin 1)))) ) \ No newline at end of file diff --git a/examples/TestBlinkyBasicBattery/TestBlinkyBasicBattery.svgpcb.js b/examples/TestBlinkyBasicBattery/TestBlinkyBasicBattery.svgpcb.js index f7df9e946..81f790f12 100644 --- a/examples/TestBlinkyBasicBattery/TestBlinkyBasicBattery.svgpcb.js +++ b/examples/TestBlinkyBasicBattery/TestBlinkyBasicBattery.svgpcb.js @@ -20,36 +20,35 @@ const U4 = board.add(BatteryHolder_Keystone_2460_1xAA, { translate: pt(0.108, 2.516), rotate: 0, id: 'U4' }) -// mcu +// mcu.device const U5 = board.add(XIAO_RP2040_SMD, { translate: pt(2.730, 0.410), rotate: 0, id: 'U5' }) // led.package const D1 = board.add(LED_0603_1608Metric, { - translate: pt(3.180, 0.029), rotate: 0, + translate: pt(3.258, 0.029), rotate: 0, id: 'D1' }) // led.res const R1 = board.add(R_0603_1608Metric, { - translate: pt(3.180, 0.126), rotate: 0, + translate: pt(3.258, 0.126), rotate: 0, id: 'R1' }) board.setNetlist([ - {name: "bat.pwr", pads: [["U4", "1"]]}, + {name: "bat.pwr", pads: [["U4", "1"], ["U5", "14"]]}, {name: "bat.gnd", pads: [["U1", "2"], ["U5", "13"], ["R1", "2"]]}, {name: "bat.cell[0].pwr", pads: [["U1", "1"], ["U2", "2"]]}, {name: "bat.cell[1].pwr", pads: [["U2", "1"], ["U3", "2"]]}, {name: "bat.cell[2].pwr", pads: [["U3", "1"], ["U4", "2"]]}, {name: "mcu.pwr_out", pads: [["U5", "12"]]}, - {name: "mcu.vusb_out", pads: [["U5", "14"]]}, {name: "led.signal", pads: [["U5", "7"], ["D1", "2"]]}, {name: "led.package.k", pads: [["D1", "1"], ["R1", "1"]]} ]) const limit0 = pt(-0.07874015748031496, -0.07874015748031496); -const limit1 = pt(3.356102362204725, 2.9763779527559056); +const limit1 = pt(3.4348425196850396, 2.9763779527559056); const xMin = Math.min(limit0[0], limit1[0]); const xMax = Math.max(limit0[0], limit1[0]); const yMin = Math.min(limit0[1], limit1[1]); From 81834f915871f1900432c4292ada1a725a7e42aa Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Sun, 24 May 2026 16:10:21 -0700 Subject: [PATCH 14/26] beginning refactor --- edg/abstract_parts/IoControllerWrapper.py | 64 +++++++++++++++++++++++ edg/abstract_parts/__init__.py | 1 + edg/parts/microcontroller/Rp2040.py | 53 ++----------------- 3 files changed, 68 insertions(+), 50 deletions(-) create mode 100644 edg/abstract_parts/IoControllerWrapper.py diff --git a/edg/abstract_parts/IoControllerWrapper.py b/edg/abstract_parts/IoControllerWrapper.py new file mode 100644 index 000000000..ca38e76a7 --- /dev/null +++ b/edg/abstract_parts/IoControllerWrapper.py @@ -0,0 +1,64 @@ +from typing import * + +from ..electronics_interfaces import * +from .IoController import BaseIoController + + +class IoControllerWrapper(BaseIoController): + """Base class for IoController wrapped blocks, particularly footprints that are used + with an outer WrapperSubboardBlock to implement e.g. a dev board or module around a modeling subcircuit. + + Provides some utility functions to remap pin assignments from the model to the footprint. + """ + + def _remap_pinning_assigns( + self, model_pin_assigns: List[str], remapping: Dict[str, str] + ) -> Tuple[Dict[str, HasPassivePort], Dict[str, str]]: + """Given the actual pin assignments and a remapping dict, returns the pinning dict for the footprint + and the updated actual pin assignments. + Generates concrete ports elements for IO Vectors""" + pinning: Dict[str, HasPassivePort] = {} + actual_pin_assigns: Dict[str, str] = {} + seen_names: Set[str] = set() + + model_pin_assigns_dict: Dict[str, str] = {} + for assign in model_pin_assigns: + name, pindef = assign.split("=") + pins = pindef.split(",") + model_pin_assigns_dict[name.strip()] = pins[0].strip() # use the GPIO name + + def remap_port_recursive(port: Port, prefix: str = "") -> None: + """Remaps a port, recursively for bundles""" + if isinstance(port, HasPassivePort): + if prefix not in model_pin_assigns_dict: + raise ValueError(f"pin {prefix} not assigned") + pin = model_pin_assigns_dict[prefix] + if pin not in remapping: + raise ValueError(f"pin {pin} not in remapping") + remapped_pin = remapping[pin] + pinning[remapped_pin] = port + actual_pin_assigns[prefix] = f"{pin}, {remapped_pin}" + + for subport_name, subport in port._ports.items(): + remap_port_recursive(subport, f"{prefix}.{subport_name}") + + for io_port in self._io_ports: + if isinstance(io_port, Vector): + io_port.defined() + for subport_name in self.get(io_port.requested()): + assert subport_name not in seen_names, f"duplicate pin name {subport_name}" + subport = io_port.append_elt(io_port._tpe.empty(), subport_name) + remap_port_recursive(subport, subport_name) + seen_names.add(subport_name) + elif isinstance(io_port, Port): + if self.get(io_port.is_connected()): + raise NotImplementedError("TODO implement me") + else: + raise NotImplementedError(f"unknown port type {io_port}") + + return pinning, actual_pin_assigns + + def _remap_assigns_to_value(self, assigns: Dict[str, str]) -> List[str]: + """Given a dict of pin assigns from _remap_pinning_assigns, returns a list of assign strings + eefor use in self.actual_pin_assigns""" + return [f"{name}={assign}" for name, assign in assigns.items()] diff --git a/edg/abstract_parts/__init__.py b/edg/abstract_parts/__init__.py index da0c160ac..23bbc0d63 100644 --- a/edg/abstract_parts/__init__.py +++ b/edg/abstract_parts/__init__.py @@ -129,6 +129,7 @@ from .IoController import BaseIoController, IoController, IoControllerPowerRequired, BaseIoControllerPinmapGenerator from .IoControllerExportable import BaseIoControllerExportable +from .IoControllerWrapper import IoControllerWrapper from .IoControllerInterfaceMixins import ( IoControllerSpiPeripheral, IoControllerI2cTarget, diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index 55702a49b..70147d4cc 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -374,7 +374,7 @@ def _crystal_required(self) -> bool: # crystal needed for USB b/c tighter freq return len(self.get(self.usb.requested())) > 0 or super()._crystal_required() -class Xiao_Rp2040_Device(Rp2040_Interfaces, InternalSubcircuit, GeneratorBlock, FootprintBlock): +class Xiao_Rp2040_Device(Rp2040_Interfaces, IoControllerWrapper, InternalSubcircuit, GeneratorBlock, FootprintBlock): """Footprint-only device model for the Xiao RP2040 microcontroller dev board""" _PIN_REMAPPING = { @@ -410,53 +410,6 @@ def __init__(self, model_pin_assigns: ArrayStringLike): else: raise NotImplementedError(f"unknown port type {io_port}") - def _remap_pinning_assigns( - self, model_pin_assigns: List[str], remapping: Dict[str, str] - ) -> Tuple[Dict[str, HasPassivePort], Dict[str, str]]: - """Given the actual pin assignments and a remapping dict, returns the pinning dict for the footprint - and the updated actual pin assignments. - Generates concrete ports elements for IO Vectors""" - pinning: Dict[str, HasPassivePort] = {} - actual_pin_assigns: Dict[str, str] = {} - seen_names: Set[str] = set() - - model_pin_assigns_dict: Dict[str, str] = {} - for assign in model_pin_assigns: - name, pindef = assign.split("=") - pins = pindef.split(",") - model_pin_assigns_dict[name.strip()] = pins[0].strip() # use the GPIO name - - def remap_port_recursive(port: Port, prefix: str = "") -> None: - """Remaps a port, recursively for bundles""" - if isinstance(port, HasPassivePort): - if prefix not in model_pin_assigns_dict: - raise ValueError(f"pin {prefix} not assigned") - pin = model_pin_assigns_dict[prefix] - if pin not in remapping: - raise ValueError(f"pin {pin} not in remapping") - remapped_pin = remapping[pin] - pinning[remapped_pin] = port - actual_pin_assigns[prefix] = f"{pin}, {remapped_pin}" - - for subport_name, subport in port._ports.items(): - remap_port_recursive(subport, f"{prefix}.{subport_name}") - - for io_port in self._io_ports: - if isinstance(io_port, Vector): - io_port.defined() - for subport_name in self.get(io_port.requested()): - assert subport_name not in seen_names, f"duplicate pin name {subport_name}" - subport = io_port.append_elt(io_port._tpe.empty(), subport_name) - remap_port_recursive(subport, subport_name) - seen_names.add(subport_name) - elif isinstance(io_port, Port): - if self.get(io_port.is_connected()): - raise NotImplementedError("TODO implement me") - else: - raise NotImplementedError(f"unknown port type {io_port}") - - return pinning, actual_pin_assigns - @override def generate(self) -> None: super().generate() @@ -470,7 +423,7 @@ def generate(self) -> None: self.get(self.model_pin_assigns), self._PIN_REMAPPING ) pinning.update(remap_pinnings) - self.assign(self.actual_pin_assigns, [f"{k}={v}" for k, v in remap_pin_assigns.items()]) + self.assign(self.actual_pin_assigns, self._remap_assigns_to_value(remap_pin_assigns)) self.footprint( "U", @@ -505,7 +458,7 @@ class Xiao_Rp2040( def __init__(self, **kwargs: Any) -> None: super().__init__(**kwargs) - self.ic: Rp2040_Device # device model only + self.ic: Rp2040 # device model only self.generator_param( self.gnd.is_connected(), self.pwr.is_connected(), From 52bc1a4b5c2b135495d74c96c6647fcd2f8bd05b Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Sun, 24 May 2026 16:10:40 -0700 Subject: [PATCH 15/26] wip --- .../{IoControllerWrapper.py => IoControllerWrapped.py} | 2 +- edg/abstract_parts/__init__.py | 2 +- edg/parts/microcontroller/Rp2040.py | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) rename edg/abstract_parts/{IoControllerWrapper.py => IoControllerWrapped.py} (98%) diff --git a/edg/abstract_parts/IoControllerWrapper.py b/edg/abstract_parts/IoControllerWrapped.py similarity index 98% rename from edg/abstract_parts/IoControllerWrapper.py rename to edg/abstract_parts/IoControllerWrapped.py index ca38e76a7..2e750544b 100644 --- a/edg/abstract_parts/IoControllerWrapper.py +++ b/edg/abstract_parts/IoControllerWrapped.py @@ -4,7 +4,7 @@ from .IoController import BaseIoController -class IoControllerWrapper(BaseIoController): +class IoControllerWrapped(BaseIoController): """Base class for IoController wrapped blocks, particularly footprints that are used with an outer WrapperSubboardBlock to implement e.g. a dev board or module around a modeling subcircuit. diff --git a/edg/abstract_parts/__init__.py b/edg/abstract_parts/__init__.py index 23bbc0d63..d2b35fdc7 100644 --- a/edg/abstract_parts/__init__.py +++ b/edg/abstract_parts/__init__.py @@ -129,7 +129,7 @@ from .IoController import BaseIoController, IoController, IoControllerPowerRequired, BaseIoControllerPinmapGenerator from .IoControllerExportable import BaseIoControllerExportable -from .IoControllerWrapper import IoControllerWrapper +from .IoControllerWrapped import IoControllerWrapped from .IoControllerInterfaceMixins import ( IoControllerSpiPeripheral, IoControllerI2cTarget, diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index 70147d4cc..f5bdb5210 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -374,7 +374,7 @@ def _crystal_required(self) -> bool: # crystal needed for USB b/c tighter freq return len(self.get(self.usb.requested())) > 0 or super()._crystal_required() -class Xiao_Rp2040_Device(Rp2040_Interfaces, IoControllerWrapper, InternalSubcircuit, GeneratorBlock, FootprintBlock): +class Xiao_Rp2040_Device(Rp2040_Interfaces, IoControllerWrapped, InternalSubcircuit, GeneratorBlock, FootprintBlock): """Footprint-only device model for the Xiao RP2040 microcontroller dev board""" _PIN_REMAPPING = { From b3bad47cb4be4c7de49c18c3dccaf6ec67161d02 Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Mon, 25 May 2026 00:04:19 -0700 Subject: [PATCH 16/26] wip --- edg/abstract_parts/IoController.py | 117 +++++++++++++++++++++++++++- edg/parts/microcontroller/Rp2040.py | 36 +++------ 2 files changed, 125 insertions(+), 28 deletions(-) diff --git a/edg/abstract_parts/IoController.py b/edg/abstract_parts/IoController.py index 7bb8676e2..dced9786b 100644 --- a/edg/abstract_parts/IoController.py +++ b/edg/abstract_parts/IoController.py @@ -1,5 +1,5 @@ from itertools import chain -from typing import List, Dict, Tuple, Type, Optional, Any, Union +from typing import List, Dict, Tuple, Type, Optional, Any, Union, Callable, cast from typing_extensions import override from deprecated import deprecated @@ -77,7 +77,7 @@ def _type_of_io(self, io_port: BasePort) -> Type[Port]: else: raise NotImplementedError(f"unknown port type {io_port}") - @deprecated("use BaseIoControllerExportable") + @deprecated("use _export_ios_inner") def _export_ios_from(self, inner: "BaseIoController", excludes: List[BasePort] = []) -> None: """Exports all the IO ports from an inner BaseIoController to this block's IO ports. Optional exclude list, for example if a more complex connection is needed.""" @@ -92,6 +92,119 @@ def _export_ios_from(self, inner: "BaseIoController", excludes: List[BasePort] = self.connect(self_ios_by_type[inner_io_type], inner_io) self.assign(self.io_current_draw, inner.io_current_draw) + ExportPortTransform = Callable[[BasePort, Optional[str]], Optional[BasePort]] + + def _export_ios_inner( + self, inner: "BaseIoController", transforms: Dict[Type[BasePort], ExportPortTransform] = {} + ) -> ArrayStringExpr: + """Exports all IOs from some inner BaseIoController. + This must be called in contents() or generate(), after IOs have been defined. + + Optionally specify a transform function, by port type, on IOs. + This function takes the outer IO port and assignment name (if specified) and returns the transformed IO port. + For example, this can be used add resistors inline to USB ports. + If returned (transformed) port is None, the connection is discarded (though connections can be made + within the transform function as a side effect). + Otherwise, the returned port is connected to the inner port. + If this function is used, this must be a GeneratorBlock. + + Returns the filtered pin assigns, to pass into the inner block's pin assign. + + In most cases, use _wrap_inner which provides all the wrapping functionality, though + this may be useful where other logic needs to happen with parameters. + """ + from ..core.Blocks import BlockElaborationState + + assert isinstance(self, WrapperSubboardBlock) + assert self._elaboration_state in ( + BlockElaborationState.contents, + BlockElaborationState.generate, + ), "can only run in contents() or generate()" + + if transforms: + assert isinstance(self, GeneratorBlock), "transforms require a GeneratorBlock to work" + assigns_raw = self.get(self.pin_assigns) + # mutated in-place during _make_export_* + assigns = cast(List[Optional[str]], assigns_raw.copy()) + assign_index_by_name = {assign.split("=")[0]: i for i, assign in enumerate(assigns_raw)} + else: + assigns = None + assign_index_by_name = {} + + def connect_port_transformed(self_io: BasePort, inner_io: BasePort, name: str) -> None: + assert transform_fn is not None and assigns is not None + assign_index = assign_index_by_name.get(self_io._name_from(self)) + assign = assigns[assign_index] if assign_index is not None else None + transform_result = transform_fn(self_io, assign) + if transform_result is not None: + self.connect(transform_result, inner_io) + else: + if assign_index is not None: + assigns[assign_index] = None + + inner_ios_by_type = {self._type_of_io(io_port): io_port for io_port in inner._io_ports} + for self_io in self._io_ports: + self_io_type = self._type_of_io(self_io) + assert self_io_type in inner_ios_by_type, f"inner missing IO of type {self_io_type}" + inner_io = inner_ios_by_type[self_io_type] + + transform_fn = transforms.get(self_io_type, None) + + if isinstance(self_io, Vector): + assert isinstance(inner_io, Vector) + if transform_fn is None: + self.connect(self_io, inner_io) + else: + self_io.defined() + for io_requested in self.get(self_io.requested()): + connect_port_transformed( + self_io.append_elt(self_io.elt_type().empty(), io_requested), + inner_io.request(io_requested), + io_requested, + ) + elif isinstance(inner_io, Port): + if transform_fn is None: + self.connect(self_io, inner_io) + else: + connect_port_transformed(self_io, inner_io, self_io._name_from(self)) + else: + raise NotImplementedError(f"unknown port type {self_io}") + + if assigns is not None: + filtered_assigns = [assign for assign in assigns if assign is not None] + return ArrayStringExpr._to_expr_type(filtered_assigns) + else: + return self.pin_assigns + + def _wrap_inner( + self, inner: "BaseIoController", transforms: Dict[Type[BasePort], ExportPortTransform] = {} + ) -> None: + """Wraps an inner BaseIoController, a wrapper around _export_ios_inner as well as any parameters + that needs to be assigned inward or outward.""" + inner_pin_assigns = self._export_ios_inner(inner, transforms) + self.assign(inner.pin_assigns, inner_pin_assigns) + self.assign(self.actual_pin_assigns, inner.actual_pin_assigns) + self.assign(self.io_current_draw, self.ic.io_current_draw) + + def _export_tap_ios_inner(self, inner: "BaseIoController") -> None: + """Export-taps all IO ports from some inner BaseIoController. + This must be a SubboardBlock to support the export_tap connection. + This must be called in contents() or generate(), after IOs have been defined.""" + from ..core.Blocks import BlockElaborationState + + assert isinstance(self, WrapperSubboardBlock) + assert self._elaboration_state in ( + BlockElaborationState.contents, + BlockElaborationState.generate, + ), "can only run in contents() or generate()" + + inner_ios_by_type = {self._type_of_io(io_port): io_port for io_port in inner._io_ports} + for self_io in self._io_ports: + self_io_type = self._type_of_io(self_io) + assert self_io_type in inner_ios_by_type, f"inner missing IO of type {self_io_type}" + inner_io = inner_ios_by_type[self_io_type] + self.export_tap(self_io, inner_io) + @staticmethod def _instantiate_from( ios: List[BasePort], allocations: List[AllocatedResource] diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index f5bdb5210..1eb332476 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -440,7 +440,6 @@ class Xiao_Rp2040( IoControllerPowerOut, IoControllerVin, IoController, - BaseIoControllerExportable, GeneratorBlock, WrapperSubboardBlock, ): @@ -458,7 +457,6 @@ class Xiao_Rp2040( def __init__(self, **kwargs: Any) -> None: super().__init__(**kwargs) - self.ic: Rp2040 # device model only self.generator_param( self.gnd.is_connected(), self.pwr.is_connected(), @@ -501,34 +499,20 @@ def contents(self) -> None: "ground required if power used", ) - self.ic = self.Block(Rp2040(pin_assigns=ArrayStringExpr())) - - self.device = self.Block(Xiao_Rp2040_Device(model_pin_assigns=self.ic.actual_pin_assigns), external=True) - - self.export_tap_iocontroller(self.device) - # TODO propgate actual_pin_assigns from device instead of model - - def export_tap_iocontroller(self, inner: BaseIoController) -> None: - from ...core.Blocks import BlockElaborationState - - assert self._elaboration_state in ( - BlockElaborationState.contents, - BlockElaborationState.generate, - ), "can only run in contents() or generate()" - inner_ios_by_type = {self._type_of_io(io_port): io_port for io_port in inner._io_ports} + self.model = self.Block(Rp2040(pin_assigns=ArrayStringExpr())) + model_pin_assigns = self._export_ios_inner(self.model) + self.assign(self.model.pin_assigns, model_pin_assigns) - for self_io in self._io_ports: - self_io_type = self._type_of_io(self_io) - assert self_io_type in inner_ios_by_type, f"inner missing IO of type {self_io_type}" - inner_io = inner_ios_by_type[self_io_type] - self.export_tap(self_io, inner_io) + self.device = self.Block(Xiao_Rp2040_Device(model_pin_assigns=self.model.actual_pin_assigns), external=True) + self._export_tap_ios_inner(self.device) + self.assign(self.actual_pin_assigns, self.device.actual_pin_assigns) @override def generate(self) -> None: super().generate() if self.get(self.pwr.is_connected()): # power supplied externally - self.connect(self.pwr, self.ic.pwr) + self.connect(self.pwr, self.model.pwr) self.export_tap(self.pwr, self.device.v3v3) else: # board sources power from USB self.pwr_out_model = self.Block( @@ -537,7 +521,7 @@ def generate(self) -> None: current_limits=UsbConnector.USB2_CURRENT_LIMITS, ) ) - self.connect(self.pwr_out_model.pwr, self.ic.pwr) + self.connect(self.pwr_out_model.pwr, self.model.pwr) if self.get(self.pwr_out.is_connected()): self.connect(self.pwr_out, self.pwr_out_model.pwr) self.export_tap(self.pwr_out, self.device.v3v3_out) @@ -549,7 +533,7 @@ def generate(self) -> None: self.export_tap(self.gnd, self.device.gnd) if self.get(self.gnd.is_connected()): - self.connect(self.gnd, self.ic.gnd) + self.connect(self.gnd, self.model.gnd) else: self.gnd_model = self.Block(DummyGround()) - self.connect(self.gnd_model.gnd, self.ic.gnd) + self.connect(self.gnd_model.gnd, self.model.gnd) From 93d805881c9f9560a053551f1ddecb17f02639e7 Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Mon, 25 May 2026 00:42:32 -0700 Subject: [PATCH 17/26] refactoring wip --- edg/abstract_parts/IoController.py | 12 +++++------- edg/parts/microcontroller/Rp2040.py | 28 ++++++++++------------------ 2 files changed, 15 insertions(+), 25 deletions(-) diff --git a/edg/abstract_parts/IoController.py b/edg/abstract_parts/IoController.py index dced9786b..cfce4575a 100644 --- a/edg/abstract_parts/IoController.py +++ b/edg/abstract_parts/IoController.py @@ -115,7 +115,6 @@ def _export_ios_inner( """ from ..core.Blocks import BlockElaborationState - assert isinstance(self, WrapperSubboardBlock) assert self._elaboration_state in ( BlockElaborationState.contents, BlockElaborationState.generate, @@ -123,6 +122,8 @@ def _export_ios_inner( if transforms: assert isinstance(self, GeneratorBlock), "transforms require a GeneratorBlock to work" + assert self._elaboration_state in (BlockElaborationState.generate,), "transforms can only run in generate()" + assigns_raw = self.get(self.pin_assigns) # mutated in-place during _make_export_* assigns = cast(List[Optional[str]], assigns_raw.copy()) @@ -133,7 +134,7 @@ def _export_ios_inner( def connect_port_transformed(self_io: BasePort, inner_io: BasePort, name: str) -> None: assert transform_fn is not None and assigns is not None - assign_index = assign_index_by_name.get(self_io._name_from(self)) + assign_index = assign_index_by_name.get(name) assign = assigns[assign_index] if assign_index is not None else None transform_result = transform_fn(self_io, assign) if transform_result is not None: @@ -157,11 +158,8 @@ def connect_port_transformed(self_io: BasePort, inner_io: BasePort, name: str) - else: self_io.defined() for io_requested in self.get(self_io.requested()): - connect_port_transformed( - self_io.append_elt(self_io.elt_type().empty(), io_requested), - inner_io.request(io_requested), - io_requested, - ) + self_io_elt = self_io.append_elt(self_io.elt_type().empty(), io_requested) + connect_port_transformed(self_io_elt, inner_io.request(io_requested), io_requested) elif isinstance(inner_io, Port): if transform_fn is None: self.connect(self_io, inner_io) diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index 1eb332476..966e2bc2b 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -300,18 +300,16 @@ def _io_pinmap(self) -> PinMapUtil: class Rp2040( Resettable, Rp2040_Interfaces, - Microcontroller, - IoControllerWithSwdTargetConnector, WithCrystalGenerator, + IoControllerWithSwdTargetConnector, IoControllerPowerRequired, - BaseIoControllerExportable, + Microcontroller, GeneratorBlock, ): DEFAULT_CRYSTAL_FREQUENCY = 12 * MHertz(tol=0.005) def __init__(self, **kwargs: Any) -> None: super().__init__(**kwargs) - self.ic: Rp2040_Device self.generator_param(self.reset.is_connected()) @override @@ -321,6 +319,7 @@ def contents(self) -> None: with self.implicit_connect(ImplicitConnect(self.pwr, [Power]), ImplicitConnect(self.gnd, [Common])) as imp: # https://datasheets.raspberrypi.com/rp2040/hardware-design-with-rp2040.pdf self.ic = imp.Block(Rp2040_Device(pin_assigns=ArrayStringExpr())) + self.connect(self.xtal_node, self.ic.xosc) self.connect(self.swd_node, self.ic.swd) self.connect(self.reset_node, self.ic.run) @@ -352,22 +351,15 @@ def contents(self) -> None: def generate(self) -> None: super().generate() - if self.get(self.reset.is_connected()): - self.connect(self.reset, self.ic.run) + def usb_export_transform(self_io: BasePort, assign: Optional[str]) -> Optional[BasePort]: + self.usb_res = self.Block(UsbSeriesResistor(27 * Ohm(tol=0.05))) + self.connect(self_io, self.usb_res.exterior) + return self.usb_res.interior - ExportType = TypeVar("ExportType", bound=Port) + self._wrap_inner(self.ic, {UsbDevicePort: usb_export_transform}) - @override - def _make_export_vector( - self, self_io: ExportType, inner_vector: Vector[ExportType], name: str, assign: Optional[str] - ) -> Optional[str]: - if isinstance(self_io, UsbDevicePort): # assumed at most one USB port generates - inner_io = inner_vector.request(name) - (self.usb_res,), self.usb_chain = self.chain( - inner_io, self.Block(UsbSeriesResistor(27 * Ohm(tol=0.05))), self_io - ) - return assign - return super()._make_export_vector(self_io, inner_vector, name, assign) + if self.get(self.reset.is_connected()): + self.connect(self.reset, self.ic.run) @override def _crystal_required(self) -> bool: # crystal needed for USB b/c tighter freq tolerance From c73c6ad6d63e9d60fdafa93fc1e0e6e993b6ddd8 Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Mon, 25 May 2026 00:49:57 -0700 Subject: [PATCH 18/26] wip need to debug this --- edg/abstract_parts/IoControllerProgramming.py | 2 +- edg/parts/microcontroller/Rp2040.py | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/edg/abstract_parts/IoControllerProgramming.py b/edg/abstract_parts/IoControllerProgramming.py index 8efd352f7..e1dab07c8 100644 --- a/edg/abstract_parts/IoControllerProgramming.py +++ b/edg/abstract_parts/IoControllerProgramming.py @@ -13,7 +13,7 @@ @non_library -class IoControllerWithSwdTargetConnector(IoController, BaseIoControllerExportable): +class IoControllerWithSwdTargetConnector(IoController): """An IoController with a SWD programming header and optional SWO and TDI pins that can be assigned to any microcontroller pin. diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index 966e2bc2b..a1d8a5d7a 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -310,7 +310,7 @@ class Rp2040( def __init__(self, **kwargs: Any) -> None: super().__init__(**kwargs) - self.generator_param(self.reset.is_connected()) + self.generator_param(self.reset.is_connected(), self.pin_assigns, self.usb.requested()) @override def contents(self) -> None: From 58a0d472ce887cf205380e73019bc652094c20a5 Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Mon, 25 May 2026 12:43:17 -0700 Subject: [PATCH 19/26] update --- edg/parts/microcontroller/Rp2040.py | 6 +- examples/Fcml/Fcml.net.ref | 100 +++++++++---------- examples/Fcml/Fcml.svgpcb.js | 32 +++--- examples/PicoProbe/PicoProbe.net.ref | 72 ++++++------- examples/PicoProbe/PicoProbe.svgpcb.js | 20 ++-- examples/RobotCrawler/RobotCrawler.net.ref | 2 +- examples/RobotCrawler/RobotCrawler.svgpcb.js | 2 +- 7 files changed, 118 insertions(+), 116 deletions(-) diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index a1d8a5d7a..697d0407b 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -310,7 +310,7 @@ class Rp2040( def __init__(self, **kwargs: Any) -> None: super().__init__(**kwargs) - self.generator_param(self.reset.is_connected(), self.pin_assigns, self.usb.requested()) + self.generator_param(self.reset.is_connected(), self.pin_assigns, self.gpio.requested(), self.usb.requested()) @override def contents(self) -> None: @@ -356,7 +356,9 @@ def usb_export_transform(self_io: BasePort, assign: Optional[str]) -> Optional[B self.connect(self_io, self.usb_res.exterior) return self.usb_res.interior - self._wrap_inner(self.ic, {UsbDevicePort: usb_export_transform}) + self._wrap_inner( + self.ic, {UsbDevicePort: usb_export_transform, DigitalBidir: lambda port, assign: port} + ) # passthrough but keeps the vector open for SWD if self.get(self.reset.is_connected()): self.connect(self.reset, self.ic.run) diff --git a/examples/Fcml/Fcml.net.ref b/examples/Fcml/Fcml.net.ref index 006ac7abe..49374a339 100644 --- a/examples/Fcml/Fcml.net.ref +++ b/examples/Fcml/Fcml.net.ref @@ -1608,30 +1608,6 @@ (property (name "edg_value") (value "50V 1uF X5R ±10% 0603 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/mcu/") (tstamps "/02850146/")) (tstamps "20e504ff")) -(comp (ref "R24") - (value "mcu.usb_res.dp") - (footprint "Resistor_SMD:R_0603_1608Metric") - (property (name "Sheetname") (value "usb_res")) - (property (name "Sheetfile") (value "edg.circuits.UsbSeriesResistor.UsbSeriesResistor")) - (property (name "edg_path") (value "mcu.usb_res.dp.res")) - (property (name "edg_short_path") (value "mcu.usb_res.dp")) - (property (name "edg_refdes") (value "R24")) - (property (name "edg_part") (value "0603WAF270JT5E (UNI-ROYAL(Uniroyal Elec))")) - (property (name "edg_value") (value "±1% 1/10W Thick Film Resistors 75V ±200ppm/℃ -55℃~+155℃ 27Ω 0603 Chip Resistor - Surface Mount ROHS")) - (sheetpath (names "/mcu/usb_res/") (tstamps "/02850146/0be502f4/")) - (tstamps "013a00d5")) -(comp (ref "R25") - (value "mcu.usb_res.dm") - (footprint "Resistor_SMD:R_0603_1608Metric") - (property (name "Sheetname") (value "usb_res")) - (property (name "Sheetfile") (value "edg.circuits.UsbSeriesResistor.UsbSeriesResistor")) - (property (name "edg_path") (value "mcu.usb_res.dm.res")) - (property (name "edg_short_path") (value "mcu.usb_res.dm")) - (property (name "edg_refdes") (value "R25")) - (property (name "edg_part") (value "0603WAF270JT5E (UNI-ROYAL(Uniroyal Elec))")) - (property (name "edg_value") (value "±1% 1/10W Thick Film Resistors 75V ±200ppm/℃ -55℃~+155℃ 27Ω 0603 Chip Resistor - Surface Mount ROHS")) - (sheetpath (names "/mcu/usb_res/") (tstamps "/02850146/0be502f4/")) - (tstamps "013700d2")) (comp (ref "X2") (value "mcu.crystal.package") (footprint "Crystal:Crystal_SMD_3225-4Pin_3.2x2.5mm") @@ -1668,6 +1644,30 @@ (property (name "edg_value") (value "50V 22pF C0G ±5% 0603 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/mcu/crystal/") (tstamps "/02850146/0c1b0303/")) (tstamps "05e801f6")) +(comp (ref "R24") + (value "mcu.usb_res.dp") + (footprint "Resistor_SMD:R_0603_1608Metric") + (property (name "Sheetname") (value "usb_res")) + (property (name "Sheetfile") (value "edg.circuits.UsbSeriesResistor.UsbSeriesResistor")) + (property (name "edg_path") (value "mcu.usb_res.dp.res")) + (property (name "edg_short_path") (value "mcu.usb_res.dp")) + (property (name "edg_refdes") (value "R24")) + (property (name "edg_part") (value "0603WAF270JT5E (UNI-ROYAL(Uniroyal Elec))")) + (property (name "edg_value") (value "±1% 1/10W Thick Film Resistors 75V ±200ppm/℃ -55℃~+155℃ 27Ω 0603 Chip Resistor - Surface Mount ROHS")) + (sheetpath (names "/mcu/usb_res/") (tstamps "/02850146/0be502f4/")) + (tstamps "013a00d5")) +(comp (ref "R25") + (value "mcu.usb_res.dm") + (footprint "Resistor_SMD:R_0603_1608Metric") + (property (name "Sheetname") (value "usb_res")) + (property (name "Sheetfile") (value "edg.circuits.UsbSeriesResistor.UsbSeriesResistor")) + (property (name "edg_path") (value "mcu.usb_res.dm.res")) + (property (name "edg_short_path") (value "mcu.usb_res.dm")) + (property (name "edg_refdes") (value "R25")) + (property (name "edg_part") (value "0603WAF270JT5E (UNI-ROYAL(Uniroyal Elec))")) + (property (name "edg_value") (value "±1% 1/10W Thick Film Resistors 75V ±200ppm/℃ -55℃~+155℃ 27Ω 0603 Chip Resistor - Surface Mount ROHS")) + (sheetpath (names "/mcu/usb_res/") (tstamps "/02850146/0be502f4/")) + (tstamps "013700d2")) (comp (ref "SW2") (value "mcu_sw") (footprint "Button_Switch_SMD:SW_SPST_SKQG_WithoutStem") @@ -2649,60 +2649,60 @@ (net (code 83) (name "mcu.gpio.led_3") (node (ref U14) (pin 37)) (node (ref D16) (pin 2))) -(net (code 84) (name "mcu.xtal_node.xi") - (node (ref U14) (pin 20)) - (node (ref X2) (pin 1)) - (node (ref C59) (pin 1))) -(net (code 85) (name "mcu.xtal_node.xo") - (node (ref U14) (pin 21)) - (node (ref X2) (pin 3)) - (node (ref C60) (pin 1))) -(net (code 86) (name "mcu.swd_node.swdio") +(net (code 84) (name "mcu.swd_node.swdio") (node (ref J6) (pin 2)) (node (ref U14) (pin 25))) -(net (code 87) (name "mcu.swd_node.swclk") +(net (code 85) (name "mcu.swd_node.swclk") (node (ref J6) (pin 4)) (node (ref U14) (pin 24))) -(net (code 88) (name "mcu.reset_node") +(net (code 86) (name "mcu.reset_node") (node (ref J6) (pin 10)) (node (ref U14) (pin 26))) -(net (code 89) (name "mcu.usb_chain_0.d_P") - (node (ref U14) (pin 47)) - (node (ref R24) (pin 2))) -(net (code 90) (name "mcu.usb_chain_0.d_N") - (node (ref U14) (pin 46)) - (node (ref R25) (pin 2))) -(net (code 91) (name "mcu.swd.tdi") +(net (code 87) (name "mcu.xtal_node.xi") + (node (ref U14) (pin 20)) + (node (ref X2) (pin 1)) + (node (ref C59) (pin 1))) +(net (code 88) (name "mcu.xtal_node.xo") + (node (ref U14) (pin 21)) + (node (ref X2) (pin 3)) + (node (ref C60) (pin 1))) +(net (code 89) (name "mcu.swd.tdi") (node (ref J6) (pin 8)) (node (ref U14) (pin 3))) -(net (code 92) (name "mcu.swd.swo") +(net (code 90) (name "mcu.swd.swo") (node (ref J6) (pin 6)) (node (ref U14) (pin 2))) -(net (code 93) (name "mcu.ic.dvdd") +(net (code 91) (name "mcu.ic.dvdd") (node (ref U14) (pin 23)) (node (ref U14) (pin 45)) (node (ref U14) (pin 50)) (node (ref C56) (pin 1)) (node (ref C57) (pin 1)) (node (ref C58) (pin 1))) -(net (code 94) (name "mcu.ic.qspi.sck") +(net (code 92) (name "mcu.ic.qspi.sck") (node (ref U14) (pin 52)) (node (ref U15) (pin 6))) -(net (code 95) (name "mcu.ic.qspi.mosi") +(net (code 93) (name "mcu.ic.qspi.mosi") (node (ref U14) (pin 53)) (node (ref U15) (pin 5))) -(net (code 96) (name "mcu.ic.qspi.miso") +(net (code 94) (name "mcu.ic.qspi.miso") (node (ref U14) (pin 55)) (node (ref U15) (pin 2))) -(net (code 97) (name "mcu.ic.qspi_cs") +(net (code 95) (name "mcu.ic.qspi_cs") (node (ref U14) (pin 56)) (node (ref U15) (pin 1))) -(net (code 98) (name "mcu.ic.qspi_sd2") +(net (code 96) (name "mcu.ic.qspi_sd2") (node (ref U14) (pin 54)) (node (ref U15) (pin 3))) -(net (code 99) (name "mcu.ic.qspi_sd3") +(net (code 97) (name "mcu.ic.qspi_sd3") (node (ref U14) (pin 51)) (node (ref U15) (pin 7))) +(net (code 98) (name "mcu.usb_res.interior.dp") + (node (ref U14) (pin 47)) + (node (ref R24) (pin 2))) +(net (code 99) (name "mcu.usb_res.interior.dm") + (node (ref U14) (pin 46)) + (node (ref R25) (pin 2))) (net (code 100) (name "mcu_sw.out") (node (ref U14) (pin 29)) (node (ref SW2) (pin 1))) diff --git a/examples/Fcml/Fcml.svgpcb.js b/examples/Fcml/Fcml.svgpcb.js index 1625787d5..e0c2a34e9 100644 --- a/examples/Fcml/Fcml.svgpcb.js +++ b/examples/Fcml/Fcml.svgpcb.js @@ -670,16 +670,6 @@ const C58 = board.add(C_0603_1608Metric, { translate: pt(2.491, 0.755), rotate: 0, id: 'C58' }) -// mcu.usb_res.dp.res -const R24 = board.add(R_0603_1608Metric, { - translate: pt(2.646, 0.755), rotate: 0, - id: 'R24' -}) -// mcu.usb_res.dm.res -const R25 = board.add(R_0603_1608Metric, { - translate: pt(2.802, 0.755), rotate: 0, - id: 'R25' -}) // mcu.crystal.package const X2 = board.add(Crystal_SMD_3225_4Pin_3_2x2_5mm, { translate: pt(2.453, 0.431), rotate: 0, @@ -687,14 +677,24 @@ const X2 = board.add(Crystal_SMD_3225_4Pin_3_2x2_5mm, { }) // mcu.crystal.cap_a const C59 = board.add(C_0603_1608Metric, { - translate: pt(2.023, 0.852), rotate: 0, + translate: pt(2.646, 0.755), rotate: 0, id: 'C59' }) // mcu.crystal.cap_b const C60 = board.add(C_0603_1608Metric, { - translate: pt(2.179, 0.852), rotate: 0, + translate: pt(2.802, 0.755), rotate: 0, id: 'C60' }) +// mcu.usb_res.dp.res +const R24 = board.add(R_0603_1608Metric, { + translate: pt(2.023, 0.852), rotate: 0, + id: 'R24' +}) +// mcu.usb_res.dm.res +const R25 = board.add(R_0603_1608Metric, { + translate: pt(2.179, 0.852), rotate: 0, + id: 'R25' +}) // mcu_sw.package const SW2 = board.add(SW_SPST_SKQG_WithoutStem, { translate: pt(2.214, 2.348), rotate: 0, @@ -960,13 +960,11 @@ board.setNetlist([ {name: "mcu.gpio.led_1", pads: [["U14", "35"], ["D14", "2"]]}, {name: "mcu.gpio.led_2", pads: [["U14", "36"], ["D15", "2"]]}, {name: "mcu.gpio.led_3", pads: [["U14", "37"], ["D16", "2"]]}, - {name: "mcu.xtal_node.xi", pads: [["U14", "20"], ["X2", "1"], ["C59", "1"]]}, - {name: "mcu.xtal_node.xo", pads: [["U14", "21"], ["X2", "3"], ["C60", "1"]]}, {name: "mcu.swd_node.swdio", pads: [["J6", "2"], ["U14", "25"]]}, {name: "mcu.swd_node.swclk", pads: [["J6", "4"], ["U14", "24"]]}, {name: "mcu.reset_node", pads: [["J6", "10"], ["U14", "26"]]}, - {name: "mcu.usb_chain_0.d_P", pads: [["U14", "47"], ["R24", "2"]]}, - {name: "mcu.usb_chain_0.d_N", pads: [["U14", "46"], ["R25", "2"]]}, + {name: "mcu.xtal_node.xi", pads: [["U14", "20"], ["X2", "1"], ["C59", "1"]]}, + {name: "mcu.xtal_node.xo", pads: [["U14", "21"], ["X2", "3"], ["C60", "1"]]}, {name: "mcu.swd.tdi", pads: [["J6", "8"], ["U14", "3"]]}, {name: "mcu.swd.swo", pads: [["J6", "6"], ["U14", "2"]]}, {name: "mcu.ic.dvdd", pads: [["U14", "23"], ["U14", "45"], ["U14", "50"], ["C56", "1"], ["C57", "1"], ["C58", "1"]]}, @@ -976,6 +974,8 @@ board.setNetlist([ {name: "mcu.ic.qspi_cs", pads: [["U14", "56"], ["U15", "1"]]}, {name: "mcu.ic.qspi_sd2", pads: [["U14", "54"], ["U15", "3"]]}, {name: "mcu.ic.qspi_sd3", pads: [["U14", "51"], ["U15", "7"]]}, + {name: "mcu.usb_res.interior.dp", pads: [["U14", "47"], ["R24", "2"]]}, + {name: "mcu.usb_res.interior.dm", pads: [["U14", "46"], ["R25", "2"]]}, {name: "mcu_sw.out", pads: [["U14", "29"], ["SW2", "1"]]}, {name: "mcu_leds.led[0].package.k", pads: [["D13", "1"], ["R26", "1"]]}, {name: "mcu_leds.led[1].package.k", pads: [["D14", "1"], ["R27", "1"]]}, diff --git a/examples/PicoProbe/PicoProbe.net.ref b/examples/PicoProbe/PicoProbe.net.ref index 331683e48..850fd7637 100644 --- a/examples/PicoProbe/PicoProbe.net.ref +++ b/examples/PicoProbe/PicoProbe.net.ref @@ -336,6 +336,18 @@ (property (name "edg_value") (value "25V 1uF X5R ±10% 0402 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/mcu/") (tstamps "/02850146/")) (tstamps "20e504ff")) +(comp (ref "SU5") + (value "mcu.crystal") + (footprint "Crystal:Resonator_SMD_Murata_CSTxExxV-3Pin_3.0x1.1mm") + (property (name "Sheetname") (value "mcu")) + (property (name "Sheetfile") (value "edg.parts.microcontroller.Rp2040.Rp2040")) + (property (name "edg_path") (value "mcu.crystal")) + (property (name "edg_short_path") (value "mcu.crystal")) + (property (name "edg_refdes") (value "SU5")) + (property (name "edg_part") (value "CSTNE12M0GH5L000R0 (Murata Electronics)")) + (property (name "edg_value") (value "CSTNE12M0GH5L000R0")) + (sheetpath (names "/mcu/") (tstamps "/02850146/")) + (tstamps "0c1b0303")) (comp (ref "SR3") (value "mcu.usb_res.dp") (footprint "Resistor_SMD:R_0603_1608Metric") @@ -360,18 +372,6 @@ (property (name "edg_value") (value "±1% 1/10W Thick Film Resistors 75V ±200ppm/℃ -55℃~+155℃ 27Ω 0603 Chip Resistor - Surface Mount ROHS")) (sheetpath (names "/mcu/usb_res/") (tstamps "/02850146/0be502f4/")) (tstamps "013700d2")) -(comp (ref "SU5") - (value "mcu.crystal") - (footprint "Crystal:Resonator_SMD_Murata_CSTxExxV-3Pin_3.0x1.1mm") - (property (name "Sheetname") (value "mcu")) - (property (name "Sheetfile") (value "edg.parts.microcontroller.Rp2040.Rp2040")) - (property (name "edg_path") (value "mcu.crystal")) - (property (name "edg_short_path") (value "mcu.crystal")) - (property (name "edg_refdes") (value "SU5")) - (property (name "edg_part") (value "CSTNE12M0GH5L000R0 (Murata Electronics)")) - (property (name "edg_value") (value "CSTNE12M0GH5L000R0")) - (sheetpath (names "/mcu/") (tstamps "/02850146/")) - (tstamps "0c1b0303")) (comp (ref "SU6") (value "usb_esd") (footprint "Package_TO_SOT_SMD:SOT-23") @@ -604,55 +604,55 @@ (node (ref SU2) (pin 3)) (node (ref SU3) (pin 17)) (node (ref SR7) (pin 2))) -(net (code 10) (name "Smcu.xtal_node.xi") - (node (ref SU3) (pin 20)) - (node (ref SU5) (pin 1))) -(net (code 11) (name "Smcu.xtal_node.xo") - (node (ref SU3) (pin 21)) - (node (ref SU5) (pin 3))) -(net (code 12) (name "Smcu.swd_node.swdio") +(net (code 10) (name "Smcu.swd_node.swdio") (node (ref SJ2) (pin 2)) (node (ref SU3) (pin 25))) -(net (code 13) (name "Smcu.swd_node.swclk") +(net (code 11) (name "Smcu.swd_node.swclk") (node (ref SJ2) (pin 4)) (node (ref SU3) (pin 24))) -(net (code 14) (name "Smcu.reset_node") +(net (code 12) (name "Smcu.reset_node") (node (ref SJ2) (pin 3)) (node (ref SU3) (pin 26))) -(net (code 15) (name "Smcu.usb_chain_0.d_P") - (node (ref SU3) (pin 47)) - (node (ref SR3) (pin 2))) -(net (code 16) (name "Smcu.usb_chain_0.d_N") - (node (ref SU3) (pin 46)) - (node (ref SR4) (pin 2))) -(net (code 17) (name "Smcu.swd.swo") +(net (code 13) (name "Smcu.xtal_node.xi") + (node (ref SU3) (pin 20)) + (node (ref SU5) (pin 1))) +(net (code 14) (name "Smcu.xtal_node.xo") + (node (ref SU3) (pin 21)) + (node (ref SU5) (pin 3))) +(net (code 15) (name "Smcu.swd.swo") (node (ref SJ2) (pin 6)) - (node (ref SU3) (pin 15))) -(net (code 18) (name "Smcu.ic.dvdd") + (node (ref SU3) (pin 2))) +(net (code 16) (name "Smcu.ic.dvdd") (node (ref SU3) (pin 23)) (node (ref SU3) (pin 45)) (node (ref SU3) (pin 50)) (node (ref SC14) (pin 1)) (node (ref SC15) (pin 1)) (node (ref SC16) (pin 1))) -(net (code 19) (name "Smcu.ic.qspi.sck") +(net (code 17) (name "Smcu.ic.qspi.sck") (node (ref SU3) (pin 52)) (node (ref SU4) (pin 6))) -(net (code 20) (name "Smcu.ic.qspi.mosi") +(net (code 18) (name "Smcu.ic.qspi.mosi") (node (ref SU3) (pin 53)) (node (ref SU4) (pin 5))) -(net (code 21) (name "Smcu.ic.qspi.miso") +(net (code 19) (name "Smcu.ic.qspi.miso") (node (ref SU3) (pin 55)) (node (ref SU4) (pin 2))) -(net (code 22) (name "Smcu.ic.qspi_cs") +(net (code 20) (name "Smcu.ic.qspi_cs") (node (ref SU3) (pin 56)) (node (ref SU4) (pin 1))) -(net (code 23) (name "Smcu.ic.qspi_sd2") +(net (code 21) (name "Smcu.ic.qspi_sd2") (node (ref SU3) (pin 54)) (node (ref SU4) (pin 3))) -(net (code 24) (name "Smcu.ic.qspi_sd3") +(net (code 22) (name "Smcu.ic.qspi_sd3") (node (ref SU3) (pin 51)) (node (ref SU4) (pin 7))) +(net (code 23) (name "Smcu.usb_res.interior.dp") + (node (ref SU3) (pin 47)) + (node (ref SR3) (pin 2))) +(net (code 24) (name "Smcu.usb_res.interior.dm") + (node (ref SU3) (pin 46)) + (node (ref SR4) (pin 2))) (net (code 25) (name "Sled_tgt.signal") (node (ref SU3) (pin 27)) (node (ref SD2) (pin 2))) diff --git a/examples/PicoProbe/PicoProbe.svgpcb.js b/examples/PicoProbe/PicoProbe.svgpcb.js index d94861e7c..2e00664bf 100644 --- a/examples/PicoProbe/PicoProbe.svgpcb.js +++ b/examples/PicoProbe/PicoProbe.svgpcb.js @@ -140,6 +140,11 @@ const SC16 = board.add(C_0402_1005Metric, { translate: pt(0.369, 0.655), rotate: 0, id: 'SC16' }) +// mcu.crystal +const SU5 = board.add(Resonator_SMD_Murata_CSTxExxV_3Pin_3_0x1_1mm, { + translate: pt(0.394, 0.428), rotate: 0, + id: 'SU5' +}) // mcu.usb_res.dp.res const SR3 = board.add(R_0603_1608Metric, { translate: pt(0.562, 0.393), rotate: 0, @@ -150,11 +155,6 @@ const SR4 = board.add(R_0603_1608Metric, { translate: pt(0.718, 0.393), rotate: 0, id: 'SR4' }) -// mcu.crystal -const SU5 = board.add(Resonator_SMD_Murata_CSTxExxV_3Pin_3_0x1_1mm, { - translate: pt(0.394, 0.428), rotate: 0, - id: 'SU5' -}) // usb_esd const SU6 = board.add(SOT_23, { translate: pt(0.746, 1.328), rotate: 0, @@ -221,14 +221,12 @@ board.setNetlist([ {name: "Susb.conn.cc.cc1", pads: [["SJ1", "A5"], ["SR1", "2"]]}, {name: "Susb.conn.cc.cc2", pads: [["SJ1", "B5"], ["SR2", "2"]]}, {name: "Starget_reg.reset", pads: [["SU2", "3"], ["SU3", "17"], ["SR7", "2"]]}, - {name: "Smcu.xtal_node.xi", pads: [["SU3", "20"], ["SU5", "1"]]}, - {name: "Smcu.xtal_node.xo", pads: [["SU3", "21"], ["SU5", "3"]]}, {name: "Smcu.swd_node.swdio", pads: [["SJ2", "2"], ["SU3", "25"]]}, {name: "Smcu.swd_node.swclk", pads: [["SJ2", "4"], ["SU3", "24"]]}, {name: "Smcu.reset_node", pads: [["SJ2", "3"], ["SU3", "26"]]}, - {name: "Smcu.usb_chain_0.d_P", pads: [["SU3", "47"], ["SR3", "2"]]}, - {name: "Smcu.usb_chain_0.d_N", pads: [["SU3", "46"], ["SR4", "2"]]}, - {name: "Smcu.swd.swo", pads: [["SJ2", "6"], ["SU3", "15"]]}, + {name: "Smcu.xtal_node.xi", pads: [["SU3", "20"], ["SU5", "1"]]}, + {name: "Smcu.xtal_node.xo", pads: [["SU3", "21"], ["SU5", "3"]]}, + {name: "Smcu.swd.swo", pads: [["SJ2", "6"], ["SU3", "2"]]}, {name: "Smcu.ic.dvdd", pads: [["SU3", "23"], ["SU3", "45"], ["SU3", "50"], ["SC14", "1"], ["SC15", "1"], ["SC16", "1"]]}, {name: "Smcu.ic.qspi.sck", pads: [["SU3", "52"], ["SU4", "6"]]}, {name: "Smcu.ic.qspi.mosi", pads: [["SU3", "53"], ["SU4", "5"]]}, @@ -236,6 +234,8 @@ board.setNetlist([ {name: "Smcu.ic.qspi_cs", pads: [["SU3", "56"], ["SU4", "1"]]}, {name: "Smcu.ic.qspi_sd2", pads: [["SU3", "54"], ["SU4", "3"]]}, {name: "Smcu.ic.qspi_sd3", pads: [["SU3", "51"], ["SU4", "7"]]}, + {name: "Smcu.usb_res.interior.dp", pads: [["SU3", "47"], ["SR3", "2"]]}, + {name: "Smcu.usb_res.interior.dm", pads: [["SU3", "46"], ["SR4", "2"]]}, {name: "Sled_tgt.signal", pads: [["SU3", "27"], ["SD2", "2"]]}, {name: "Sled_tgt.package.k", pads: [["SD2", "1"], ["SR5", "1"]]}, {name: "Sled_usb.signal", pads: [["SU3", "37"], ["SD3", "2"]]}, diff --git a/examples/RobotCrawler/RobotCrawler.net.ref b/examples/RobotCrawler/RobotCrawler.net.ref index c6f56167f..a67d4dc9b 100644 --- a/examples/RobotCrawler/RobotCrawler.net.ref +++ b/examples/RobotCrawler/RobotCrawler.net.ref @@ -1879,7 +1879,7 @@ (node (ref RU8) (pin 26))) (net (code 58) (name "Rmcu_test.swd.swo") (node (ref RJ18) (pin 6)) - (node (ref RU8) (pin 27))) + (node (ref RU8) (pin 2))) (net (code 59) (name "Rmcu_test.ic.dvdd") (node (ref RU8) (pin 23)) (node (ref RU8) (pin 45)) diff --git a/examples/RobotCrawler/RobotCrawler.svgpcb.js b/examples/RobotCrawler/RobotCrawler.svgpcb.js index ad5a9990b..467a2b4bb 100644 --- a/examples/RobotCrawler/RobotCrawler.svgpcb.js +++ b/examples/RobotCrawler/RobotCrawler.svgpcb.js @@ -669,7 +669,7 @@ board.setNetlist([ {name: "Rmcu_test.swd_node.swdio", pads: [["RJ18", "2"], ["RU8", "25"]]}, {name: "Rmcu_test.swd_node.swclk", pads: [["RJ18", "4"], ["RU8", "24"]]}, {name: "Rmcu_test.reset_node", pads: [["RJ18", "3"], ["RU8", "26"]]}, - {name: "Rmcu_test.swd.swo", pads: [["RJ18", "6"], ["RU8", "27"]]}, + {name: "Rmcu_test.swd.swo", pads: [["RJ18", "6"], ["RU8", "2"]]}, {name: "Rmcu_test.ic.dvdd", pads: [["RU8", "23"], ["RU8", "45"], ["RU8", "50"], ["RC30", "1"], ["RC31", "1"], ["RC32", "1"]]}, {name: "Rmcu_test.ic.qspi.sck", pads: [["RU8", "52"], ["RU9", "6"]]}, {name: "Rmcu_test.ic.qspi.mosi", pads: [["RU8", "53"], ["RU9", "5"]]}, From b51f4b73f9a72e70b0f809853799e938a573a2b8 Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Mon, 25 May 2026 12:58:32 -0700 Subject: [PATCH 20/26] simplify swd --- edg/abstract_parts/IoControllerProgramming.py | 46 ++++++++----------- examples/test_datalogger.py | 4 +- examples/test_fcml.py | 6 ++- examples/test_high_switch.py | 3 +- examples/test_multimeter.py | 3 +- examples/test_robotcrawler.py | 6 ++- examples/test_swd_debugger.py | 6 ++- examples/test_tofarray.py | 3 +- 8 files changed, 38 insertions(+), 39 deletions(-) diff --git a/edg/abstract_parts/IoControllerProgramming.py b/edg/abstract_parts/IoControllerProgramming.py index e1dab07c8..4799a5585 100644 --- a/edg/abstract_parts/IoControllerProgramming.py +++ b/edg/abstract_parts/IoControllerProgramming.py @@ -9,56 +9,46 @@ SwdCortexTargetConnectorTdi, ) from .IoController import IoController -from .IoControllerExportable import BaseIoControllerExportable @non_library -class IoControllerWithSwdTargetConnector(IoController): - """An IoController with a SWD programming header and optional SWO and TDI pins that - can be assigned to any microcontroller pin. +class IoControllerWithSwdTargetConnector(IoController, GeneratorBlock): + """An IoController with a SWD programming header, with connected power and ground, + and optional SWO and TDI pins that are connected to the microcontroller's GPIO Vector. + These are defined with names swd_swo and swd_tdi and can be pinned with the normal pin_assigns. - This defines the interface for the SWO and TDI pin spec (passed to the pin assignment), - and instantiates a SWD target with connected power and ground. SWD must be connected by - the subclass.""" + By default, SWD and SWO pins are not connected, but the reset pin is connected. + + Subclasses must connect the swd_mode and reset_node to the microcontroller. + Subclasses must also ensure the internal GPIO vector is left open (not direct vector-connected). + """ def __init__( self, - swd_swo_pin: StringLike = "NC", - swd_tdi_pin: StringLike = "NC", + swd_connect_swo: BoolLike = False, + swd_connect_tdi: BoolLike = False, swd_connect_reset: BoolLike = True, **kwargs: Any, ): super().__init__(**kwargs) - self.swd_swo_pin = self.ArgParameter(swd_swo_pin) - self.swd_tdi_pin = self.ArgParameter(swd_tdi_pin) + self.swd_connect_swo = self.ArgParameter(swd_connect_swo) + self.swd_connect_tdi = self.ArgParameter(swd_connect_tdi) self.swd_connect_reset = self.ArgParameter(swd_connect_reset) - self.generator_param(self.swd_swo_pin, self.swd_tdi_pin, self.swd_connect_reset) + self.generator_param(self.swd_connect_swo, self.swd_connect_tdi, self.swd_connect_reset) self.swd_node = self.connect() # connect this internal node to the microcontroller self.reset_node = self.connect() # connect this internal node to the microcontroller @override - def contents(self) -> None: - super().contents() + def generate(self) -> None: + super().generate() self.swd = self.Block(SwdCortexTargetConnector()) self.connect(self.swd.gnd, self.gnd) self.connect(self.swd.pwr, self.pwr) self.connect(self.swd_node, self.swd.swd) - @override - def _inner_pin_assigns(self, assigns: List[str]) -> List[str]: - assigns = super()._inner_pin_assigns(assigns) - if self.get(self.swd_swo_pin) != "NC": - assigns.append(f"swd_swo={self.get(self.swd_swo_pin)}") - if self.get(self.swd_tdi_pin) != "NC": - assigns.append(f"swd_tdi={self.get(self.swd_tdi_pin)}") - return assigns - - @override - def generate(self) -> None: - super().generate() - if self.get(self.swd_swo_pin) != "NC": + if self.get(self.swd_connect_swo): self.connect(self.ic.gpio.request("swd_swo"), self.swd.with_mixin(SwdCortexTargetConnectorSwo()).swo) - if self.get(self.swd_tdi_pin) != "NC": + if self.get(self.swd_connect_tdi): self.connect(self.ic.gpio.request("swd_tdi"), self.swd.with_mixin(SwdCortexTargetConnectorTdi()).tdi) if self.get(self.swd_connect_reset): # reset commonly connected but not required by SWD self.connect(self.reset_node, self.swd.with_mixin(SwdCortexTargetConnectorReset()).reset) diff --git a/examples/test_datalogger.py b/examples/test_datalogger.py index adf784128..580689454 100644 --- a/examples/test_datalogger.py +++ b/examples/test_datalogger.py @@ -257,6 +257,7 @@ def refinements(self) -> Refinements: (["buffer", "amp"], Tlv9061), ], instance_values=[ + (["mcu", "swd_connect_swo"], True), ( ["mcu", "pin_assigns"], [ @@ -295,10 +296,9 @@ def refinements(self) -> Refinements: "sw2=23", "v12sense=10", "v5sense=9", - "vscsense=8", + "vscsense=8" "swd_swo=PIO0_8", ], ), - (["mcu", "swd_swo_pin"], "PIO0_8"), (["pwr_5v", "power_path", "inductor", "part"], "NR5040T220M"), # peg to prior part selection ( ["pwr_5v", "power_path", "inductor_current_ripple"], diff --git a/examples/test_fcml.py b/examples/test_fcml.py index 8a2437bfc..b43620514 100644 --- a/examples/test_fcml.py +++ b/examples/test_fcml.py @@ -545,8 +545,8 @@ def refinements(self) -> Refinements: "fpga3=11", ], ), - (["mcu", "swd_swo_pin"], "GPIO0"), # UART0 TX - (["mcu", "swd_tdi_pin"], "GPIO1"), # UART0 RX + (["mcu", "swd_connect_swo"], True), + (["mcu", "swd_connect_tdi"], True), ( ["fpga", "pin_assigns"], [ @@ -569,6 +569,8 @@ def refinements(self) -> Refinements: "mcu1=3", "mcu2=4", "mcu3=6", + "swd_swo=GPIO0", # UART0 TX + "swd_tdi=GPIO1", # UART0 RX ], ), # flying caps need to be beefier for high current rating (which isn't modeled) diff --git a/examples/test_high_switch.py b/examples/test_high_switch.py index 1b4e9e9b8..dafa5e9a0 100644 --- a/examples/test_high_switch.py +++ b/examples/test_high_switch.py @@ -324,6 +324,7 @@ def refinements(self) -> Refinements: (["mcu"], Lpc1549_48), ], instance_values=[ + (["mcu", "swd_connect_swo"], True), ( ["mcu", "pin_assigns"], [ @@ -348,9 +349,9 @@ def refinements(self) -> Refinements: "light_41=47", "light_50=46", "light_51=45", + "swd_swo=PIO0_8", ], ), - (["mcu", "swd_swo_pin"], "PIO0_8"), # the hold current wasn't modeled at the time of manufacture and turns out to be out of limits (["can", "can_fuse", "fuse", "actual_hold_current"], Range(0.1, 0.1)), # JLC does not have frequency specs, must be checked TODO diff --git a/examples/test_multimeter.py b/examples/test_multimeter.py index a7b4a8d34..9a58fa341 100644 --- a/examples/test_multimeter.py +++ b/examples/test_multimeter.py @@ -361,6 +361,7 @@ def refinements(self) -> Refinements: (["driver", "diode"], CustomDiode), ], instance_values=[ + (["mcu", "swd_connect_swo"], True), ( ["mcu", "pin_assigns"], [ @@ -390,9 +391,9 @@ def refinements(self) -> Refinements: "rgb_blue=6", "rgb_red=4", "rgb_green=5", + "swd_swo=P1.00", ], ), - (["mcu", "swd_swo_pin"], "P1.00"), ( ["reg_5v", "power_path", "dutycycle_limit"], Range(float("-inf"), float("inf")), diff --git a/examples/test_robotcrawler.py b/examples/test_robotcrawler.py index 276c0c5a0..63ad17cad 100644 --- a/examples/test_robotcrawler.py +++ b/examples/test_robotcrawler.py @@ -214,6 +214,7 @@ def refinements(self) -> Refinements: "oled_reset=8", ], ), + (["mcu_servo", "swd_connect_swo"], True), ( ["mcu_servo", "pin_assigns"], [ @@ -240,9 +241,10 @@ def refinements(self) -> Refinements: "led=33", "i2c.scl=21", "i2c.sda=22", + "swd_swo=PB6", # USART1_TX ], ), - (["mcu_servo", "swd_swo_pin"], "PB6"), # USART1_TX + (["mcu_test", "swd_connect_swo"], True), ( ["mcu_test", "pin_assigns"], [ @@ -252,9 +254,9 @@ def refinements(self) -> Refinements: "led_3=16", "i2c.scl=37", "i2c.sda=36", + "swd_swo=GPIO16", # UART0 TX ], ), - (["mcu_test", "swd_swo_pin"], "GPIO16"), # UART0 TX (["mcu", "programming"], "uart-auto"), (["reg_14v", "inductor", "part"], "CBC3225T220KR"), (["reg_14v", "inductor", "manual_frequency_rating"], Range(0, 17e6)), # 17MHz self-resonant diff --git a/examples/test_swd_debugger.py b/examples/test_swd_debugger.py index 4b5fcdf8a..1df1ab7cf 100644 --- a/examples/test_swd_debugger.py +++ b/examples/test_swd_debugger.py @@ -170,6 +170,7 @@ def refinements(self) -> Refinements: ], instance_values=[ (["refdes_prefix"], "S"), # unique refdes for panelization + (["mcu", "swd_connect_swo"], True), ( ["mcu", "pin_assigns"], [ @@ -183,12 +184,12 @@ def refinements(self) -> Refinements: "led_target=PA9", "led_usb=PB6", # CONNECTED_LED in DAPLink, LED_DAP_BLUE in F103 mbed HDK "target_reg_en=PB15", # POWER_EN in DAPLink + "swd_swo=PB3", ], ), # 2.2uF generates a 1206, but 4.7uF allows a 0805 (["usb_reg", "out_cap", "cap", "capacitance"], Range.from_tolerance(4.7e-6, 0.2)), (["target_reg", "out_cap", "cap", "capacitance"], Range.from_tolerance(4.7e-6, 0.2)), - (["mcu", "swd_swo_pin"], "PB3"), ], class_values=[ (SelectorArea, ["footprint_area"], Range.from_lower(1.5)), # at least 0402 @@ -281,6 +282,7 @@ def refinements(self) -> Refinements: ], instance_values=[ (["refdes_prefix"], "S"), # unique refdes for panelization + (["mcu", "swd_connect_swo"], True), ( ["mcu", "pin_assigns"], [ @@ -295,12 +297,12 @@ def refinements(self) -> Refinements: # others "target_vsense=GPIO28", "target_reg_en=17", + "swd_swo=GPIO12", # arbitrary closest UART TX ], ), # 2.2uF generates a 1206, but 4.7uF allows a 0805 (["usb_reg", "out_cap", "cap", "capacitance"], Range.from_tolerance(4.7e-6, 0.2)), (["target_reg", "out_cap", "cap", "capacitance"], Range.from_tolerance(4.7e-6, 0.2)), - (["mcu", "swd_swo_pin"], "GPIO12"), # arbitrary closest UART TX ], class_refinements=[ (SwdCortexTargetHeader, SwdCortexTargetTagConnect), diff --git a/examples/test_tofarray.py b/examples/test_tofarray.py index ee2180137..9f9b7417e 100644 --- a/examples/test_tofarray.py +++ b/examples/test_tofarray.py @@ -137,6 +137,7 @@ def refinements(self) -> Refinements: ], instance_values=[ (["mcu", "crystal", "frequency"], Range.from_tolerance(12000000, 0.005)), # legacy default crystal + (["mcu", "swd_connect_swo"], True), ( ["mcu", "pin_assigns"], [ @@ -155,9 +156,9 @@ def refinements(self) -> Refinements: "tof_reset_2=4", "tof_reset_3=3", "tof_reset_4=2", + "swd_swo=PB3", ], ), - (["mcu", "swd_swo_pin"], "PB3"), ], class_refinements=[ (SwdCortexTargetConnector, SwdCortexTargetTc2050), From a46c20d60e486858fa6114184f6257cee4f84e56 Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Mon, 25 May 2026 13:27:35 -0700 Subject: [PATCH 21/26] update some netlists --- examples/Datalogger/Datalogger.net.ref | 58 +++++++-------- examples/Datalogger/Datalogger.svgpcb.js | 24 +++---- examples/Fcml/Fcml.net.ref | 72 +++++++++---------- examples/Fcml/Fcml.svgpcb.js | 24 +++---- examples/HighSwitch/HighSwitch.net.ref | 58 +++++++-------- examples/HighSwitch/HighSwitch.svgpcb.js | 24 +++---- .../JacdacKeyswitch/JacdacKeyswitch.net.ref | 40 +++++------ .../JacdacKeyswitch/JacdacKeyswitch.svgpcb.js | 20 +++--- examples/Keyboard/Keyboard.net.ref | 48 ++++++------- examples/Keyboard/Keyboard.svgpcb.js | 20 +++--- examples/Multimeter/Multimeter.net.ref | 30 ++++---- examples/Multimeter/Multimeter.svgpcb.js | 14 ++-- examples/SwdDebugger/SwdDebugger.net.ref | 48 ++++++------- examples/SwdDebugger/SwdDebugger.svgpcb.js | 22 +++--- .../TestBlinkyChain/TestBlinkyChain.net.ref | 58 +++++++-------- .../TestBlinkyChain/TestBlinkyChain.svgpcb.js | 24 +++---- .../TestBlinkyComplete.net.ref | 58 +++++++-------- .../TestBlinkyComplete.svgpcb.js | 24 +++---- .../TestBlinkyExpanded.net.ref | 58 +++++++-------- .../TestBlinkyExpanded.svgpcb.js | 24 +++---- .../TestBlinkyImplicit.net.ref | 58 +++++++-------- .../TestBlinkyImplicit.svgpcb.js | 24 +++---- examples/TofArray/TofArray.net.ref | 48 ++++++------- examples/TofArray/TofArray.svgpcb.js | 22 +++--- examples/UsbKey/UsbKey.net.ref | 44 ++++++------ examples/UsbKey/UsbKey.svgpcb.js | 20 +++--- examples/test_datalogger.py | 3 +- examples/test_fcml.py | 8 +-- 28 files changed, 488 insertions(+), 487 deletions(-) diff --git a/examples/Datalogger/Datalogger.net.ref b/examples/Datalogger/Datalogger.net.ref index d23ef8910..e9fa5da26 100644 --- a/examples/Datalogger/Datalogger.net.ref +++ b/examples/Datalogger/Datalogger.net.ref @@ -288,18 +288,6 @@ (property (name "edg_value") (value "4.7uF")) (sheetpath (names "/pwr_3v3/") (tstamps "/0b4f0295/")) (tstamps "0be902ec")) -(comp (ref "J3") - (value "mcu.swd") - (footprint "Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD") - (property (name "Sheetname") (value "mcu")) - (property (name "Sheetfile") (value "edg.parts.microcontroller.Lpc1549.Lpc1549_64")) - (property (name "edg_path") (value "mcu.swd.conn")) - (property (name "edg_short_path") (value "mcu.swd")) - (property (name "edg_refdes") (value "J3")) - (property (name "edg_part") (value "PinHeader1.27 Shrouded 2x5 (Generic)")) - (property (name "edg_value") (value "PinHeader1.27 Shrouded 2x5")) - (sheetpath (names "/mcu/") (tstamps "/02850146/")) - (tstamps "02ae014f")) (comp (ref "U5") (value "mcu.ic") (footprint "Package_QFP:LQFP-64_10x10mm_P0.5mm") @@ -516,6 +504,18 @@ (property (name "edg_value") (value "22pF")) (sheetpath (names "/mcu/crystal/") (tstamps "/02850146/0c1b0303/")) (tstamps "05e801f6")) +(comp (ref "J3") + (value "mcu.swd") + (footprint "Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD") + (property (name "Sheetname") (value "mcu")) + (property (name "Sheetfile") (value "edg.parts.microcontroller.Lpc1549.Lpc1549_64")) + (property (name "edg_path") (value "mcu.swd.conn")) + (property (name "edg_short_path") (value "mcu.swd")) + (property (name "edg_refdes") (value "J3")) + (property (name "edg_part") (value "PinHeader1.27 Shrouded 2x5 (Generic)")) + (property (name "edg_value") (value "PinHeader1.27 Shrouded 2x5")) + (sheetpath (names "/mcu/") (tstamps "/02850146/")) + (tstamps "02ae014f")) (comp (ref "J4") (value "can.conn") (footprint "calisco:Molex_DuraClik_vert_5pin") @@ -1308,9 +1308,6 @@ (node (ref U4) (pin 1)) (node (ref C7) (pin 2)) (node (ref C8) (pin 2)) - (node (ref J3) (pin 3)) - (node (ref J3) (pin 5)) - (node (ref J3) (pin 9)) (node (ref U5) (pin 14)) (node (ref U5) (pin 21)) (node (ref U5) (pin 26)) @@ -1334,6 +1331,9 @@ (node (ref X1) (pin 4)) (node (ref C21) (pin 2)) (node (ref C22) (pin 2)) + (node (ref J3) (pin 3)) + (node (ref J3) (pin 5)) + (node (ref J3) (pin 9)) (node (ref U8) (pin 4)) (node (ref C25) (pin 2)) (node (ref J5) (pin 3)) @@ -1398,7 +1398,6 @@ (net (code 4) (name "v3v3") (node (ref U4) (pin 2)) (node (ref C8) (pin 1)) - (node (ref J3) (pin 1)) (node (ref U5) (pin 13)) (node (ref U5) (pin 18)) (node (ref U5) (pin 20)) @@ -1420,6 +1419,7 @@ (node (ref C18) (pin 1)) (node (ref C19) (pin 1)) (node (ref C20) (pin 1)) + (node (ref J3) (pin 1)) (node (ref U8) (pin 1)) (node (ref C25) (pin 1)) (node (ref J5) (pin 4)) @@ -1520,25 +1520,25 @@ (node (ref X1) (pin 3)) (node (ref C22) (pin 1))) (net (code 28) (name "mcu.swd_node.swdio") - (node (ref J3) (pin 2)) (node (ref U5) (pin 44)) - (node (ref R8) (pin 2))) + (node (ref R8) (pin 2)) + (node (ref J3) (pin 2))) (net (code 29) (name "mcu.swd_node.swclk") - (node (ref J3) (pin 4)) (node (ref U5) (pin 40)) - (node (ref R9) (pin 2))) + (node (ref R9) (pin 2)) + (node (ref J3) (pin 4))) (net (code 30) (name "mcu.reset_node") - (node (ref J3) (pin 10)) - (node (ref U5) (pin 45))) -(net (code 31) (name "mcu.swd.tdi") - (node (ref J3) (pin 8))) -(net (code 32) (name "mcu.swd.swo") - (node (ref J3) (pin 6)) - (node (ref U5) (pin 12))) -(net (code 33) (name "mcu.ic.xtal_rtc.xtal_in") + (node (ref U5) (pin 45)) + (node (ref J3) (pin 10))) +(net (code 31) (name "mcu.ic.xtal_rtc.xtal_in") (node (ref U5) (pin 42))) -(net (code 34) (name "mcu.ic.xtal_rtc.xtal_out") +(net (code 32) (name "mcu.ic.xtal_rtc.xtal_out") (node (ref U5) (pin 43))) +(net (code 33) (name "mcu.swd.tdi") + (node (ref J3) (pin 8))) +(net (code 34) (name "mcu.swd.swo") + (node (ref U5) (pin 12)) + (node (ref J3) (pin 6))) (net (code 35) (name "can.controller.txd") (node (ref U5) (pin 51)) (node (ref U8) (pin 3))) diff --git a/examples/Datalogger/Datalogger.svgpcb.js b/examples/Datalogger/Datalogger.svgpcb.js index 23795a0b5..7915795d4 100644 --- a/examples/Datalogger/Datalogger.svgpcb.js +++ b/examples/Datalogger/Datalogger.svgpcb.js @@ -120,11 +120,6 @@ const C8 = board.add(C_0805_2012Metric, { translate: pt(2.819, 2.064), rotate: 0, id: 'C8' }) -// mcu.swd.conn -const J3 = board.add(PinHeader_2x05_P1_27mm_Vertical_SMD, { - translate: pt(1.941, 0.146), rotate: 0, - id: 'J3' -}) // mcu.ic const U5 = board.add(LQFP_64_10x10mm_P0_5mm, { translate: pt(1.469, 0.264), rotate: 0, @@ -215,6 +210,11 @@ const C22 = board.add(C_0603_1608Metric, { translate: pt(2.198, 0.693), rotate: 0, id: 'C22' }) +// mcu.swd.conn +const J3 = board.add(PinHeader_2x05_P1_27mm_Vertical_SMD, { + translate: pt(1.941, 0.146), rotate: 0, + id: 'J3' +}) // can.conn const J4 = board.add(Molex_DuraClik_vert_5pin, { translate: pt(0.000, 2.238), rotate: 0, @@ -537,10 +537,10 @@ const R31 = board.add(R_0603_1608Metric, { }) board.setNetlist([ - {name: "gnd", pads: [["J1", "1"], ["J1", "3"], ["J2", "A1"], ["J2", "A12"], ["J2", "B1"], ["J2", "B12"], ["J2", "S1"], ["R1", "1"], ["R2", "1"], ["U1", "2"], ["U2", "1"], ["R4", "2"], ["C1", "2"], ["C3", "2"], ["C4", "2"], ["R7", "2"], ["U3", "2"], ["C5", "2"], ["C6", "2"], ["U4", "1"], ["C7", "2"], ["C8", "2"], ["J3", "3"], ["J3", "5"], ["J3", "9"], ["U5", "14"], ["U5", "21"], ["U5", "26"], ["U5", "27"], ["U5", "55"], ["U5", "56"], ["R9", "1"], ["C9", "2"], ["C10", "2"], ["C11", "2"], ["C12", "2"], ["C13", "2"], ["C14", "2"], ["C15", "2"], ["C16", "2"], ["C17", "2"], ["C18", "2"], ["C19", "2"], ["C20", "2"], ["X1", "2"], ["X1", "4"], ["C21", "2"], ["C22", "2"], ["U8", "4"], ["C25", "2"], ["J5", "3"], ["J5", "6"], ["J5", "SH"], ["U9", "10"], ["U9", "14"], ["C27", "2"], ["C28", "2"], ["R11", "2"], ["U10", "5"], ["U10", "8"], ["C29", "2"], ["C30", "2"], ["C31", "2"], ["C32", "2"], ["J6", "17"], ["J6", "8"], ["C33", "2"], ["C34", "2"], ["C35", "2"], ["C36", "2"], ["C37", "2"], ["C38", "2"], ["C39", "2"], ["R13", "2"], ["C40", "2"], ["D5", "1"], ["C42", "2"], ["C43", "2"], ["R14", "1"], ["U11", "3"], ["SW1", "2"], ["SW2", "2"], ["R27", "2"], ["R29", "2"], ["R31", "2"]]}, + {name: "gnd", pads: [["J1", "1"], ["J1", "3"], ["J2", "A1"], ["J2", "A12"], ["J2", "B1"], ["J2", "B12"], ["J2", "S1"], ["R1", "1"], ["R2", "1"], ["U1", "2"], ["U2", "1"], ["R4", "2"], ["C1", "2"], ["C3", "2"], ["C4", "2"], ["R7", "2"], ["U3", "2"], ["C5", "2"], ["C6", "2"], ["U4", "1"], ["C7", "2"], ["C8", "2"], ["U5", "14"], ["U5", "21"], ["U5", "26"], ["U5", "27"], ["U5", "55"], ["U5", "56"], ["R9", "1"], ["C9", "2"], ["C10", "2"], ["C11", "2"], ["C12", "2"], ["C13", "2"], ["C14", "2"], ["C15", "2"], ["C16", "2"], ["C17", "2"], ["C18", "2"], ["C19", "2"], ["C20", "2"], ["X1", "2"], ["X1", "4"], ["C21", "2"], ["C22", "2"], ["J3", "3"], ["J3", "5"], ["J3", "9"], ["U8", "4"], ["C25", "2"], ["J5", "3"], ["J5", "6"], ["J5", "SH"], ["U9", "10"], ["U9", "14"], ["C27", "2"], ["C28", "2"], ["R11", "2"], ["U10", "5"], ["U10", "8"], ["C29", "2"], ["C30", "2"], ["C31", "2"], ["C32", "2"], ["J6", "17"], ["J6", "8"], ["C33", "2"], ["C34", "2"], ["C35", "2"], ["C36", "2"], ["C37", "2"], ["C38", "2"], ["C39", "2"], ["R13", "2"], ["C40", "2"], ["D5", "1"], ["C42", "2"], ["C43", "2"], ["R14", "1"], ["U11", "3"], ["SW1", "2"], ["SW2", "2"], ["R27", "2"], ["R29", "2"], ["R31", "2"]]}, {name: "vin", pads: [["J1", "2"], ["U2", "3"], ["U2", "5"], ["C1", "1"], ["C3", "1"], ["R26", "1"]]}, {name: "v5", pads: [["J2", "A4"], ["J2", "A9"], ["J2", "B4"], ["J2", "B9"], ["R3", "1"], ["L1", "2"], ["C4", "1"], ["R5", "1"], ["D1", "1"], ["R6", "1"], ["U3", "5"], ["U3", "6"], ["C5", "1"], ["U4", "3"], ["C7", "1"], ["R28", "1"]]}, - {name: "v3v3", pads: [["U4", "2"], ["C8", "1"], ["J3", "1"], ["U5", "13"], ["U5", "18"], ["U5", "20"], ["U5", "22"], ["U5", "37"], ["U5", "41"], ["U5", "52"], ["U5", "57"], ["R8", "1"], ["C9", "1"], ["C10", "1"], ["C11", "1"], ["C12", "1"], ["C13", "1"], ["C14", "1"], ["C15", "1"], ["C16", "1"], ["C17", "1"], ["C18", "1"], ["C19", "1"], ["C20", "1"], ["U8", "1"], ["C25", "1"], ["J5", "4"], ["R10", "1"], ["U9", "1"], ["C27", "1"], ["C28", "1"], ["R12", "1"], ["J6", "15"], ["J6", "16"], ["C33", "1"], ["L2", "1"], ["C40", "1"], ["U11", "2"], ["D6", "2"], ["D7", "2"], ["D8", "2"], ["R24", "1"], ["R25", "1"]]}, + {name: "v3v3", pads: [["U4", "2"], ["C8", "1"], ["U5", "13"], ["U5", "18"], ["U5", "20"], ["U5", "22"], ["U5", "37"], ["U5", "41"], ["U5", "52"], ["U5", "57"], ["R8", "1"], ["C9", "1"], ["C10", "1"], ["C11", "1"], ["C12", "1"], ["C13", "1"], ["C14", "1"], ["C15", "1"], ["C16", "1"], ["C17", "1"], ["C18", "1"], ["C19", "1"], ["C20", "1"], ["J3", "1"], ["U8", "1"], ["C25", "1"], ["J5", "4"], ["R10", "1"], ["U9", "1"], ["C27", "1"], ["C28", "1"], ["R12", "1"], ["J6", "15"], ["J6", "16"], ["C33", "1"], ["L2", "1"], ["C40", "1"], ["U11", "2"], ["D6", "2"], ["D7", "2"], ["D8", "2"], ["R24", "1"], ["R25", "1"]]}, {name: "usb_conn.usb.dp", pads: [["J2", "A6"], ["J2", "B6"], ["U5", "47"]]}, {name: "usb_conn.usb.dm", pads: [["J2", "A7"], ["J2", "B7"], ["U5", "48"]]}, {name: "usb_conn.conn.cc.cc1", pads: [["J2", "A5"], ["R1", "2"]]}, @@ -564,13 +564,13 @@ board.setNetlist([ {name: "mcu.gpio.rgb3_blue", pads: [["U5", "34"], ["R23", "2"]]}, {name: "mcu.xtal_node.xi", pads: [["U5", "36"], ["X1", "1"], ["C21", "1"]]}, {name: "mcu.xtal_node.xo", pads: [["U5", "35"], ["X1", "3"], ["C22", "1"]]}, - {name: "mcu.swd_node.swdio", pads: [["J3", "2"], ["U5", "44"], ["R8", "2"]]}, - {name: "mcu.swd_node.swclk", pads: [["J3", "4"], ["U5", "40"], ["R9", "2"]]}, - {name: "mcu.reset_node", pads: [["J3", "10"], ["U5", "45"]]}, - {name: "mcu.swd.tdi", pads: [["J3", "8"]]}, - {name: "mcu.swd.swo", pads: [["J3", "6"], ["U5", "12"]]}, + {name: "mcu.swd_node.swdio", pads: [["U5", "44"], ["R8", "2"], ["J3", "2"]]}, + {name: "mcu.swd_node.swclk", pads: [["U5", "40"], ["R9", "2"], ["J3", "4"]]}, + {name: "mcu.reset_node", pads: [["U5", "45"], ["J3", "10"]]}, {name: "mcu.ic.xtal_rtc.xtal_in", pads: [["U5", "42"]]}, {name: "mcu.ic.xtal_rtc.xtal_out", pads: [["U5", "43"]]}, + {name: "mcu.swd.tdi", pads: [["J3", "8"]]}, + {name: "mcu.swd.swo", pads: [["U5", "12"], ["J3", "6"]]}, {name: "can.controller.txd", pads: [["U5", "51"], ["U8", "3"]]}, {name: "can.controller.rxd", pads: [["U5", "53"], ["U8", "2"]]}, {name: "can.can.canh", pads: [["J4", "4"], ["U7", "2"], ["U8", "7"]]}, diff --git a/examples/Fcml/Fcml.net.ref b/examples/Fcml/Fcml.net.ref index 49374a339..6dc49d04e 100644 --- a/examples/Fcml/Fcml.net.ref +++ b/examples/Fcml/Fcml.net.ref @@ -1428,18 +1428,6 @@ (property (name "edg_value") (value "PGB102ST23")) (sheetpath (names "/") (tstamps "/")) (tstamps "202804e3")) -(comp (ref "J6") - (value "mcu.swd") - (footprint "Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD") - (property (name "Sheetname") (value "mcu")) - (property (name "Sheetfile") (value "edg.parts.microcontroller.Rp2040.Rp2040")) - (property (name "edg_path") (value "mcu.swd.conn")) - (property (name "edg_short_path") (value "mcu.swd")) - (property (name "edg_refdes") (value "J6")) - (property (name "edg_part") (value "PinHeader1.27 Shrouded 2x5 (Generic)")) - (property (name "edg_value") (value "PinHeader1.27 Shrouded 2x5")) - (sheetpath (names "/mcu/") (tstamps "/02850146/")) - (tstamps "02ae014f")) (comp (ref "U14") (value "mcu.ic") (footprint "Package_DFN_QFN:QFN-56-1EP_7x7mm_P0.4mm_EP3.2x3.2mm") @@ -1608,6 +1596,18 @@ (property (name "edg_value") (value "50V 1uF X5R ±10% 0603 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/mcu/") (tstamps "/02850146/")) (tstamps "20e504ff")) +(comp (ref "J6") + (value "mcu.swd") + (footprint "Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD") + (property (name "Sheetname") (value "mcu")) + (property (name "Sheetfile") (value "edg.parts.microcontroller.Rp2040.Rp2040")) + (property (name "edg_path") (value "mcu.swd.conn")) + (property (name "edg_short_path") (value "mcu.swd")) + (property (name "edg_refdes") (value "J6")) + (property (name "edg_part") (value "PinHeader1.27 Shrouded 2x5 (Generic)")) + (property (name "edg_value") (value "PinHeader1.27 Shrouded 2x5")) + (sheetpath (names "/mcu/") (tstamps "/02850146/")) + (tstamps "02ae014f")) (comp (ref "X2") (value "mcu.crystal.package") (footprint "Crystal:Crystal_SMD_3225-4Pin_3.2x2.5mm") @@ -2186,9 +2186,6 @@ (node (ref R19) (pin 2)) (node (ref R20) (pin 2)) (node (ref U13) (pin 3)) - (node (ref J6) (pin 3)) - (node (ref J6) (pin 5)) - (node (ref J6) (pin 9)) (node (ref U14) (pin 19)) (node (ref U14) (pin 57)) (node (ref C47) (pin 2)) @@ -2204,6 +2201,9 @@ (node (ref C56) (pin 2)) (node (ref C57) (pin 2)) (node (ref C58) (pin 2)) + (node (ref J6) (pin 3)) + (node (ref J6) (pin 5)) + (node (ref J6) (pin 9)) (node (ref X2) (pin 2)) (node (ref X2) (pin 4)) (node (ref C59) (pin 2)) @@ -2252,7 +2252,6 @@ (node (ref X1) (pin 1)) (node (ref X1) (pin 4)) (node (ref C46) (pin 1)) - (node (ref J6) (pin 1)) (node (ref U14) (pin 1)) (node (ref U14) (pin 10)) (node (ref U14) (pin 22)) @@ -2271,7 +2270,8 @@ (node (ref C53) (pin 1)) (node (ref C54) (pin 1)) (node (ref U15) (pin 8)) - (node (ref C55) (pin 1))) + (node (ref C55) (pin 1)) + (node (ref J6) (pin 1))) (net (code 4) (name "vgate") (node (ref R5) (pin 1)) (node (ref C4) (pin 1)) @@ -2650,14 +2650,14 @@ (node (ref U14) (pin 37)) (node (ref D16) (pin 2))) (net (code 84) (name "mcu.swd_node.swdio") - (node (ref J6) (pin 2)) - (node (ref U14) (pin 25))) + (node (ref U14) (pin 25)) + (node (ref J6) (pin 2))) (net (code 85) (name "mcu.swd_node.swclk") - (node (ref J6) (pin 4)) - (node (ref U14) (pin 24))) + (node (ref U14) (pin 24)) + (node (ref J6) (pin 4))) (net (code 86) (name "mcu.reset_node") - (node (ref J6) (pin 10)) - (node (ref U14) (pin 26))) + (node (ref U14) (pin 26)) + (node (ref J6) (pin 10))) (net (code 87) (name "mcu.xtal_node.xi") (node (ref U14) (pin 20)) (node (ref X2) (pin 1)) @@ -2666,37 +2666,37 @@ (node (ref U14) (pin 21)) (node (ref X2) (pin 3)) (node (ref C60) (pin 1))) -(net (code 89) (name "mcu.swd.tdi") - (node (ref J6) (pin 8)) - (node (ref U14) (pin 3))) -(net (code 90) (name "mcu.swd.swo") - (node (ref J6) (pin 6)) - (node (ref U14) (pin 2))) -(net (code 91) (name "mcu.ic.dvdd") +(net (code 89) (name "mcu.ic.dvdd") (node (ref U14) (pin 23)) (node (ref U14) (pin 45)) (node (ref U14) (pin 50)) (node (ref C56) (pin 1)) (node (ref C57) (pin 1)) (node (ref C58) (pin 1))) -(net (code 92) (name "mcu.ic.qspi.sck") +(net (code 90) (name "mcu.ic.qspi.sck") (node (ref U14) (pin 52)) (node (ref U15) (pin 6))) -(net (code 93) (name "mcu.ic.qspi.mosi") +(net (code 91) (name "mcu.ic.qspi.mosi") (node (ref U14) (pin 53)) (node (ref U15) (pin 5))) -(net (code 94) (name "mcu.ic.qspi.miso") +(net (code 92) (name "mcu.ic.qspi.miso") (node (ref U14) (pin 55)) (node (ref U15) (pin 2))) -(net (code 95) (name "mcu.ic.qspi_cs") +(net (code 93) (name "mcu.ic.qspi_cs") (node (ref U14) (pin 56)) (node (ref U15) (pin 1))) -(net (code 96) (name "mcu.ic.qspi_sd2") +(net (code 94) (name "mcu.ic.qspi_sd2") (node (ref U14) (pin 54)) (node (ref U15) (pin 3))) -(net (code 97) (name "mcu.ic.qspi_sd3") +(net (code 95) (name "mcu.ic.qspi_sd3") (node (ref U14) (pin 51)) (node (ref U15) (pin 7))) +(net (code 96) (name "mcu.swd.tdi") + (node (ref U14) (pin 3)) + (node (ref J6) (pin 8))) +(net (code 97) (name "mcu.swd.swo") + (node (ref U14) (pin 2)) + (node (ref J6) (pin 6))) (net (code 98) (name "mcu.usb_res.interior.dp") (node (ref U14) (pin 47)) (node (ref R24) (pin 2))) diff --git a/examples/Fcml/Fcml.svgpcb.js b/examples/Fcml/Fcml.svgpcb.js index e0c2a34e9..46135a11e 100644 --- a/examples/Fcml/Fcml.svgpcb.js +++ b/examples/Fcml/Fcml.svgpcb.js @@ -595,11 +595,6 @@ const U13 = board.add(SOT_23, { translate: pt(3.293, 2.769), rotate: 0, id: 'U13' }) -// mcu.swd.conn -const J6 = board.add(PinHeader_2x05_P1_27mm_Vertical_SMD, { - translate: pt(2.498, 0.146), rotate: 0, - id: 'J6' -}) // mcu.ic const U14 = board.add(QFN_56_1EP_7x7mm_P0_4mm_EP3_2x3_2mm, { translate: pt(2.127, 0.163), rotate: 0, @@ -670,6 +665,11 @@ const C58 = board.add(C_0603_1608Metric, { translate: pt(2.491, 0.755), rotate: 0, id: 'C58' }) +// mcu.swd.conn +const J6 = board.add(PinHeader_2x05_P1_27mm_Vertical_SMD, { + translate: pt(2.498, 0.146), rotate: 0, + id: 'J6' +}) // mcu.crystal.package const X2 = board.add(Crystal_SMD_3225_4Pin_3_2x2_5mm, { translate: pt(2.453, 0.431), rotate: 0, @@ -878,8 +878,8 @@ const R39 = board.add(R_0603_1608Metric, { board.setNetlist([ {name: "vusb", pads: [["J1", "A4"], ["J1", "A9"], ["J1", "B4"], ["J1", "B9"], ["J2", "A4"], ["J2", "A9"], ["J2", "B4"], ["J2", "B9"], ["TP1", "1"], ["U1", "3"], ["C1", "1"], ["U2", "4"], ["U2", "5"], ["L1", "1"], ["C3", "1"]]}, - {name: "gnd", pads: [["J1", "A1"], ["J1", "A12"], ["J1", "B1"], ["J1", "B12"], ["J1", "S1"], ["R1", "1"], ["R2", "1"], ["J2", "A1"], ["J2", "A12"], ["J2", "B1"], ["J2", "B12"], ["J2", "S1"], ["R3", "1"], ["R4", "1"], ["J3", "1"], ["TP2", "1"], ["U1", "1"], ["C1", "2"], ["C2", "2"], ["D1", "2"], ["U2", "2"], ["R6", "2"], ["C3", "2"], ["C4", "2"], ["C5", "2"], ["C6", "2"], ["C7", "2"], ["C8", "2"], ["C9", "2"], ["C10", "2"], ["C11", "2"], ["C12", "2"], ["U3", "4"], ["C13", "2"], ["Q2", "1"], ["Q2", "2"], ["Q2", "3"], ["U5", "4"], ["C18", "2"], ["U8", "4"], ["C28", "2"], ["J4", "1"], ["TP6", "1"], ["U10", "49"], ["U11", "2"], ["C36", "2"], ["C37", "2"], ["U12", "4"], ["C38", "2"], ["J5", "3"], ["J5", "5"], ["J5", "9"], ["C39", "2"], ["C40", "2"], ["C41", "2"], ["C42", "2"], ["C43", "2"], ["C44", "2"], ["C45", "2"], ["R16", "2"], ["X1", "2"], ["C46", "2"], ["SW1", "2"], ["R17", "2"], ["R18", "2"], ["R19", "2"], ["R20", "2"], ["U13", "3"], ["J6", "3"], ["J6", "5"], ["J6", "9"], ["U14", "19"], ["U14", "57"], ["C47", "2"], ["C48", "2"], ["C49", "2"], ["C50", "2"], ["C51", "2"], ["C52", "2"], ["C53", "2"], ["C54", "2"], ["U15", "4"], ["C55", "2"], ["C56", "2"], ["C57", "2"], ["C58", "2"], ["X2", "2"], ["X2", "4"], ["C59", "2"], ["C60", "2"], ["SW2", "2"], ["R26", "2"], ["R27", "2"], ["R28", "2"], ["R29", "2"], ["U16", "3"], ["C61", "2"], ["C62", "2"], ["C63", "2"], ["C64", "2"], ["C65", "2"], ["C66", "2"], ["R37", "2"], ["R39", "2"]]}, - {name: "v3v3", pads: [["U1", "2"], ["C2", "1"], ["TP3", "1"], ["D1", "1"], ["U5", "1"], ["C18", "1"], ["U8", "1"], ["C28", "1"], ["U10", "1"], ["U10", "22"], ["U10", "24"], ["U10", "33"], ["U11", "1"], ["U11", "3"], ["C36", "1"], ["R13", "1"], ["U12", "3"], ["U12", "7"], ["U12", "8"], ["C38", "1"], ["J5", "1"], ["R14", "1"], ["C39", "1"], ["C40", "1"], ["C41", "1"], ["C42", "1"], ["X1", "1"], ["X1", "4"], ["C46", "1"], ["J6", "1"], ["U14", "1"], ["U14", "10"], ["U14", "22"], ["U14", "33"], ["U14", "42"], ["U14", "43"], ["U14", "44"], ["U14", "48"], ["U14", "49"], ["C47", "1"], ["C48", "1"], ["C49", "1"], ["C50", "1"], ["C51", "1"], ["C52", "1"], ["C53", "1"], ["C54", "1"], ["U15", "8"], ["C55", "1"]]}, + {name: "gnd", pads: [["J1", "A1"], ["J1", "A12"], ["J1", "B1"], ["J1", "B12"], ["J1", "S1"], ["R1", "1"], ["R2", "1"], ["J2", "A1"], ["J2", "A12"], ["J2", "B1"], ["J2", "B12"], ["J2", "S1"], ["R3", "1"], ["R4", "1"], ["J3", "1"], ["TP2", "1"], ["U1", "1"], ["C1", "2"], ["C2", "2"], ["D1", "2"], ["U2", "2"], ["R6", "2"], ["C3", "2"], ["C4", "2"], ["C5", "2"], ["C6", "2"], ["C7", "2"], ["C8", "2"], ["C9", "2"], ["C10", "2"], ["C11", "2"], ["C12", "2"], ["U3", "4"], ["C13", "2"], ["Q2", "1"], ["Q2", "2"], ["Q2", "3"], ["U5", "4"], ["C18", "2"], ["U8", "4"], ["C28", "2"], ["J4", "1"], ["TP6", "1"], ["U10", "49"], ["U11", "2"], ["C36", "2"], ["C37", "2"], ["U12", "4"], ["C38", "2"], ["J5", "3"], ["J5", "5"], ["J5", "9"], ["C39", "2"], ["C40", "2"], ["C41", "2"], ["C42", "2"], ["C43", "2"], ["C44", "2"], ["C45", "2"], ["R16", "2"], ["X1", "2"], ["C46", "2"], ["SW1", "2"], ["R17", "2"], ["R18", "2"], ["R19", "2"], ["R20", "2"], ["U13", "3"], ["U14", "19"], ["U14", "57"], ["C47", "2"], ["C48", "2"], ["C49", "2"], ["C50", "2"], ["C51", "2"], ["C52", "2"], ["C53", "2"], ["C54", "2"], ["U15", "4"], ["C55", "2"], ["C56", "2"], ["C57", "2"], ["C58", "2"], ["J6", "3"], ["J6", "5"], ["J6", "9"], ["X2", "2"], ["X2", "4"], ["C59", "2"], ["C60", "2"], ["SW2", "2"], ["R26", "2"], ["R27", "2"], ["R28", "2"], ["R29", "2"], ["U16", "3"], ["C61", "2"], ["C62", "2"], ["C63", "2"], ["C64", "2"], ["C65", "2"], ["C66", "2"], ["R37", "2"], ["R39", "2"]]}, + {name: "v3v3", pads: [["U1", "2"], ["C2", "1"], ["TP3", "1"], ["D1", "1"], ["U5", "1"], ["C18", "1"], ["U8", "1"], ["C28", "1"], ["U10", "1"], ["U10", "22"], ["U10", "24"], ["U10", "33"], ["U11", "1"], ["U11", "3"], ["C36", "1"], ["R13", "1"], ["U12", "3"], ["U12", "7"], ["U12", "8"], ["C38", "1"], ["J5", "1"], ["R14", "1"], ["C39", "1"], ["C40", "1"], ["C41", "1"], ["C42", "1"], ["X1", "1"], ["X1", "4"], ["C46", "1"], ["U14", "1"], ["U14", "10"], ["U14", "22"], ["U14", "33"], ["U14", "42"], ["U14", "43"], ["U14", "44"], ["U14", "48"], ["U14", "49"], ["C47", "1"], ["C48", "1"], ["C49", "1"], ["C50", "1"], ["C51", "1"], ["C52", "1"], ["C53", "1"], ["C54", "1"], ["U15", "8"], ["C55", "1"], ["J6", "1"]]}, {name: "vgate", pads: [["R5", "1"], ["C4", "1"], ["D2", "1"], ["TP4", "1"], ["U3", "1"], ["C13", "1"], ["D4", "2"]]}, {name: "usb_fpga_chain_0.d_P", pads: [["J2", "A6"], ["J2", "B6"], ["R21", "2"], ["R22", "1"], ["U13", "2"]]}, {name: "usb_fpga_chain_0.d_N", pads: [["J2", "A7"], ["J2", "B7"], ["R23", "1"], ["U13", "1"]]}, @@ -960,13 +960,11 @@ board.setNetlist([ {name: "mcu.gpio.led_1", pads: [["U14", "35"], ["D14", "2"]]}, {name: "mcu.gpio.led_2", pads: [["U14", "36"], ["D15", "2"]]}, {name: "mcu.gpio.led_3", pads: [["U14", "37"], ["D16", "2"]]}, - {name: "mcu.swd_node.swdio", pads: [["J6", "2"], ["U14", "25"]]}, - {name: "mcu.swd_node.swclk", pads: [["J6", "4"], ["U14", "24"]]}, - {name: "mcu.reset_node", pads: [["J6", "10"], ["U14", "26"]]}, + {name: "mcu.swd_node.swdio", pads: [["U14", "25"], ["J6", "2"]]}, + {name: "mcu.swd_node.swclk", pads: [["U14", "24"], ["J6", "4"]]}, + {name: "mcu.reset_node", pads: [["U14", "26"], ["J6", "10"]]}, {name: "mcu.xtal_node.xi", pads: [["U14", "20"], ["X2", "1"], ["C59", "1"]]}, {name: "mcu.xtal_node.xo", pads: [["U14", "21"], ["X2", "3"], ["C60", "1"]]}, - {name: "mcu.swd.tdi", pads: [["J6", "8"], ["U14", "3"]]}, - {name: "mcu.swd.swo", pads: [["J6", "6"], ["U14", "2"]]}, {name: "mcu.ic.dvdd", pads: [["U14", "23"], ["U14", "45"], ["U14", "50"], ["C56", "1"], ["C57", "1"], ["C58", "1"]]}, {name: "mcu.ic.qspi.sck", pads: [["U14", "52"], ["U15", "6"]]}, {name: "mcu.ic.qspi.mosi", pads: [["U14", "53"], ["U15", "5"]]}, @@ -974,6 +972,8 @@ board.setNetlist([ {name: "mcu.ic.qspi_cs", pads: [["U14", "56"], ["U15", "1"]]}, {name: "mcu.ic.qspi_sd2", pads: [["U14", "54"], ["U15", "3"]]}, {name: "mcu.ic.qspi_sd3", pads: [["U14", "51"], ["U15", "7"]]}, + {name: "mcu.swd.tdi", pads: [["U14", "3"], ["J6", "8"]]}, + {name: "mcu.swd.swo", pads: [["U14", "2"], ["J6", "6"]]}, {name: "mcu.usb_res.interior.dp", pads: [["U14", "47"], ["R24", "2"]]}, {name: "mcu.usb_res.interior.dm", pads: [["U14", "46"], ["R25", "2"]]}, {name: "mcu_sw.out", pads: [["U14", "29"], ["SW2", "1"]]}, diff --git a/examples/HighSwitch/HighSwitch.net.ref b/examples/HighSwitch/HighSwitch.net.ref index 223386972..2a63786b2 100644 --- a/examples/HighSwitch/HighSwitch.net.ref +++ b/examples/HighSwitch/HighSwitch.net.ref @@ -108,18 +108,6 @@ (property (name "edg_value") (value "10uF")) (sheetpath (names "/pwr/power_path/") (tstamps "/02b3015a/1786043a/")) (tstamps "0be902ec")) -(comp (ref "J2") - (value "mcu.swd") - (footprint "Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD") - (property (name "Sheetname") (value "mcu")) - (property (name "Sheetfile") (value "edg.parts.microcontroller.Lpc1549.Lpc1549_48")) - (property (name "edg_path") (value "mcu.swd.conn")) - (property (name "edg_short_path") (value "mcu.swd")) - (property (name "edg_refdes") (value "J2")) - (property (name "edg_part") (value "PinHeader1.27 Shrouded 2x5 (Generic)")) - (property (name "edg_value") (value "PinHeader1.27 Shrouded 2x5")) - (sheetpath (names "/mcu/") (tstamps "/02850146/")) - (tstamps "02ae014f")) (comp (ref "U2") (value "mcu.ic") (footprint "Package_QFP:LQFP-48_7x7mm_P0.5mm") @@ -336,6 +324,18 @@ (property (name "edg_value") (value "22pF")) (sheetpath (names "/mcu/crystal/") (tstamps "/02850146/0c1b0303/")) (tstamps "05e801f6")) +(comp (ref "J2") + (value "mcu.swd") + (footprint "Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD") + (property (name "Sheetname") (value "mcu")) + (property (name "Sheetfile") (value "edg.parts.microcontroller.Lpc1549.Lpc1549_48")) + (property (name "edg_path") (value "mcu.swd.conn")) + (property (name "edg_short_path") (value "mcu.swd")) + (property (name "edg_refdes") (value "J2")) + (property (name "edg_part") (value "PinHeader1.27 Shrouded 2x5 (Generic)")) + (property (name "edg_value") (value "PinHeader1.27 Shrouded 2x5")) + (sheetpath (names "/mcu/") (tstamps "/02850146/")) + (tstamps "02ae014f")) (comp (ref "J3") (value "can.conn") (footprint "calisco:Molex_DuraClik_vert_5pin") @@ -1114,9 +1114,6 @@ (node (ref C1) (pin 2)) (node (ref C3) (pin 2)) (node (ref C4) (pin 2)) - (node (ref J2) (pin 3)) - (node (ref J2) (pin 5)) - (node (ref J2) (pin 9)) (node (ref U2) (pin 11)) (node (ref U2) (pin 17)) (node (ref U2) (pin 20)) @@ -1139,6 +1136,9 @@ (node (ref X1) (pin 4)) (node (ref C17) (pin 2)) (node (ref C18) (pin 2)) + (node (ref J2) (pin 3)) + (node (ref J2) (pin 5)) + (node (ref J2) (pin 9)) (node (ref U5) (pin 4)) (node (ref C21) (pin 2)) (node (ref R6) (pin 2)) @@ -1164,7 +1164,6 @@ (node (ref R1) (pin 1)) (node (ref L1) (pin 2)) (node (ref C4) (pin 1)) - (node (ref J2) (pin 1)) (node (ref U2) (pin 10)) (node (ref U2) (pin 14)) (node (ref U2) (pin 16)) @@ -1185,6 +1184,7 @@ (node (ref C14) (pin 1)) (node (ref C15) (pin 1)) (node (ref C16) (pin 1)) + (node (ref J2) (pin 1)) (node (ref U5) (pin 1)) (node (ref C21) (pin 1)) (node (ref D1) (pin 2)) @@ -1233,25 +1233,25 @@ (node (ref X1) (pin 3)) (node (ref C18) (pin 1))) (net (code 17) (name "mcu.swd_node.swdio") - (node (ref J2) (pin 2)) (node (ref U2) (pin 33)) - (node (ref R3) (pin 2))) + (node (ref R3) (pin 2)) + (node (ref J2) (pin 2))) (net (code 18) (name "mcu.swd_node.swclk") - (node (ref J2) (pin 4)) (node (ref U2) (pin 29)) - (node (ref R4) (pin 2))) + (node (ref R4) (pin 2)) + (node (ref J2) (pin 4))) (net (code 19) (name "mcu.reset_node") - (node (ref J2) (pin 10)) - (node (ref U2) (pin 34))) -(net (code 20) (name "mcu.swd.tdi") - (node (ref J2) (pin 8))) -(net (code 21) (name "mcu.swd.swo") - (node (ref J2) (pin 6)) - (node (ref U2) (pin 9))) -(net (code 22) (name "mcu.ic.xtal_rtc.xtal_in") + (node (ref U2) (pin 34)) + (node (ref J2) (pin 10))) +(net (code 20) (name "mcu.ic.xtal_rtc.xtal_in") (node (ref U2) (pin 31))) -(net (code 23) (name "mcu.ic.xtal_rtc.xtal_out") +(net (code 21) (name "mcu.ic.xtal_rtc.xtal_out") (node (ref U2) (pin 32))) +(net (code 22) (name "mcu.swd.tdi") + (node (ref J2) (pin 8))) +(net (code 23) (name "mcu.swd.swo") + (node (ref U2) (pin 9)) + (node (ref J2) (pin 6))) (net (code 24) (name "can.can.canh") (node (ref J3) (pin 4)) (node (ref U4) (pin 2)) diff --git a/examples/HighSwitch/HighSwitch.svgpcb.js b/examples/HighSwitch/HighSwitch.svgpcb.js index 5bc6ad2e8..badfce03e 100644 --- a/examples/HighSwitch/HighSwitch.svgpcb.js +++ b/examples/HighSwitch/HighSwitch.svgpcb.js @@ -45,11 +45,6 @@ const C4 = board.add(C_0805_2012Metric, { translate: pt(1.143, 1.802), rotate: 0, id: 'C4' }) -// mcu.swd.conn -const J2 = board.add(PinHeader_2x05_P1_27mm_Vertical_SMD, { - translate: pt(2.106, 1.028), rotate: 0, - id: 'J2' -}) // mcu.ic const U2 = board.add(LQFP_48_7x7mm_P0_5mm, { translate: pt(1.694, 1.085), rotate: 0, @@ -140,6 +135,11 @@ const C18 = board.add(C_0603_1608Metric, { translate: pt(1.861, 1.569), rotate: 0, id: 'C18' }) +// mcu.swd.conn +const J2 = board.add(PinHeader_2x05_P1_27mm_Vertical_SMD, { + translate: pt(2.106, 1.028), rotate: 0, + id: 'J2' +}) // can.conn const J3 = board.add(Molex_DuraClik_vert_5pin, { translate: pt(0.000, 2.299), rotate: 0, @@ -448,8 +448,8 @@ const Q24 = board.add(TO_252_2, { board.setNetlist([ {name: "vin", pads: [["J1", "2"], ["U1", "3"], ["U1", "5"], ["C1", "1"], ["C3", "1"], ["R5", "1"], ["J4", "1"], ["R13", "1"], ["Q2", "3"], ["R14", "1"], ["Q4", "3"], ["J5", "1"], ["R15", "1"], ["Q6", "3"], ["R16", "1"], ["Q8", "3"], ["J6", "1"], ["R17", "1"], ["Q10", "3"], ["R18", "1"], ["Q12", "3"], ["J7", "1"], ["R19", "1"], ["Q14", "3"], ["R20", "1"], ["Q16", "3"], ["J8", "1"], ["R21", "1"], ["Q18", "3"], ["R22", "1"], ["Q20", "3"], ["J9", "1"], ["R23", "1"], ["Q22", "3"], ["R24", "1"], ["Q24", "3"]]}, - {name: "gnd", pads: [["J1", "1"], ["J1", "3"], ["U1", "1"], ["R2", "2"], ["C1", "2"], ["C3", "2"], ["C4", "2"], ["J2", "3"], ["J2", "5"], ["J2", "9"], ["U2", "11"], ["U2", "17"], ["U2", "20"], ["U2", "40"], ["U2", "41"], ["R4", "1"], ["C5", "2"], ["C6", "2"], ["C7", "2"], ["C8", "2"], ["C9", "2"], ["C10", "2"], ["C11", "2"], ["C12", "2"], ["C13", "2"], ["C14", "2"], ["C15", "2"], ["C16", "2"], ["X1", "2"], ["X1", "4"], ["C17", "2"], ["C18", "2"], ["U5", "4"], ["C21", "2"], ["R6", "2"], ["J4", "4"], ["Q1", "2"], ["Q3", "2"], ["J5", "4"], ["Q5", "2"], ["Q7", "2"], ["J6", "4"], ["Q9", "2"], ["Q11", "2"], ["J7", "4"], ["Q13", "2"], ["Q15", "2"], ["J8", "4"], ["Q17", "2"], ["Q19", "2"], ["J9", "4"], ["Q21", "2"], ["Q23", "2"]]}, - {name: "v3v3", pads: [["R1", "1"], ["L1", "2"], ["C4", "1"], ["J2", "1"], ["U2", "10"], ["U2", "14"], ["U2", "16"], ["U2", "27"], ["U2", "30"], ["U2", "39"], ["U2", "42"], ["R3", "1"], ["C5", "1"], ["C6", "1"], ["C7", "1"], ["C8", "1"], ["C9", "1"], ["C10", "1"], ["C11", "1"], ["C12", "1"], ["C13", "1"], ["C14", "1"], ["C15", "1"], ["C16", "1"], ["U5", "1"], ["C21", "1"], ["D1", "2"], ["D2", "2"]]}, + {name: "gnd", pads: [["J1", "1"], ["J1", "3"], ["U1", "1"], ["R2", "2"], ["C1", "2"], ["C3", "2"], ["C4", "2"], ["U2", "11"], ["U2", "17"], ["U2", "20"], ["U2", "40"], ["U2", "41"], ["R4", "1"], ["C5", "2"], ["C6", "2"], ["C7", "2"], ["C8", "2"], ["C9", "2"], ["C10", "2"], ["C11", "2"], ["C12", "2"], ["C13", "2"], ["C14", "2"], ["C15", "2"], ["C16", "2"], ["X1", "2"], ["X1", "4"], ["C17", "2"], ["C18", "2"], ["J2", "3"], ["J2", "5"], ["J2", "9"], ["U5", "4"], ["C21", "2"], ["R6", "2"], ["J4", "4"], ["Q1", "2"], ["Q3", "2"], ["J5", "4"], ["Q5", "2"], ["Q7", "2"], ["J6", "4"], ["Q9", "2"], ["Q11", "2"], ["J7", "4"], ["Q13", "2"], ["Q15", "2"], ["J8", "4"], ["Q17", "2"], ["Q19", "2"], ["J9", "4"], ["Q21", "2"], ["Q23", "2"]]}, + {name: "v3v3", pads: [["R1", "1"], ["L1", "2"], ["C4", "1"], ["U2", "10"], ["U2", "14"], ["U2", "16"], ["U2", "27"], ["U2", "30"], ["U2", "39"], ["U2", "42"], ["R3", "1"], ["C5", "1"], ["C6", "1"], ["C7", "1"], ["C8", "1"], ["C9", "1"], ["C10", "1"], ["C11", "1"], ["C12", "1"], ["C13", "1"], ["C14", "1"], ["C15", "1"], ["C16", "1"], ["J2", "1"], ["U5", "1"], ["C21", "1"], ["D1", "2"], ["D2", "2"]]}, {name: "can_chain_0.txd", pads: [["U2", "43"], ["U5", "3"]]}, {name: "can_chain_0.rxd", pads: [["U2", "44"], ["U5", "2"]]}, {name: "pwr.ic.sw", pads: [["U1", "2"], ["C2", "2"], ["L1", "1"]]}, @@ -463,13 +463,13 @@ board.setNetlist([ {name: "mcu.gpio.rgb2_blue", pads: [["U2", "13"], ["R12", "2"]]}, {name: "mcu.xtal_node.xi", pads: [["U2", "26"], ["X1", "1"], ["C17", "1"]]}, {name: "mcu.xtal_node.xo", pads: [["U2", "25"], ["X1", "3"], ["C18", "1"]]}, - {name: "mcu.swd_node.swdio", pads: [["J2", "2"], ["U2", "33"], ["R3", "2"]]}, - {name: "mcu.swd_node.swclk", pads: [["J2", "4"], ["U2", "29"], ["R4", "2"]]}, - {name: "mcu.reset_node", pads: [["J2", "10"], ["U2", "34"]]}, - {name: "mcu.swd.tdi", pads: [["J2", "8"]]}, - {name: "mcu.swd.swo", pads: [["J2", "6"], ["U2", "9"]]}, + {name: "mcu.swd_node.swdio", pads: [["U2", "33"], ["R3", "2"], ["J2", "2"]]}, + {name: "mcu.swd_node.swclk", pads: [["U2", "29"], ["R4", "2"], ["J2", "4"]]}, + {name: "mcu.reset_node", pads: [["U2", "34"], ["J2", "10"]]}, {name: "mcu.ic.xtal_rtc.xtal_in", pads: [["U2", "31"]]}, {name: "mcu.ic.xtal_rtc.xtal_out", pads: [["U2", "32"]]}, + {name: "mcu.swd.tdi", pads: [["J2", "8"]]}, + {name: "mcu.swd.swo", pads: [["U2", "9"], ["J2", "6"]]}, {name: "can.can.canh", pads: [["J3", "4"], ["U4", "2"], ["U5", "7"]]}, {name: "can.can.canl", pads: [["J3", "5"], ["U4", "1"], ["U5", "6"]]}, {name: "can.conn.pwr", pads: [["J3", "2"], ["F1", "1"]]}, diff --git a/examples/JacdacKeyswitch/JacdacKeyswitch.net.ref b/examples/JacdacKeyswitch/JacdacKeyswitch.net.ref index 7a7b7919e..a8b6abaf4 100644 --- a/examples/JacdacKeyswitch/JacdacKeyswitch.net.ref +++ b/examples/JacdacKeyswitch/JacdacKeyswitch.net.ref @@ -276,18 +276,6 @@ (property (name "edg_value") (value "v3v3")) (sheetpath (names "/") (tstamps "/")) (tstamps "08220220")) -(comp (ref "J1") - (value "mcu.swd") - (footprint "Connector:Tag-Connect_TC2030-IDC-NL_2x03_P1.27mm_Vertical") - (property (name "Sheetname") (value "mcu")) - (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32g031.Stm32g031_G")) - (property (name "edg_path") (value "mcu.swd.conn")) - (property (name "edg_short_path") (value "mcu.swd")) - (property (name "edg_refdes") (value "J1")) - (property (name "edg_part") (value "")) - (property (name "edg_value") (value "")) - (sheetpath (names "/mcu/") (tstamps "/02850146/")) - (tstamps "02ae014f")) (comp (ref "U2") (value "mcu.ic") (footprint "Package_DFN_QFN:QFN-28_4x4mm_P0.5mm") @@ -324,6 +312,18 @@ (property (name "edg_value") (value "50V 100nF X7R ±10% 0603 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/mcu/") (tstamps "/02850146/")) (tstamps "0f10031e")) +(comp (ref "J1") + (value "mcu.swd") + (footprint "Connector:Tag-Connect_TC2030-IDC-NL_2x03_P1.27mm_Vertical") + (property (name "Sheetname") (value "mcu")) + (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32g031.Stm32g031_G")) + (property (name "edg_path") (value "mcu.swd.conn")) + (property (name "edg_short_path") (value "mcu.swd")) + (property (name "edg_refdes") (value "J1")) + (property (name "edg_part") (value "")) + (property (name "edg_value") (value "")) + (sheetpath (names "/mcu/") (tstamps "/02850146/")) + (tstamps "02ae014f")) (comp (ref "SW1") (value "sw") (footprint "Switch_Keyboard_Hotswap_Kailh:SW_Hotswap_Kailh_MX") @@ -477,10 +477,10 @@ (node (ref U1) (pin 2)) (node (ref C1) (pin 2)) (node (ref C2) (pin 2)) - (node (ref J1) (pin 5)) (node (ref U2) (pin 4)) (node (ref C3) (pin 2)) (node (ref C4) (pin 2)) + (node (ref J1) (pin 5)) (node (ref SW1) (pin 2)) (node (ref C5) (pin 2)) (node (ref D9) (pin 2))) @@ -492,10 +492,10 @@ (node (ref U1) (pin 5)) (node (ref C2) (pin 1)) (node (ref TP3) (pin 1)) - (node (ref J1) (pin 1)) (node (ref U2) (pin 3)) (node (ref C3) (pin 1)) (node (ref C4) (pin 1)) + (node (ref J1) (pin 1)) (node (ref D7) (pin 2)) (node (ref D8) (pin 1))) (net (code 6) (name "edge.status_led.package.k") @@ -514,14 +514,14 @@ (node (ref U2) (pin 15)) (node (ref R5) (pin 2))) (net (code 11) (name "mcu.swd_node.swdio") - (node (ref J1) (pin 2)) - (node (ref U2) (pin 20))) + (node (ref U2) (pin 20)) + (node (ref J1) (pin 2))) (net (code 12) (name "mcu.swd_node.swclk") - (node (ref J1) (pin 4)) - (node (ref U2) (pin 21))) + (node (ref U2) (pin 21)) + (node (ref J1) (pin 4))) (net (code 13) (name "mcu.reset_node") - (node (ref J1) (pin 3)) - (node (ref U2) (pin 5))) + (node (ref U2) (pin 5)) + (node (ref J1) (pin 3))) (net (code 14) (name "mcu.swd.swo") (node (ref J1) (pin 6))) (net (code 15) (name "sw.out") diff --git a/examples/JacdacKeyswitch/JacdacKeyswitch.svgpcb.js b/examples/JacdacKeyswitch/JacdacKeyswitch.svgpcb.js index fc2178e12..ac8ed410d 100644 --- a/examples/JacdacKeyswitch/JacdacKeyswitch.svgpcb.js +++ b/examples/JacdacKeyswitch/JacdacKeyswitch.svgpcb.js @@ -115,11 +115,6 @@ const TP3 = board.add(TestPoint_Keystone_5015_Micro_Minature, { translate: pt(0.659, 1.091), rotate: 0, id: 'TP3' }) -// mcu.swd.conn -const J1 = board.add(Tag_Connect_TC2030_IDC_NL_2x03_P1_27mm_Vertical, { - translate: pt(0.870, 0.325), rotate: 0, - id: 'J1' -}) // mcu.ic const U2 = board.add(QFN_28_4x4mm_P0_5mm, { translate: pt(0.836, 0.104), rotate: 0, @@ -135,6 +130,11 @@ const C4 = board.add(C_0603_1608Metric, { translate: pt(0.791, 0.472), rotate: 0, id: 'C4' }) +// mcu.swd.conn +const J1 = board.add(Tag_Connect_TC2030_IDC_NL_2x03_P1_27mm_Vertical, { + translate: pt(0.870, 0.325), rotate: 0, + id: 'J1' +}) // sw.package const SW1 = board.add(SW_Hotswap_Kailh_MX, { translate: pt(0.307, 0.285), rotate: 0, @@ -189,17 +189,17 @@ const D9 = board.add(D_SOD_323, { board.setNetlist([ {name: "jd_data.jd_data", pads: [["EC1", "1"], ["D3", "1"], ["MH1", "MH1"], ["EC2", "1"], ["D6", "1"], ["FB1", "1"]]}, {name: "jd_pwr", pads: [["EC1", "3"], ["D2", "1"], ["MH3", "MH3"], ["EC2", "3"], ["D5", "1"], ["TP2", "1"], ["U1", "1"], ["U1", "3"], ["C1", "1"]]}, - {name: "gnd", pads: [["EC1", "2"], ["R1", "2"], ["D2", "2"], ["D3", "2"], ["MH2", "MH2"], ["MH4", "MH4"], ["EC2", "2"], ["R2", "2"], ["D5", "2"], ["D6", "2"], ["TP1", "1"], ["U1", "2"], ["C1", "2"], ["C2", "2"], ["J1", "5"], ["U2", "4"], ["C3", "2"], ["C4", "2"], ["SW1", "2"], ["C5", "2"], ["D9", "2"]]}, + {name: "gnd", pads: [["EC1", "2"], ["R1", "2"], ["D2", "2"], ["D3", "2"], ["MH2", "MH2"], ["MH4", "MH4"], ["EC2", "2"], ["R2", "2"], ["D5", "2"], ["D6", "2"], ["TP1", "1"], ["U1", "2"], ["C1", "2"], ["C2", "2"], ["U2", "4"], ["C3", "2"], ["C4", "2"], ["J1", "5"], ["SW1", "2"], ["C5", "2"], ["D9", "2"]]}, {name: "jd_status", pads: [["D1", "2"], ["D4", "2"], ["U2", "1"]]}, - {name: "v3v3", pads: [["U1", "5"], ["C2", "1"], ["TP3", "1"], ["J1", "1"], ["U2", "3"], ["C3", "1"], ["C4", "1"], ["D7", "2"], ["D8", "1"]]}, + {name: "v3v3", pads: [["U1", "5"], ["C2", "1"], ["TP3", "1"], ["U2", "3"], ["C3", "1"], ["C4", "1"], ["J1", "1"], ["D7", "2"], ["D8", "1"]]}, {name: "edge.status_led.package.k", pads: [["D1", "1"], ["R1", "1"]]}, {name: "edge2.status_led.package.k", pads: [["D4", "1"], ["R2", "1"]]}, {name: "mcu.gpio.rgb_red", pads: [["U2", "16"], ["R3", "2"]]}, {name: "mcu.gpio.rgb_green", pads: [["U2", "17"], ["R4", "2"]]}, {name: "mcu.gpio.rgb_blue", pads: [["U2", "15"], ["R5", "2"]]}, - {name: "mcu.swd_node.swdio", pads: [["J1", "2"], ["U2", "20"]]}, - {name: "mcu.swd_node.swclk", pads: [["J1", "4"], ["U2", "21"]]}, - {name: "mcu.reset_node", pads: [["J1", "3"], ["U2", "5"]]}, + {name: "mcu.swd_node.swdio", pads: [["U2", "20"], ["J1", "2"]]}, + {name: "mcu.swd_node.swclk", pads: [["U2", "21"], ["J1", "4"]]}, + {name: "mcu.reset_node", pads: [["U2", "5"], ["J1", "3"]]}, {name: "mcu.swd.swo", pads: [["J1", "6"]]}, {name: "sw.out", pads: [["U2", "19"], ["SW1", "1"]]}, {name: "rgb.package.k_red", pads: [["D7", "3"], ["R3", "1"]]}, diff --git a/examples/Keyboard/Keyboard.net.ref b/examples/Keyboard/Keyboard.net.ref index 1cbe1a135..f4dfc08a2 100644 --- a/examples/Keyboard/Keyboard.net.ref +++ b/examples/Keyboard/Keyboard.net.ref @@ -72,18 +72,6 @@ (property (name "edg_value") (value "25V 4.7uF X5R ±10% 0805 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/reg/") (tstamps "/028a013f/")) (tstamps "0be902ec")) -(comp (ref "J2") - (value "mcu.swd") - (footprint "Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD") - (property (name "Sheetname") (value "mcu")) - (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32f103.Stm32f103_48")) - (property (name "edg_path") (value "mcu.swd.conn")) - (property (name "edg_short_path") (value "mcu.swd")) - (property (name "edg_refdes") (value "J2")) - (property (name "edg_part") (value "PinHeader1.27 Shrouded 2x5 (Generic)")) - (property (name "edg_value") (value "PinHeader1.27 Shrouded 2x5")) - (sheetpath (names "/mcu/") (tstamps "/02850146/")) - (tstamps "02ae014f")) (comp (ref "U2") (value "mcu.ic") (footprint "Package_QFP:LQFP-48_7x7mm_P0.5mm") @@ -216,6 +204,18 @@ (property (name "edg_value") (value "50V 10pF C0G ±5% 0603 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/mcu/crystal/") (tstamps "/02850146/0c1b0303/")) (tstamps "05e801f6")) +(comp (ref "J2") + (value "mcu.swd") + (footprint "Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD") + (property (name "Sheetname") (value "mcu")) + (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32f103.Stm32f103_48")) + (property (name "edg_path") (value "mcu.swd.conn")) + (property (name "edg_short_path") (value "mcu.swd")) + (property (name "edg_refdes") (value "J2")) + (property (name "edg_part") (value "PinHeader1.27 Shrouded 2x5 (Generic)")) + (property (name "edg_value") (value "PinHeader1.27 Shrouded 2x5")) + (sheetpath (names "/mcu/") (tstamps "/02850146/")) + (tstamps "02ae014f")) (comp (ref "SW1") (value "sw.sw[0,0]") (footprint "Switch_Keyboard_Hotswap_Kailh:SW_Hotswap_Kailh_MX") @@ -379,9 +379,6 @@ (node (ref U1) (pin 1)) (node (ref C1) (pin 2)) (node (ref C2) (pin 2)) - (node (ref J2) (pin 3)) - (node (ref J2) (pin 5)) - (node (ref J2) (pin 9)) (node (ref U2) (pin 23)) (node (ref U2) (pin 35)) (node (ref U2) (pin 44)) @@ -396,7 +393,10 @@ (node (ref X1) (pin 2)) (node (ref X1) (pin 4)) (node (ref C9) (pin 2)) - (node (ref C10) (pin 2))) + (node (ref C10) (pin 2)) + (node (ref J2) (pin 3)) + (node (ref J2) (pin 5)) + (node (ref J2) (pin 9))) (net (code 3) (name "usb.usb.dp") (node (ref J1) (pin A6)) (node (ref J1) (pin B6)) @@ -415,7 +415,6 @@ (net (code 7) (name "reg.pwr_out") (node (ref U1) (pin 2)) (node (ref C2) (pin 1)) - (node (ref J2) (pin 1)) (node (ref U2) (pin 1)) (node (ref U2) (pin 24)) (node (ref U2) (pin 36)) @@ -427,7 +426,8 @@ (node (ref C6) (pin 1)) (node (ref C7) (pin 1)) (node (ref C8) (pin 1)) - (node (ref R3) (pin 1))) + (node (ref R3) (pin 1)) + (node (ref J2) (pin 1))) (net (code 8) (name "mcu.gpio.0_0") (node (ref U2) (pin 10)) (node (ref SW1) (pin 2)) @@ -459,14 +459,14 @@ (node (ref X1) (pin 3)) (node (ref C10) (pin 1))) (net (code 15) (name "mcu.swd_node.swdio") - (node (ref J2) (pin 2)) - (node (ref U2) (pin 34))) + (node (ref U2) (pin 34)) + (node (ref J2) (pin 2))) (net (code 16) (name "mcu.swd_node.swclk") - (node (ref J2) (pin 4)) - (node (ref U2) (pin 37))) + (node (ref U2) (pin 37)) + (node (ref J2) (pin 4))) (net (code 17) (name "mcu.reset_node") - (node (ref J2) (pin 10)) - (node (ref U2) (pin 7))) + (node (ref U2) (pin 7)) + (node (ref J2) (pin 10))) (net (code 18) (name "mcu.swd.tdi") (node (ref J2) (pin 8))) (net (code 19) (name "mcu.swd.swo") diff --git a/examples/Keyboard/Keyboard.svgpcb.js b/examples/Keyboard/Keyboard.svgpcb.js index dd31bb686..45172caa7 100644 --- a/examples/Keyboard/Keyboard.svgpcb.js +++ b/examples/Keyboard/Keyboard.svgpcb.js @@ -31,11 +31,6 @@ const C2 = board.add(C_0805_2012Metric, { translate: pt(1.722, 1.155), rotate: 0, id: 'C2' }) -// mcu.swd.conn -const J2 = board.add(PinHeader_2x05_P1_27mm_Vertical_SMD, { - translate: pt(1.732, 0.146), rotate: 0, - id: 'J2' -}) // mcu.ic const U2 = board.add(LQFP_48_7x7mm_P0_5mm, { translate: pt(1.321, 0.203), rotate: 0, @@ -91,15 +86,20 @@ const C10 = board.add(C_0603_1608Metric, { translate: pt(1.800, 0.647), rotate: 0, id: 'C10' }) +// mcu.swd.conn +const J2 = board.add(PinHeader_2x05_P1_27mm_Vertical_SMD, { + translate: pt(1.732, 0.146), rotate: 0, + id: 'J2' +}) board.setNetlist([ {name: "usb.pwr", pads: [["J1", "A4"], ["J1", "A9"], ["J1", "B4"], ["J1", "B9"], ["U1", "3"], ["C1", "1"]]}, - {name: "usb.gnd", pads: [["J1", "A1"], ["J1", "A12"], ["J1", "B1"], ["J1", "B12"], ["J1", "S1"], ["R1", "1"], ["R2", "1"], ["U1", "1"], ["C1", "2"], ["C2", "2"], ["J2", "3"], ["J2", "5"], ["J2", "9"], ["U2", "23"], ["U2", "35"], ["U2", "44"], ["U2", "47"], ["U2", "8"], ["C3", "2"], ["C4", "2"], ["C5", "2"], ["C6", "2"], ["C7", "2"], ["C8", "2"], ["X1", "2"], ["X1", "4"], ["C9", "2"], ["C10", "2"]]}, + {name: "usb.gnd", pads: [["J1", "A1"], ["J1", "A12"], ["J1", "B1"], ["J1", "B12"], ["J1", "S1"], ["R1", "1"], ["R2", "1"], ["U1", "1"], ["C1", "2"], ["C2", "2"], ["U2", "23"], ["U2", "35"], ["U2", "44"], ["U2", "47"], ["U2", "8"], ["C3", "2"], ["C4", "2"], ["C5", "2"], ["C6", "2"], ["C7", "2"], ["C8", "2"], ["X1", "2"], ["X1", "4"], ["C9", "2"], ["C10", "2"], ["J2", "3"], ["J2", "5"], ["J2", "9"]]}, {name: "usb.usb.dp", pads: [["J1", "A6"], ["J1", "B6"], ["U2", "33"], ["R3", "2"]]}, {name: "usb.usb.dm", pads: [["J1", "A7"], ["J1", "B7"], ["U2", "32"]]}, {name: "usb.conn.cc.cc1", pads: [["J1", "A5"], ["R1", "2"]]}, {name: "usb.conn.cc.cc2", pads: [["J1", "B5"], ["R2", "2"]]}, - {name: "reg.pwr_out", pads: [["U1", "2"], ["C2", "1"], ["J2", "1"], ["U2", "1"], ["U2", "24"], ["U2", "36"], ["U2", "48"], ["U2", "9"], ["C3", "1"], ["C4", "1"], ["C5", "1"], ["C6", "1"], ["C7", "1"], ["C8", "1"], ["R3", "1"]]}, + {name: "reg.pwr_out", pads: [["U1", "2"], ["C2", "1"], ["U2", "1"], ["U2", "24"], ["U2", "36"], ["U2", "48"], ["U2", "9"], ["C3", "1"], ["C4", "1"], ["C5", "1"], ["C6", "1"], ["C7", "1"], ["C8", "1"], ["R3", "1"], ["J2", "1"]]}, {name: "mcu.gpio.0_0", pads: [["U2", "10"], ["SW1", "2"], ["SW2", "2"], ["SW3", "2"]]}, {name: "mcu.gpio.0_1", pads: [["U2", "11"], ["SW4", "2"], ["SW5", "2"], ["SW6", "2"]]}, {name: "mcu.gpio.1_0", pads: [["U2", "12"], ["D1", "2"], ["D4", "2"]]}, @@ -107,9 +107,9 @@ board.setNetlist([ {name: "mcu.gpio.1_2", pads: [["U2", "14"], ["D3", "2"], ["D6", "2"]]}, {name: "mcu.xtal_node.xi", pads: [["U2", "5"], ["X1", "1"], ["C9", "1"]]}, {name: "mcu.xtal_node.xo", pads: [["U2", "6"], ["X1", "3"], ["C10", "1"]]}, - {name: "mcu.swd_node.swdio", pads: [["J2", "2"], ["U2", "34"]]}, - {name: "mcu.swd_node.swclk", pads: [["J2", "4"], ["U2", "37"]]}, - {name: "mcu.reset_node", pads: [["J2", "10"], ["U2", "7"]]}, + {name: "mcu.swd_node.swdio", pads: [["U2", "34"], ["J2", "2"]]}, + {name: "mcu.swd_node.swclk", pads: [["U2", "37"], ["J2", "4"]]}, + {name: "mcu.reset_node", pads: [["U2", "7"], ["J2", "10"]]}, {name: "mcu.swd.tdi", pads: [["J2", "8"]]}, {name: "mcu.swd.swo", pads: [["J2", "6"]]}, {name: "sw.sw[0,0].sw", pads: [["SW1", "1"], ["D1", "1"]]}, diff --git a/examples/Multimeter/Multimeter.net.ref b/examples/Multimeter/Multimeter.net.ref index 7f5d241f9..33b26525c 100644 --- a/examples/Multimeter/Multimeter.net.ref +++ b/examples/Multimeter/Multimeter.net.ref @@ -384,18 +384,6 @@ (property (name "edg_value") (value "MDBT50Q-1MV2")) (sheetpath (names "/mcu/") (tstamps "/02850146/")) (tstamps "013700cd")) -(comp (ref "J2") - (value "mcu.swd") - (footprint "Connector:Tag-Connect_TC2050-IDC-NL_2x05_P1.27mm_Vertical") - (property (name "Sheetname") (value "mcu")) - (property (name "Sheetfile") (value "edg.parts.microcontroller.nRF52840.Mdbt50q_1mv2")) - (property (name "edg_path") (value "mcu.swd.conn")) - (property (name "edg_short_path") (value "mcu.swd")) - (property (name "edg_refdes") (value "J2")) - (property (name "edg_part") (value "")) - (property (name "edg_value") (value "")) - (sheetpath (names "/mcu/") (tstamps "/02850146/")) - (tstamps "02ae014f")) (comp (ref "C7") (value "mcu.vcc_cap") (footprint "Capacitor_SMD:C_0805_2012Metric") @@ -444,6 +432,18 @@ (property (name "edg_value") (value "X5R 25V ±10% 10uF 0805 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/mcu/") (tstamps "/02850146/")) (tstamps "0f3a0354")) +(comp (ref "J2") + (value "mcu.swd") + (footprint "Connector:Tag-Connect_TC2050-IDC-NL_2x05_P1.27mm_Vertical") + (property (name "Sheetname") (value "mcu")) + (property (name "Sheetfile") (value "edg.parts.microcontroller.nRF52840.Mdbt50q_1mv2")) + (property (name "edg_path") (value "mcu.swd.conn")) + (property (name "edg_short_path") (value "mcu.swd")) + (property (name "edg_refdes") (value "J2")) + (property (name "edg_part") (value "")) + (property (name "edg_value") (value "")) + (sheetpath (names "/mcu/") (tstamps "/02850146/")) + (tstamps "02ae014f")) (comp (ref "R8") (value "vbatsense.top_res") (footprint "Resistor_SMD:R_0603_1608Metric") @@ -1314,11 +1314,11 @@ (node (ref U5) (pin 2)) (node (ref U5) (pin 33)) (node (ref U5) (pin 55)) + (node (ref C7) (pin 2)) + (node (ref C8) (pin 2)) (node (ref J2) (pin 2)) (node (ref J2) (pin 3)) (node (ref J2) (pin 5)) - (node (ref C7) (pin 2)) - (node (ref C8) (pin 2)) (node (ref R9) (pin 2)) (node (ref U6) (pin 3)) (node (ref SW2) (pin 2)) @@ -1390,8 +1390,8 @@ (node (ref D4) (pin 1)) (node (ref U5) (pin 28)) (node (ref U5) (pin 30)) - (node (ref J2) (pin 1)) (node (ref C7) (pin 1)) + (node (ref J2) (pin 1)) (node (ref D6) (pin 2)) (node (ref J3) (pin 7)) (node (ref R13) (pin 1)) diff --git a/examples/Multimeter/Multimeter.svgpcb.js b/examples/Multimeter/Multimeter.svgpcb.js index a19494332..3cafe9ed5 100644 --- a/examples/Multimeter/Multimeter.svgpcb.js +++ b/examples/Multimeter/Multimeter.svgpcb.js @@ -160,11 +160,6 @@ const U5 = board.add(Raytac_MDBT50Q, { translate: pt(0.226, 0.325), rotate: 0, id: 'U5' }) -// mcu.swd.conn -const J2 = board.add(Tag_Connect_TC2050_IDC_NL_2x05_P1_27mm_Vertical, { - translate: pt(0.245, 0.822), rotate: 0, - id: 'J2' -}) // mcu.vcc_cap.cap const C7 = board.add(C_0805_2012Metric, { translate: pt(0.596, 0.728), rotate: 0, @@ -185,6 +180,11 @@ const C8 = board.add(C_0805_2012Metric, { translate: pt(0.770, 0.728), rotate: 0, id: 'C8' }) +// mcu.swd.conn +const J2 = board.add(Tag_Connect_TC2050_IDC_NL_2x05_P1_27mm_Vertical, { + translate: pt(0.245, 0.822), rotate: 0, + id: 'J2' +}) // vbatsense.div.top_res const R8 = board.add(R_0603_1608Metric, { translate: pt(3.628, 2.237), rotate: 0, @@ -537,10 +537,10 @@ const C31 = board.add(C_1206_3216Metric, { }) board.setNetlist([ - {name: "gnd", pads: [["U1", "2"], ["J1", "A1"], ["J1", "A12"], ["J1", "B1"], ["J1", "B12"], ["J1", "S1"], ["R1", "1"], ["R2", "1"], ["R4", "1"], ["Q2", "2"], ["SW1", "2"], ["U2", "2"], ["C1", "2"], ["C2", "2"], ["D3", "2"], ["U3", "2"], ["C3", "2"], ["C4", "2"], ["D4", "2"], ["U4", "2"], ["C5", "2"], ["C6", "2"], ["D5", "2"], ["U5", "1"], ["U5", "15"], ["U5", "2"], ["U5", "33"], ["U5", "55"], ["J2", "2"], ["J2", "3"], ["J2", "5"], ["C7", "2"], ["C8", "2"], ["R9", "2"], ["U6", "3"], ["SW2", "2"], ["SW3", "2"], ["J3", "2"], ["C9", "2"], ["C10", "2"], ["U7", "7"], ["U7", "9"], ["C11", "2"], ["C12", "2"], ["C14", "2"], ["R18", "2"], ["U8", "2"], ["C15", "2"], ["U9", "2"], ["U9", "3"], ["C16", "2"], ["U10", "2"], ["C17", "2"], ["U11", "2"], ["C18", "2"], ["U12", "2"], ["C19", "2"], ["U13", "2"], ["C20", "2"], ["U14", "19"], ["U14", "2"], ["U14", "3"], ["C21", "2"], ["C22", "2"], ["C23", "2"], ["C24", "2"], ["C25", "2"], ["U15", "2"], ["C26", "2"], ["U16", "2"], ["C27", "2"], ["U17", "2"], ["C28", "2"], ["U18", "2"], ["C29", "2"], ["U19", "2"], ["C30", "2"], ["C31", "2"]]}, + {name: "gnd", pads: [["U1", "2"], ["J1", "A1"], ["J1", "A12"], ["J1", "B1"], ["J1", "B12"], ["J1", "S1"], ["R1", "1"], ["R2", "1"], ["R4", "1"], ["Q2", "2"], ["SW1", "2"], ["U2", "2"], ["C1", "2"], ["C2", "2"], ["D3", "2"], ["U3", "2"], ["C3", "2"], ["C4", "2"], ["D4", "2"], ["U4", "2"], ["C5", "2"], ["C6", "2"], ["D5", "2"], ["U5", "1"], ["U5", "15"], ["U5", "2"], ["U5", "33"], ["U5", "55"], ["C7", "2"], ["C8", "2"], ["J2", "2"], ["J2", "3"], ["J2", "5"], ["R9", "2"], ["U6", "3"], ["SW2", "2"], ["SW3", "2"], ["J3", "2"], ["C9", "2"], ["C10", "2"], ["U7", "7"], ["U7", "9"], ["C11", "2"], ["C12", "2"], ["C14", "2"], ["R18", "2"], ["U8", "2"], ["C15", "2"], ["U9", "2"], ["U9", "3"], ["C16", "2"], ["U10", "2"], ["C17", "2"], ["U11", "2"], ["C18", "2"], ["U12", "2"], ["C19", "2"], ["U13", "2"], ["C20", "2"], ["U14", "19"], ["U14", "2"], ["U14", "3"], ["C21", "2"], ["C22", "2"], ["C23", "2"], ["C24", "2"], ["C25", "2"], ["U15", "2"], ["C26", "2"], ["U16", "2"], ["C27", "2"], ["U17", "2"], ["C28", "2"], ["U18", "2"], ["C29", "2"], ["U19", "2"], ["C30", "2"], ["C31", "2"]]}, {name: "vbat", pads: [["U1", "1"], ["R3", "1"], ["Q1", "2"]]}, {name: "v5v", pads: [["U2", "4"], ["C2", "1"], ["TP1", "1"], ["D3", "1"], ["U3", "1"], ["U3", "3"], ["C3", "1"], ["U4", "1"], ["U4", "3"], ["C5", "1"], ["U7", "1"], ["U7", "6"], ["C11", "1"], ["C12", "1"]]}, - {name: "v3v3", pads: [["U3", "5"], ["C4", "1"], ["TP2", "1"], ["D4", "1"], ["U5", "28"], ["U5", "30"], ["J2", "1"], ["C7", "1"], ["D6", "2"], ["J3", "7"], ["R13", "1"], ["C9", "1"], ["R24", "1"]]}, + {name: "v3v3", pads: [["U3", "5"], ["C4", "1"], ["TP2", "1"], ["D4", "1"], ["U5", "28"], ["U5", "30"], ["C7", "1"], ["J2", "1"], ["D6", "2"], ["J3", "7"], ["R13", "1"], ["C9", "1"], ["R24", "1"]]}, {name: "vanalog", pads: [["U4", "5"], ["C6", "1"], ["TP3", "1"], ["D5", "1"], ["R17", "1"], ["U8", "5"], ["U8", "6"], ["C15", "1"], ["U9", "5"], ["C16", "1"], ["U10", "5"], ["C17", "1"], ["U11", "5"], ["C18", "1"], ["U12", "5"], ["C19", "1"], ["U13", "5"], ["U13", "6"], ["C20", "1"], ["R23", "1"], ["U15", "5"], ["U15", "6"], ["C26", "1"], ["U16", "5"], ["C27", "1"], ["U17", "5"], ["C28", "1"], ["U18", "5"], ["C29", "1"], ["R25", "1"], ["R26", "1"], ["R27", "1"], ["R28", "1"], ["U19", "5"], ["C30", "1"]]}, {name: "vcenter", pads: [["U8", "1"], ["U8", "4"], ["U9", "1"]]}, {name: "spk_chain_0", pads: [["U5", "36"], ["R14", "1"]]}, diff --git a/examples/SwdDebugger/SwdDebugger.net.ref b/examples/SwdDebugger/SwdDebugger.net.ref index 16af96d7c..8b0eb1db1 100644 --- a/examples/SwdDebugger/SwdDebugger.net.ref +++ b/examples/SwdDebugger/SwdDebugger.net.ref @@ -156,18 +156,6 @@ (property (name "edg_value") (value "25V 4.7uF X5R ±10% 0805 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/target_reg/") (tstamps "/17010425/")) (tstamps "0be902ec")) -(comp (ref "SJ2") - (value "mcu.swd") - (footprint "Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD") - (property (name "Sheetname") (value "mcu")) - (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32f103.Stm32f103_48")) - (property (name "edg_path") (value "mcu.swd.conn")) - (property (name "edg_short_path") (value "mcu.swd")) - (property (name "edg_refdes") (value "SJ2")) - (property (name "edg_part") (value "PinHeader1.27 Shrouded 2x5 (Generic)")) - (property (name "edg_value") (value "PinHeader1.27 Shrouded 2x5")) - (sheetpath (names "/mcu/") (tstamps "/02850146/")) - (tstamps "02ae014f")) (comp (ref "SU3") (value "mcu.ic") (footprint "Package_QFP:LQFP-48_7x7mm_P0.5mm") @@ -276,6 +264,18 @@ (property (name "edg_value") (value "CSTNE8M00GH5L000R0")) (sheetpath (names "/mcu/") (tstamps "/02850146/")) (tstamps "0c1b0303")) +(comp (ref "SJ2") + (value "mcu.swd") + (footprint "Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD") + (property (name "Sheetname") (value "mcu")) + (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32f103.Stm32f103_48")) + (property (name "edg_path") (value "mcu.swd.conn")) + (property (name "edg_short_path") (value "mcu.swd")) + (property (name "edg_refdes") (value "SJ2")) + (property (name "edg_part") (value "PinHeader1.27 Shrouded 2x5 (Generic)")) + (property (name "edg_value") (value "PinHeader1.27 Shrouded 2x5")) + (sheetpath (names "/mcu/") (tstamps "/02850146/")) + (tstamps "02ae014f")) (comp (ref "SU5") (value "usb_esd") (footprint "Package_TO_SOT_SMD:SOT-23") @@ -519,9 +519,6 @@ (node (ref SU2) (pin 2)) (node (ref SC3) (pin 2)) (node (ref SC4) (pin 2)) - (node (ref SJ2) (pin 3)) - (node (ref SJ2) (pin 5)) - (node (ref SJ2) (pin 9)) (node (ref SU3) (pin 23)) (node (ref SU3) (pin 35)) (node (ref SU3) (pin 44)) @@ -534,6 +531,9 @@ (node (ref SC9) (pin 2)) (node (ref SC10) (pin 2)) (node (ref SU4) (pin 2)) + (node (ref SJ2) (pin 3)) + (node (ref SJ2) (pin 5)) + (node (ref SJ2) (pin 9)) (node (ref SU5) (pin 3)) (node (ref SR4) (pin 2)) (node (ref SR5) (pin 2)) @@ -546,7 +546,6 @@ (net (code 3) (name "Sv3v3") (node (ref SU1) (pin 5)) (node (ref SC2) (pin 1)) - (node (ref SJ2) (pin 1)) (node (ref SU3) (pin 1)) (node (ref SU3) (pin 24)) (node (ref SU3) (pin 36)) @@ -559,6 +558,7 @@ (node (ref SC9) (pin 1)) (node (ref SC10) (pin 1)) (node (ref SR3) (pin 1)) + (node (ref SJ2) (pin 1)) (node (ref SR6) (pin 1)) (node (ref SR12) (pin 1))) (net (code 4) (name "Svtarget") @@ -595,19 +595,19 @@ (node (ref SU3) (pin 6)) (node (ref SU4) (pin 3))) (net (code 12) (name "Smcu.swd_node.swdio") - (node (ref SJ2) (pin 2)) - (node (ref SU3) (pin 34))) + (node (ref SU3) (pin 34)) + (node (ref SJ2) (pin 2))) (net (code 13) (name "Smcu.swd_node.swclk") - (node (ref SJ2) (pin 4)) - (node (ref SU3) (pin 37))) + (node (ref SU3) (pin 37)) + (node (ref SJ2) (pin 4))) (net (code 14) (name "Smcu.reset_node") - (node (ref SJ2) (pin 10)) - (node (ref SU3) (pin 7))) + (node (ref SU3) (pin 7)) + (node (ref SJ2) (pin 10))) (net (code 15) (name "Smcu.swd.tdi") (node (ref SJ2) (pin 8))) (net (code 16) (name "Smcu.swd.swo") - (node (ref SJ2) (pin 6)) - (node (ref SU3) (pin 39))) + (node (ref SU3) (pin 39)) + (node (ref SJ2) (pin 6))) (net (code 17) (name "Sled_tgt.signal") (node (ref SU3) (pin 30)) (node (ref SD2) (pin 2))) diff --git a/examples/SwdDebugger/SwdDebugger.svgpcb.js b/examples/SwdDebugger/SwdDebugger.svgpcb.js index d461801f1..bf0f0bdb2 100644 --- a/examples/SwdDebugger/SwdDebugger.svgpcb.js +++ b/examples/SwdDebugger/SwdDebugger.svgpcb.js @@ -65,11 +65,6 @@ const SC4 = board.add(C_0805_2012Metric, { translate: pt(0.887, 0.961), rotate: 0, id: 'SC4' }) -// mcu.swd.conn -const SJ2 = board.add(PinHeader_2x05_P1_27mm_Vertical_SMD, { - translate: pt(0.614, 0.146), rotate: 0, - id: 'SJ2' -}) // mcu.ic const SU3 = board.add(LQFP_48_7x7mm_P0_5mm, { translate: pt(0.203, 0.203), rotate: 0, @@ -115,6 +110,11 @@ const SU4 = board.add(Resonator_SMD_Murata_CSTxExxV_3Pin_3_0x1_1mm, { translate: pt(0.079, 0.508), rotate: 0, id: 'SU4' }) +// mcu.swd.conn +const SJ2 = board.add(PinHeader_2x05_P1_27mm_Vertical_SMD, { + translate: pt(0.614, 0.146), rotate: 0, + id: 'SJ2' +}) // usb_esd const SU5 = board.add(SOT_23, { translate: pt(1.520, 1.225), rotate: 0, @@ -208,8 +208,8 @@ const SR15 = board.add(R_0402_1005Metric, { board.setNetlist([ {name: "Svusb", pads: [["SJ1", "A4"], ["SJ1", "A9"], ["SJ1", "B4"], ["SJ1", "B9"], ["SD1", "1"], ["SU1", "1"], ["SU1", "3"], ["SC1", "1"], ["SU2", "1"], ["SC3", "1"]]}, - {name: "Sgnd", pads: [["SJ1", "A1"], ["SJ1", "A12"], ["SJ1", "B1"], ["SJ1", "B12"], ["SJ1", "S1"], ["SR1", "1"], ["SR2", "1"], ["SD1", "2"], ["SU1", "2"], ["SC1", "2"], ["SC2", "2"], ["SU2", "2"], ["SC3", "2"], ["SC4", "2"], ["SJ2", "3"], ["SJ2", "5"], ["SJ2", "9"], ["SU3", "23"], ["SU3", "35"], ["SU3", "44"], ["SU3", "47"], ["SU3", "8"], ["SC5", "2"], ["SC6", "2"], ["SC7", "2"], ["SC8", "2"], ["SC9", "2"], ["SC10", "2"], ["SU4", "2"], ["SU5", "3"], ["SR4", "2"], ["SR5", "2"], ["SSW1", "2"], ["SJ3", "3"], ["SJ3", "5"], ["SJ3", "9"], ["SR13", "2"], ["SR15", "2"]]}, - {name: "Sv3v3", pads: [["SU1", "5"], ["SC2", "1"], ["SJ2", "1"], ["SU3", "1"], ["SU3", "24"], ["SU3", "36"], ["SU3", "48"], ["SU3", "9"], ["SC5", "1"], ["SC6", "1"], ["SC7", "1"], ["SC8", "1"], ["SC9", "1"], ["SC10", "1"], ["SR3", "1"], ["SR6", "1"], ["SR12", "1"]]}, + {name: "Sgnd", pads: [["SJ1", "A1"], ["SJ1", "A12"], ["SJ1", "B1"], ["SJ1", "B12"], ["SJ1", "S1"], ["SR1", "1"], ["SR2", "1"], ["SD1", "2"], ["SU1", "2"], ["SC1", "2"], ["SC2", "2"], ["SU2", "2"], ["SC3", "2"], ["SC4", "2"], ["SU3", "23"], ["SU3", "35"], ["SU3", "44"], ["SU3", "47"], ["SU3", "8"], ["SC5", "2"], ["SC6", "2"], ["SC7", "2"], ["SC8", "2"], ["SC9", "2"], ["SC10", "2"], ["SU4", "2"], ["SJ2", "3"], ["SJ2", "5"], ["SJ2", "9"], ["SU5", "3"], ["SR4", "2"], ["SR5", "2"], ["SSW1", "2"], ["SJ3", "3"], ["SJ3", "5"], ["SJ3", "9"], ["SR13", "2"], ["SR15", "2"]]}, + {name: "Sv3v3", pads: [["SU1", "5"], ["SC2", "1"], ["SU3", "1"], ["SU3", "24"], ["SU3", "36"], ["SU3", "48"], ["SU3", "9"], ["SC5", "1"], ["SC6", "1"], ["SC7", "1"], ["SC8", "1"], ["SC9", "1"], ["SC10", "1"], ["SR3", "1"], ["SJ2", "1"], ["SR6", "1"], ["SR12", "1"]]}, {name: "Svtarget", pads: [["SU2", "5"], ["SC4", "1"], ["SJ3", "1"], ["SD4", "2"], ["SR14", "1"]]}, {name: "Susb_chain_0.d_P", pads: [["SJ1", "A6"], ["SJ1", "B6"], ["SU3", "33"], ["SR3", "2"], ["SU5", "2"]]}, {name: "Susb_chain_0.d_N", pads: [["SJ1", "A7"], ["SJ1", "B7"], ["SU3", "32"], ["SU5", "1"]]}, @@ -218,11 +218,11 @@ board.setNetlist([ {name: "Starget_reg.reset", pads: [["SU2", "3"], ["SU3", "28"], ["SR6", "2"]]}, {name: "Smcu.xtal_node.xi", pads: [["SU3", "5"], ["SU4", "1"]]}, {name: "Smcu.xtal_node.xo", pads: [["SU3", "6"], ["SU4", "3"]]}, - {name: "Smcu.swd_node.swdio", pads: [["SJ2", "2"], ["SU3", "34"]]}, - {name: "Smcu.swd_node.swclk", pads: [["SJ2", "4"], ["SU3", "37"]]}, - {name: "Smcu.reset_node", pads: [["SJ2", "10"], ["SU3", "7"]]}, + {name: "Smcu.swd_node.swdio", pads: [["SU3", "34"], ["SJ2", "2"]]}, + {name: "Smcu.swd_node.swclk", pads: [["SU3", "37"], ["SJ2", "4"]]}, + {name: "Smcu.reset_node", pads: [["SU3", "7"], ["SJ2", "10"]]}, {name: "Smcu.swd.tdi", pads: [["SJ2", "8"]]}, - {name: "Smcu.swd.swo", pads: [["SJ2", "6"], ["SU3", "39"]]}, + {name: "Smcu.swd.swo", pads: [["SU3", "39"], ["SJ2", "6"]]}, {name: "Sled_tgt.signal", pads: [["SU3", "30"], ["SD2", "2"]]}, {name: "Sled_tgt.package.k", pads: [["SD2", "1"], ["SR4", "1"]]}, {name: "Sled_usb.signal", pads: [["SU3", "42"], ["SD3", "2"]]}, diff --git a/examples/TestBlinkyChain/TestBlinkyChain.net.ref b/examples/TestBlinkyChain/TestBlinkyChain.net.ref index 4bb9ecab6..c3dde1847 100644 --- a/examples/TestBlinkyChain/TestBlinkyChain.net.ref +++ b/examples/TestBlinkyChain/TestBlinkyChain.net.ref @@ -132,18 +132,6 @@ (property (name "edg_value") (value "25V 4.7uF X5R ±10% 0805 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/reg/power_path/") (tstamps "/028a013f/1786043a/")) (tstamps "0be902ec")) -(comp (ref "J2") - (value "mcu.swd") - (footprint "Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD") - (property (name "Sheetname") (value "mcu")) - (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32f103.Stm32f103_48")) - (property (name "edg_path") (value "mcu.swd.conn")) - (property (name "edg_short_path") (value "mcu.swd")) - (property (name "edg_refdes") (value "J2")) - (property (name "edg_part") (value "PinHeader1.27 Shrouded 2x5 (Generic)")) - (property (name "edg_value") (value "PinHeader1.27 Shrouded 2x5")) - (sheetpath (names "/mcu/") (tstamps "/02850146/")) - (tstamps "02ae014f")) (comp (ref "U2") (value "mcu.ic") (footprint "Package_QFP:LQFP-48_7x7mm_P0.5mm") @@ -228,6 +216,18 @@ (property (name "edg_value") (value "50V 1uF X5R ±10% 0603 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/mcu/") (tstamps "/02850146/")) (tstamps "15dd03c3")) +(comp (ref "J2") + (value "mcu.swd") + (footprint "Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD") + (property (name "Sheetname") (value "mcu")) + (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32f103.Stm32f103_48")) + (property (name "edg_path") (value "mcu.swd.conn")) + (property (name "edg_short_path") (value "mcu.swd")) + (property (name "edg_refdes") (value "J2")) + (property (name "edg_part") (value "PinHeader1.27 Shrouded 2x5 (Generic)")) + (property (name "edg_value") (value "PinHeader1.27 Shrouded 2x5")) + (sheetpath (names "/mcu/") (tstamps "/02850146/")) + (tstamps "02ae014f")) (comp (ref "SW1") (value "sw") (footprint "Button_Switch_SMD:SW_SPST_SKQG_WithoutStem") @@ -359,9 +359,6 @@ (node (ref C1) (pin 2)) (node (ref C3) (pin 2)) (node (ref C4) (pin 2)) - (node (ref J2) (pin 3)) - (node (ref J2) (pin 5)) - (node (ref J2) (pin 9)) (node (ref U2) (pin 23)) (node (ref U2) (pin 35)) (node (ref U2) (pin 44)) @@ -373,6 +370,9 @@ (node (ref C8) (pin 2)) (node (ref C9) (pin 2)) (node (ref C10) (pin 2)) + (node (ref J2) (pin 3)) + (node (ref J2) (pin 5)) + (node (ref J2) (pin 9)) (node (ref SW1) (pin 2)) (node (ref R5) (pin 2)) (node (ref R6) (pin 2)) @@ -394,7 +394,6 @@ (node (ref R3) (pin 1)) (node (ref L1) (pin 2)) (node (ref C4) (pin 1)) - (node (ref J2) (pin 1)) (node (ref U2) (pin 1)) (node (ref U2) (pin 24)) (node (ref U2) (pin 36)) @@ -405,7 +404,8 @@ (node (ref C7) (pin 1)) (node (ref C8) (pin 1)) (node (ref C9) (pin 1)) - (node (ref C10) (pin 1))) + (node (ref C10) (pin 1)) + (node (ref J2) (pin 1))) (net (code 8) (name "reg.ic.sw") (node (ref U1) (pin 2)) (node (ref C2) (pin 2)) @@ -418,22 +418,22 @@ (node (ref U1) (pin 6)) (node (ref C2) (pin 1))) (net (code 11) (name "mcu.swd_node.swdio") - (node (ref J2) (pin 2)) - (node (ref U2) (pin 34))) + (node (ref U2) (pin 34)) + (node (ref J2) (pin 2))) (net (code 12) (name "mcu.swd_node.swclk") - (node (ref J2) (pin 4)) - (node (ref U2) (pin 37))) + (node (ref U2) (pin 37)) + (node (ref J2) (pin 4))) (net (code 13) (name "mcu.reset_node") - (node (ref J2) (pin 10)) - (node (ref U2) (pin 7))) -(net (code 14) (name "mcu.swd.tdi") - (node (ref J2) (pin 8))) -(net (code 15) (name "mcu.swd.swo") - (node (ref J2) (pin 6))) -(net (code 16) (name "mcu.ic.osc.xtal_in") + (node (ref U2) (pin 7)) + (node (ref J2) (pin 10))) +(net (code 14) (name "mcu.ic.osc.xtal_in") (node (ref U2) (pin 5))) -(net (code 17) (name "mcu.ic.osc.xtal_out") +(net (code 15) (name "mcu.ic.osc.xtal_out") (node (ref U2) (pin 6))) +(net (code 16) (name "mcu.swd.tdi") + (node (ref J2) (pin 8))) +(net (code 17) (name "mcu.swd.swo") + (node (ref J2) (pin 6))) (net (code 18) (name "sw.out") (node (ref U2) (pin 10)) (node (ref SW1) (pin 1))) diff --git a/examples/TestBlinkyChain/TestBlinkyChain.svgpcb.js b/examples/TestBlinkyChain/TestBlinkyChain.svgpcb.js index 701596cb7..924430fe3 100644 --- a/examples/TestBlinkyChain/TestBlinkyChain.svgpcb.js +++ b/examples/TestBlinkyChain/TestBlinkyChain.svgpcb.js @@ -55,11 +55,6 @@ const C4 = board.add(C_0805_2012Metric, { translate: pt(0.268, 0.776), rotate: 0, id: 'C4' }) -// mcu.swd.conn -const J2 = board.add(PinHeader_2x05_P1_27mm_Vertical_SMD, { - translate: pt(0.614, 0.146), rotate: 0, - id: 'J2' -}) // mcu.ic const U2 = board.add(LQFP_48_7x7mm_P0_5mm, { translate: pt(0.203, 0.203), rotate: 0, @@ -95,6 +90,11 @@ const C10 = board.add(C_0603_1608Metric, { translate: pt(0.058, 0.590), rotate: 0, id: 'C10' }) +// mcu.swd.conn +const J2 = board.add(PinHeader_2x05_P1_27mm_Vertical_SMD, { + translate: pt(0.614, 0.146), rotate: 0, + id: 'J2' +}) // sw.package const SW1 = board.add(SW_SPST_SKQG_WithoutStem, { translate: pt(0.714, 0.849), rotate: 0, @@ -143,22 +143,22 @@ const R8 = board.add(R_0603_1608Metric, { board.setNetlist([ {name: "usb.pwr", pads: [["J1", "A4"], ["J1", "A9"], ["J1", "B4"], ["J1", "B9"], ["U1", "3"], ["U1", "5"], ["C1", "1"], ["C3", "1"]]}, - {name: "usb.gnd", pads: [["J1", "A1"], ["J1", "A12"], ["J1", "B1"], ["J1", "B12"], ["J1", "S1"], ["R1", "1"], ["R2", "1"], ["U1", "1"], ["R4", "2"], ["C1", "2"], ["C3", "2"], ["C4", "2"], ["J2", "3"], ["J2", "5"], ["J2", "9"], ["U2", "23"], ["U2", "35"], ["U2", "44"], ["U2", "47"], ["U2", "8"], ["C5", "2"], ["C6", "2"], ["C7", "2"], ["C8", "2"], ["C9", "2"], ["C10", "2"], ["SW1", "2"], ["R5", "2"], ["R6", "2"], ["R7", "2"], ["R8", "2"]]}, + {name: "usb.gnd", pads: [["J1", "A1"], ["J1", "A12"], ["J1", "B1"], ["J1", "B12"], ["J1", "S1"], ["R1", "1"], ["R2", "1"], ["U1", "1"], ["R4", "2"], ["C1", "2"], ["C3", "2"], ["C4", "2"], ["U2", "23"], ["U2", "35"], ["U2", "44"], ["U2", "47"], ["U2", "8"], ["C5", "2"], ["C6", "2"], ["C7", "2"], ["C8", "2"], ["C9", "2"], ["C10", "2"], ["J2", "3"], ["J2", "5"], ["J2", "9"], ["SW1", "2"], ["R5", "2"], ["R6", "2"], ["R7", "2"], ["R8", "2"]]}, {name: "usb.usb.dp", pads: [["J1", "A6"], ["J1", "B6"]]}, {name: "usb.usb.dm", pads: [["J1", "A7"], ["J1", "B7"]]}, {name: "usb.conn.cc.cc1", pads: [["J1", "A5"], ["R1", "2"]]}, {name: "usb.conn.cc.cc2", pads: [["J1", "B5"], ["R2", "2"]]}, - {name: "reg.pwr_out", pads: [["R3", "1"], ["L1", "2"], ["C4", "1"], ["J2", "1"], ["U2", "1"], ["U2", "24"], ["U2", "36"], ["U2", "48"], ["U2", "9"], ["C5", "1"], ["C6", "1"], ["C7", "1"], ["C8", "1"], ["C9", "1"], ["C10", "1"]]}, + {name: "reg.pwr_out", pads: [["R3", "1"], ["L1", "2"], ["C4", "1"], ["U2", "1"], ["U2", "24"], ["U2", "36"], ["U2", "48"], ["U2", "9"], ["C5", "1"], ["C6", "1"], ["C7", "1"], ["C8", "1"], ["C9", "1"], ["C10", "1"], ["J2", "1"]]}, {name: "reg.ic.sw", pads: [["U1", "2"], ["C2", "2"], ["L1", "1"]]}, {name: "reg.ic.fb", pads: [["U1", "4"], ["R3", "2"], ["R4", "1"]]}, {name: "reg.ic.vbst", pads: [["U1", "6"], ["C2", "1"]]}, - {name: "mcu.swd_node.swdio", pads: [["J2", "2"], ["U2", "34"]]}, - {name: "mcu.swd_node.swclk", pads: [["J2", "4"], ["U2", "37"]]}, - {name: "mcu.reset_node", pads: [["J2", "10"], ["U2", "7"]]}, - {name: "mcu.swd.tdi", pads: [["J2", "8"]]}, - {name: "mcu.swd.swo", pads: [["J2", "6"]]}, + {name: "mcu.swd_node.swdio", pads: [["U2", "34"], ["J2", "2"]]}, + {name: "mcu.swd_node.swclk", pads: [["U2", "37"], ["J2", "4"]]}, + {name: "mcu.reset_node", pads: [["U2", "7"], ["J2", "10"]]}, {name: "mcu.ic.osc.xtal_in", pads: [["U2", "5"]]}, {name: "mcu.ic.osc.xtal_out", pads: [["U2", "6"]]}, + {name: "mcu.swd.tdi", pads: [["J2", "8"]]}, + {name: "mcu.swd.swo", pads: [["J2", "6"]]}, {name: "sw.out", pads: [["U2", "10"], ["SW1", "1"]]}, {name: "led[0].signal", pads: [["U2", "11"], ["D1", "2"]]}, {name: "led[0].package.k", pads: [["D1", "1"], ["R5", "1"]]}, diff --git a/examples/TestBlinkyComplete/TestBlinkyComplete.net.ref b/examples/TestBlinkyComplete/TestBlinkyComplete.net.ref index aa8091a27..5ef84d2b1 100644 --- a/examples/TestBlinkyComplete/TestBlinkyComplete.net.ref +++ b/examples/TestBlinkyComplete/TestBlinkyComplete.net.ref @@ -132,18 +132,6 @@ (property (name "edg_value") (value "25V 4.7uF X5R ±10% 0805 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/reg/power_path/") (tstamps "/028a013f/1786043a/")) (tstamps "0be902ec")) -(comp (ref "J2") - (value "mcu.swd") - (footprint "Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD") - (property (name "Sheetname") (value "mcu")) - (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32f103.Stm32f103_48")) - (property (name "edg_path") (value "mcu.swd.conn")) - (property (name "edg_short_path") (value "mcu.swd")) - (property (name "edg_refdes") (value "J2")) - (property (name "edg_part") (value "PinHeader1.27 Shrouded 2x5 (Generic)")) - (property (name "edg_value") (value "PinHeader1.27 Shrouded 2x5")) - (sheetpath (names "/mcu/") (tstamps "/02850146/")) - (tstamps "02ae014f")) (comp (ref "U2") (value "mcu.ic") (footprint "Package_QFP:LQFP-48_7x7mm_P0.5mm") @@ -228,6 +216,18 @@ (property (name "edg_value") (value "50V 1uF X5R ±10% 0603 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/mcu/") (tstamps "/02850146/")) (tstamps "15dd03c3")) +(comp (ref "J2") + (value "mcu.swd") + (footprint "Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD") + (property (name "Sheetname") (value "mcu")) + (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32f103.Stm32f103_48")) + (property (name "edg_path") (value "mcu.swd.conn")) + (property (name "edg_short_path") (value "mcu.swd")) + (property (name "edg_refdes") (value "J2")) + (property (name "edg_part") (value "PinHeader1.27 Shrouded 2x5 (Generic)")) + (property (name "edg_value") (value "PinHeader1.27 Shrouded 2x5")) + (sheetpath (names "/mcu/") (tstamps "/02850146/")) + (tstamps "02ae014f")) (comp (ref "D1") (value "led.package") (footprint "LED_SMD:LED_0603_1608Metric") @@ -275,9 +275,6 @@ (node (ref C1) (pin 2)) (node (ref C3) (pin 2)) (node (ref C4) (pin 2)) - (node (ref J2) (pin 3)) - (node (ref J2) (pin 5)) - (node (ref J2) (pin 9)) (node (ref U2) (pin 23)) (node (ref U2) (pin 35)) (node (ref U2) (pin 44)) @@ -289,6 +286,9 @@ (node (ref C8) (pin 2)) (node (ref C9) (pin 2)) (node (ref C10) (pin 2)) + (node (ref J2) (pin 3)) + (node (ref J2) (pin 5)) + (node (ref J2) (pin 9)) (node (ref R5) (pin 2))) (net (code 3) (name "usb.usb.dp") (node (ref J1) (pin A6)) @@ -306,7 +306,6 @@ (node (ref R3) (pin 1)) (node (ref L1) (pin 2)) (node (ref C4) (pin 1)) - (node (ref J2) (pin 1)) (node (ref U2) (pin 1)) (node (ref U2) (pin 24)) (node (ref U2) (pin 36)) @@ -317,7 +316,8 @@ (node (ref C7) (pin 1)) (node (ref C8) (pin 1)) (node (ref C9) (pin 1)) - (node (ref C10) (pin 1))) + (node (ref C10) (pin 1)) + (node (ref J2) (pin 1))) (net (code 8) (name "reg.ic.sw") (node (ref U1) (pin 2)) (node (ref C2) (pin 2)) @@ -330,22 +330,22 @@ (node (ref U1) (pin 6)) (node (ref C2) (pin 1))) (net (code 11) (name "mcu.swd_node.swdio") - (node (ref J2) (pin 2)) - (node (ref U2) (pin 34))) + (node (ref U2) (pin 34)) + (node (ref J2) (pin 2))) (net (code 12) (name "mcu.swd_node.swclk") - (node (ref J2) (pin 4)) - (node (ref U2) (pin 37))) + (node (ref U2) (pin 37)) + (node (ref J2) (pin 4))) (net (code 13) (name "mcu.reset_node") - (node (ref J2) (pin 10)) - (node (ref U2) (pin 7))) -(net (code 14) (name "mcu.swd.tdi") - (node (ref J2) (pin 8))) -(net (code 15) (name "mcu.swd.swo") - (node (ref J2) (pin 6))) -(net (code 16) (name "mcu.ic.osc.xtal_in") + (node (ref U2) (pin 7)) + (node (ref J2) (pin 10))) +(net (code 14) (name "mcu.ic.osc.xtal_in") (node (ref U2) (pin 5))) -(net (code 17) (name "mcu.ic.osc.xtal_out") +(net (code 15) (name "mcu.ic.osc.xtal_out") (node (ref U2) (pin 6))) +(net (code 16) (name "mcu.swd.tdi") + (node (ref J2) (pin 8))) +(net (code 17) (name "mcu.swd.swo") + (node (ref J2) (pin 6))) (net (code 18) (name "led.signal") (node (ref U2) (pin 10)) (node (ref D1) (pin 2))) diff --git a/examples/TestBlinkyComplete/TestBlinkyComplete.svgpcb.js b/examples/TestBlinkyComplete/TestBlinkyComplete.svgpcb.js index 4c185fc8d..eddb56aeb 100644 --- a/examples/TestBlinkyComplete/TestBlinkyComplete.svgpcb.js +++ b/examples/TestBlinkyComplete/TestBlinkyComplete.svgpcb.js @@ -55,11 +55,6 @@ const C4 = board.add(C_0805_2012Metric, { translate: pt(0.268, 0.776), rotate: 0, id: 'C4' }) -// mcu.swd.conn -const J2 = board.add(PinHeader_2x05_P1_27mm_Vertical_SMD, { - translate: pt(0.614, 0.146), rotate: 0, - id: 'J2' -}) // mcu.ic const U2 = board.add(LQFP_48_7x7mm_P0_5mm, { translate: pt(0.203, 0.203), rotate: 0, @@ -95,6 +90,11 @@ const C10 = board.add(C_0603_1608Metric, { translate: pt(0.058, 0.590), rotate: 0, id: 'C10' }) +// mcu.swd.conn +const J2 = board.add(PinHeader_2x05_P1_27mm_Vertical_SMD, { + translate: pt(0.614, 0.146), rotate: 0, + id: 'J2' +}) // led.package const D1 = board.add(LED_0603_1608Metric, { translate: pt(0.605, 0.766), rotate: 0, @@ -108,22 +108,22 @@ const R5 = board.add(R_0603_1608Metric, { board.setNetlist([ {name: "usb.pwr", pads: [["J1", "A4"], ["J1", "A9"], ["J1", "B4"], ["J1", "B9"], ["U1", "3"], ["U1", "5"], ["C1", "1"], ["C3", "1"]]}, - {name: "usb.gnd", pads: [["J1", "A1"], ["J1", "A12"], ["J1", "B1"], ["J1", "B12"], ["J1", "S1"], ["R1", "1"], ["R2", "1"], ["U1", "1"], ["R4", "2"], ["C1", "2"], ["C3", "2"], ["C4", "2"], ["J2", "3"], ["J2", "5"], ["J2", "9"], ["U2", "23"], ["U2", "35"], ["U2", "44"], ["U2", "47"], ["U2", "8"], ["C5", "2"], ["C6", "2"], ["C7", "2"], ["C8", "2"], ["C9", "2"], ["C10", "2"], ["R5", "2"]]}, + {name: "usb.gnd", pads: [["J1", "A1"], ["J1", "A12"], ["J1", "B1"], ["J1", "B12"], ["J1", "S1"], ["R1", "1"], ["R2", "1"], ["U1", "1"], ["R4", "2"], ["C1", "2"], ["C3", "2"], ["C4", "2"], ["U2", "23"], ["U2", "35"], ["U2", "44"], ["U2", "47"], ["U2", "8"], ["C5", "2"], ["C6", "2"], ["C7", "2"], ["C8", "2"], ["C9", "2"], ["C10", "2"], ["J2", "3"], ["J2", "5"], ["J2", "9"], ["R5", "2"]]}, {name: "usb.usb.dp", pads: [["J1", "A6"], ["J1", "B6"]]}, {name: "usb.usb.dm", pads: [["J1", "A7"], ["J1", "B7"]]}, {name: "usb.conn.cc.cc1", pads: [["J1", "A5"], ["R1", "2"]]}, {name: "usb.conn.cc.cc2", pads: [["J1", "B5"], ["R2", "2"]]}, - {name: "reg.pwr_out", pads: [["R3", "1"], ["L1", "2"], ["C4", "1"], ["J2", "1"], ["U2", "1"], ["U2", "24"], ["U2", "36"], ["U2", "48"], ["U2", "9"], ["C5", "1"], ["C6", "1"], ["C7", "1"], ["C8", "1"], ["C9", "1"], ["C10", "1"]]}, + {name: "reg.pwr_out", pads: [["R3", "1"], ["L1", "2"], ["C4", "1"], ["U2", "1"], ["U2", "24"], ["U2", "36"], ["U2", "48"], ["U2", "9"], ["C5", "1"], ["C6", "1"], ["C7", "1"], ["C8", "1"], ["C9", "1"], ["C10", "1"], ["J2", "1"]]}, {name: "reg.ic.sw", pads: [["U1", "2"], ["C2", "2"], ["L1", "1"]]}, {name: "reg.ic.fb", pads: [["U1", "4"], ["R3", "2"], ["R4", "1"]]}, {name: "reg.ic.vbst", pads: [["U1", "6"], ["C2", "1"]]}, - {name: "mcu.swd_node.swdio", pads: [["J2", "2"], ["U2", "34"]]}, - {name: "mcu.swd_node.swclk", pads: [["J2", "4"], ["U2", "37"]]}, - {name: "mcu.reset_node", pads: [["J2", "10"], ["U2", "7"]]}, - {name: "mcu.swd.tdi", pads: [["J2", "8"]]}, - {name: "mcu.swd.swo", pads: [["J2", "6"]]}, + {name: "mcu.swd_node.swdio", pads: [["U2", "34"], ["J2", "2"]]}, + {name: "mcu.swd_node.swclk", pads: [["U2", "37"], ["J2", "4"]]}, + {name: "mcu.reset_node", pads: [["U2", "7"], ["J2", "10"]]}, {name: "mcu.ic.osc.xtal_in", pads: [["U2", "5"]]}, {name: "mcu.ic.osc.xtal_out", pads: [["U2", "6"]]}, + {name: "mcu.swd.tdi", pads: [["J2", "8"]]}, + {name: "mcu.swd.swo", pads: [["J2", "6"]]}, {name: "led.signal", pads: [["U2", "10"], ["D1", "2"]]}, {name: "led.package.k", pads: [["D1", "1"], ["R5", "1"]]} ]) diff --git a/examples/TestBlinkyExpanded/TestBlinkyExpanded.net.ref b/examples/TestBlinkyExpanded/TestBlinkyExpanded.net.ref index 4bb9ecab6..c3dde1847 100644 --- a/examples/TestBlinkyExpanded/TestBlinkyExpanded.net.ref +++ b/examples/TestBlinkyExpanded/TestBlinkyExpanded.net.ref @@ -132,18 +132,6 @@ (property (name "edg_value") (value "25V 4.7uF X5R ±10% 0805 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/reg/power_path/") (tstamps "/028a013f/1786043a/")) (tstamps "0be902ec")) -(comp (ref "J2") - (value "mcu.swd") - (footprint "Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD") - (property (name "Sheetname") (value "mcu")) - (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32f103.Stm32f103_48")) - (property (name "edg_path") (value "mcu.swd.conn")) - (property (name "edg_short_path") (value "mcu.swd")) - (property (name "edg_refdes") (value "J2")) - (property (name "edg_part") (value "PinHeader1.27 Shrouded 2x5 (Generic)")) - (property (name "edg_value") (value "PinHeader1.27 Shrouded 2x5")) - (sheetpath (names "/mcu/") (tstamps "/02850146/")) - (tstamps "02ae014f")) (comp (ref "U2") (value "mcu.ic") (footprint "Package_QFP:LQFP-48_7x7mm_P0.5mm") @@ -228,6 +216,18 @@ (property (name "edg_value") (value "50V 1uF X5R ±10% 0603 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/mcu/") (tstamps "/02850146/")) (tstamps "15dd03c3")) +(comp (ref "J2") + (value "mcu.swd") + (footprint "Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD") + (property (name "Sheetname") (value "mcu")) + (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32f103.Stm32f103_48")) + (property (name "edg_path") (value "mcu.swd.conn")) + (property (name "edg_short_path") (value "mcu.swd")) + (property (name "edg_refdes") (value "J2")) + (property (name "edg_part") (value "PinHeader1.27 Shrouded 2x5 (Generic)")) + (property (name "edg_value") (value "PinHeader1.27 Shrouded 2x5")) + (sheetpath (names "/mcu/") (tstamps "/02850146/")) + (tstamps "02ae014f")) (comp (ref "SW1") (value "sw") (footprint "Button_Switch_SMD:SW_SPST_SKQG_WithoutStem") @@ -359,9 +359,6 @@ (node (ref C1) (pin 2)) (node (ref C3) (pin 2)) (node (ref C4) (pin 2)) - (node (ref J2) (pin 3)) - (node (ref J2) (pin 5)) - (node (ref J2) (pin 9)) (node (ref U2) (pin 23)) (node (ref U2) (pin 35)) (node (ref U2) (pin 44)) @@ -373,6 +370,9 @@ (node (ref C8) (pin 2)) (node (ref C9) (pin 2)) (node (ref C10) (pin 2)) + (node (ref J2) (pin 3)) + (node (ref J2) (pin 5)) + (node (ref J2) (pin 9)) (node (ref SW1) (pin 2)) (node (ref R5) (pin 2)) (node (ref R6) (pin 2)) @@ -394,7 +394,6 @@ (node (ref R3) (pin 1)) (node (ref L1) (pin 2)) (node (ref C4) (pin 1)) - (node (ref J2) (pin 1)) (node (ref U2) (pin 1)) (node (ref U2) (pin 24)) (node (ref U2) (pin 36)) @@ -405,7 +404,8 @@ (node (ref C7) (pin 1)) (node (ref C8) (pin 1)) (node (ref C9) (pin 1)) - (node (ref C10) (pin 1))) + (node (ref C10) (pin 1)) + (node (ref J2) (pin 1))) (net (code 8) (name "reg.ic.sw") (node (ref U1) (pin 2)) (node (ref C2) (pin 2)) @@ -418,22 +418,22 @@ (node (ref U1) (pin 6)) (node (ref C2) (pin 1))) (net (code 11) (name "mcu.swd_node.swdio") - (node (ref J2) (pin 2)) - (node (ref U2) (pin 34))) + (node (ref U2) (pin 34)) + (node (ref J2) (pin 2))) (net (code 12) (name "mcu.swd_node.swclk") - (node (ref J2) (pin 4)) - (node (ref U2) (pin 37))) + (node (ref U2) (pin 37)) + (node (ref J2) (pin 4))) (net (code 13) (name "mcu.reset_node") - (node (ref J2) (pin 10)) - (node (ref U2) (pin 7))) -(net (code 14) (name "mcu.swd.tdi") - (node (ref J2) (pin 8))) -(net (code 15) (name "mcu.swd.swo") - (node (ref J2) (pin 6))) -(net (code 16) (name "mcu.ic.osc.xtal_in") + (node (ref U2) (pin 7)) + (node (ref J2) (pin 10))) +(net (code 14) (name "mcu.ic.osc.xtal_in") (node (ref U2) (pin 5))) -(net (code 17) (name "mcu.ic.osc.xtal_out") +(net (code 15) (name "mcu.ic.osc.xtal_out") (node (ref U2) (pin 6))) +(net (code 16) (name "mcu.swd.tdi") + (node (ref J2) (pin 8))) +(net (code 17) (name "mcu.swd.swo") + (node (ref J2) (pin 6))) (net (code 18) (name "sw.out") (node (ref U2) (pin 10)) (node (ref SW1) (pin 1))) diff --git a/examples/TestBlinkyExpanded/TestBlinkyExpanded.svgpcb.js b/examples/TestBlinkyExpanded/TestBlinkyExpanded.svgpcb.js index 701596cb7..924430fe3 100644 --- a/examples/TestBlinkyExpanded/TestBlinkyExpanded.svgpcb.js +++ b/examples/TestBlinkyExpanded/TestBlinkyExpanded.svgpcb.js @@ -55,11 +55,6 @@ const C4 = board.add(C_0805_2012Metric, { translate: pt(0.268, 0.776), rotate: 0, id: 'C4' }) -// mcu.swd.conn -const J2 = board.add(PinHeader_2x05_P1_27mm_Vertical_SMD, { - translate: pt(0.614, 0.146), rotate: 0, - id: 'J2' -}) // mcu.ic const U2 = board.add(LQFP_48_7x7mm_P0_5mm, { translate: pt(0.203, 0.203), rotate: 0, @@ -95,6 +90,11 @@ const C10 = board.add(C_0603_1608Metric, { translate: pt(0.058, 0.590), rotate: 0, id: 'C10' }) +// mcu.swd.conn +const J2 = board.add(PinHeader_2x05_P1_27mm_Vertical_SMD, { + translate: pt(0.614, 0.146), rotate: 0, + id: 'J2' +}) // sw.package const SW1 = board.add(SW_SPST_SKQG_WithoutStem, { translate: pt(0.714, 0.849), rotate: 0, @@ -143,22 +143,22 @@ const R8 = board.add(R_0603_1608Metric, { board.setNetlist([ {name: "usb.pwr", pads: [["J1", "A4"], ["J1", "A9"], ["J1", "B4"], ["J1", "B9"], ["U1", "3"], ["U1", "5"], ["C1", "1"], ["C3", "1"]]}, - {name: "usb.gnd", pads: [["J1", "A1"], ["J1", "A12"], ["J1", "B1"], ["J1", "B12"], ["J1", "S1"], ["R1", "1"], ["R2", "1"], ["U1", "1"], ["R4", "2"], ["C1", "2"], ["C3", "2"], ["C4", "2"], ["J2", "3"], ["J2", "5"], ["J2", "9"], ["U2", "23"], ["U2", "35"], ["U2", "44"], ["U2", "47"], ["U2", "8"], ["C5", "2"], ["C6", "2"], ["C7", "2"], ["C8", "2"], ["C9", "2"], ["C10", "2"], ["SW1", "2"], ["R5", "2"], ["R6", "2"], ["R7", "2"], ["R8", "2"]]}, + {name: "usb.gnd", pads: [["J1", "A1"], ["J1", "A12"], ["J1", "B1"], ["J1", "B12"], ["J1", "S1"], ["R1", "1"], ["R2", "1"], ["U1", "1"], ["R4", "2"], ["C1", "2"], ["C3", "2"], ["C4", "2"], ["U2", "23"], ["U2", "35"], ["U2", "44"], ["U2", "47"], ["U2", "8"], ["C5", "2"], ["C6", "2"], ["C7", "2"], ["C8", "2"], ["C9", "2"], ["C10", "2"], ["J2", "3"], ["J2", "5"], ["J2", "9"], ["SW1", "2"], ["R5", "2"], ["R6", "2"], ["R7", "2"], ["R8", "2"]]}, {name: "usb.usb.dp", pads: [["J1", "A6"], ["J1", "B6"]]}, {name: "usb.usb.dm", pads: [["J1", "A7"], ["J1", "B7"]]}, {name: "usb.conn.cc.cc1", pads: [["J1", "A5"], ["R1", "2"]]}, {name: "usb.conn.cc.cc2", pads: [["J1", "B5"], ["R2", "2"]]}, - {name: "reg.pwr_out", pads: [["R3", "1"], ["L1", "2"], ["C4", "1"], ["J2", "1"], ["U2", "1"], ["U2", "24"], ["U2", "36"], ["U2", "48"], ["U2", "9"], ["C5", "1"], ["C6", "1"], ["C7", "1"], ["C8", "1"], ["C9", "1"], ["C10", "1"]]}, + {name: "reg.pwr_out", pads: [["R3", "1"], ["L1", "2"], ["C4", "1"], ["U2", "1"], ["U2", "24"], ["U2", "36"], ["U2", "48"], ["U2", "9"], ["C5", "1"], ["C6", "1"], ["C7", "1"], ["C8", "1"], ["C9", "1"], ["C10", "1"], ["J2", "1"]]}, {name: "reg.ic.sw", pads: [["U1", "2"], ["C2", "2"], ["L1", "1"]]}, {name: "reg.ic.fb", pads: [["U1", "4"], ["R3", "2"], ["R4", "1"]]}, {name: "reg.ic.vbst", pads: [["U1", "6"], ["C2", "1"]]}, - {name: "mcu.swd_node.swdio", pads: [["J2", "2"], ["U2", "34"]]}, - {name: "mcu.swd_node.swclk", pads: [["J2", "4"], ["U2", "37"]]}, - {name: "mcu.reset_node", pads: [["J2", "10"], ["U2", "7"]]}, - {name: "mcu.swd.tdi", pads: [["J2", "8"]]}, - {name: "mcu.swd.swo", pads: [["J2", "6"]]}, + {name: "mcu.swd_node.swdio", pads: [["U2", "34"], ["J2", "2"]]}, + {name: "mcu.swd_node.swclk", pads: [["U2", "37"], ["J2", "4"]]}, + {name: "mcu.reset_node", pads: [["U2", "7"], ["J2", "10"]]}, {name: "mcu.ic.osc.xtal_in", pads: [["U2", "5"]]}, {name: "mcu.ic.osc.xtal_out", pads: [["U2", "6"]]}, + {name: "mcu.swd.tdi", pads: [["J2", "8"]]}, + {name: "mcu.swd.swo", pads: [["J2", "6"]]}, {name: "sw.out", pads: [["U2", "10"], ["SW1", "1"]]}, {name: "led[0].signal", pads: [["U2", "11"], ["D1", "2"]]}, {name: "led[0].package.k", pads: [["D1", "1"], ["R5", "1"]]}, diff --git a/examples/TestBlinkyImplicit/TestBlinkyImplicit.net.ref b/examples/TestBlinkyImplicit/TestBlinkyImplicit.net.ref index 4bb9ecab6..c3dde1847 100644 --- a/examples/TestBlinkyImplicit/TestBlinkyImplicit.net.ref +++ b/examples/TestBlinkyImplicit/TestBlinkyImplicit.net.ref @@ -132,18 +132,6 @@ (property (name "edg_value") (value "25V 4.7uF X5R ±10% 0805 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/reg/power_path/") (tstamps "/028a013f/1786043a/")) (tstamps "0be902ec")) -(comp (ref "J2") - (value "mcu.swd") - (footprint "Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD") - (property (name "Sheetname") (value "mcu")) - (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32f103.Stm32f103_48")) - (property (name "edg_path") (value "mcu.swd.conn")) - (property (name "edg_short_path") (value "mcu.swd")) - (property (name "edg_refdes") (value "J2")) - (property (name "edg_part") (value "PinHeader1.27 Shrouded 2x5 (Generic)")) - (property (name "edg_value") (value "PinHeader1.27 Shrouded 2x5")) - (sheetpath (names "/mcu/") (tstamps "/02850146/")) - (tstamps "02ae014f")) (comp (ref "U2") (value "mcu.ic") (footprint "Package_QFP:LQFP-48_7x7mm_P0.5mm") @@ -228,6 +216,18 @@ (property (name "edg_value") (value "50V 1uF X5R ±10% 0603 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/mcu/") (tstamps "/02850146/")) (tstamps "15dd03c3")) +(comp (ref "J2") + (value "mcu.swd") + (footprint "Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD") + (property (name "Sheetname") (value "mcu")) + (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32f103.Stm32f103_48")) + (property (name "edg_path") (value "mcu.swd.conn")) + (property (name "edg_short_path") (value "mcu.swd")) + (property (name "edg_refdes") (value "J2")) + (property (name "edg_part") (value "PinHeader1.27 Shrouded 2x5 (Generic)")) + (property (name "edg_value") (value "PinHeader1.27 Shrouded 2x5")) + (sheetpath (names "/mcu/") (tstamps "/02850146/")) + (tstamps "02ae014f")) (comp (ref "SW1") (value "sw") (footprint "Button_Switch_SMD:SW_SPST_SKQG_WithoutStem") @@ -359,9 +359,6 @@ (node (ref C1) (pin 2)) (node (ref C3) (pin 2)) (node (ref C4) (pin 2)) - (node (ref J2) (pin 3)) - (node (ref J2) (pin 5)) - (node (ref J2) (pin 9)) (node (ref U2) (pin 23)) (node (ref U2) (pin 35)) (node (ref U2) (pin 44)) @@ -373,6 +370,9 @@ (node (ref C8) (pin 2)) (node (ref C9) (pin 2)) (node (ref C10) (pin 2)) + (node (ref J2) (pin 3)) + (node (ref J2) (pin 5)) + (node (ref J2) (pin 9)) (node (ref SW1) (pin 2)) (node (ref R5) (pin 2)) (node (ref R6) (pin 2)) @@ -394,7 +394,6 @@ (node (ref R3) (pin 1)) (node (ref L1) (pin 2)) (node (ref C4) (pin 1)) - (node (ref J2) (pin 1)) (node (ref U2) (pin 1)) (node (ref U2) (pin 24)) (node (ref U2) (pin 36)) @@ -405,7 +404,8 @@ (node (ref C7) (pin 1)) (node (ref C8) (pin 1)) (node (ref C9) (pin 1)) - (node (ref C10) (pin 1))) + (node (ref C10) (pin 1)) + (node (ref J2) (pin 1))) (net (code 8) (name "reg.ic.sw") (node (ref U1) (pin 2)) (node (ref C2) (pin 2)) @@ -418,22 +418,22 @@ (node (ref U1) (pin 6)) (node (ref C2) (pin 1))) (net (code 11) (name "mcu.swd_node.swdio") - (node (ref J2) (pin 2)) - (node (ref U2) (pin 34))) + (node (ref U2) (pin 34)) + (node (ref J2) (pin 2))) (net (code 12) (name "mcu.swd_node.swclk") - (node (ref J2) (pin 4)) - (node (ref U2) (pin 37))) + (node (ref U2) (pin 37)) + (node (ref J2) (pin 4))) (net (code 13) (name "mcu.reset_node") - (node (ref J2) (pin 10)) - (node (ref U2) (pin 7))) -(net (code 14) (name "mcu.swd.tdi") - (node (ref J2) (pin 8))) -(net (code 15) (name "mcu.swd.swo") - (node (ref J2) (pin 6))) -(net (code 16) (name "mcu.ic.osc.xtal_in") + (node (ref U2) (pin 7)) + (node (ref J2) (pin 10))) +(net (code 14) (name "mcu.ic.osc.xtal_in") (node (ref U2) (pin 5))) -(net (code 17) (name "mcu.ic.osc.xtal_out") +(net (code 15) (name "mcu.ic.osc.xtal_out") (node (ref U2) (pin 6))) +(net (code 16) (name "mcu.swd.tdi") + (node (ref J2) (pin 8))) +(net (code 17) (name "mcu.swd.swo") + (node (ref J2) (pin 6))) (net (code 18) (name "sw.out") (node (ref U2) (pin 10)) (node (ref SW1) (pin 1))) diff --git a/examples/TestBlinkyImplicit/TestBlinkyImplicit.svgpcb.js b/examples/TestBlinkyImplicit/TestBlinkyImplicit.svgpcb.js index 701596cb7..924430fe3 100644 --- a/examples/TestBlinkyImplicit/TestBlinkyImplicit.svgpcb.js +++ b/examples/TestBlinkyImplicit/TestBlinkyImplicit.svgpcb.js @@ -55,11 +55,6 @@ const C4 = board.add(C_0805_2012Metric, { translate: pt(0.268, 0.776), rotate: 0, id: 'C4' }) -// mcu.swd.conn -const J2 = board.add(PinHeader_2x05_P1_27mm_Vertical_SMD, { - translate: pt(0.614, 0.146), rotate: 0, - id: 'J2' -}) // mcu.ic const U2 = board.add(LQFP_48_7x7mm_P0_5mm, { translate: pt(0.203, 0.203), rotate: 0, @@ -95,6 +90,11 @@ const C10 = board.add(C_0603_1608Metric, { translate: pt(0.058, 0.590), rotate: 0, id: 'C10' }) +// mcu.swd.conn +const J2 = board.add(PinHeader_2x05_P1_27mm_Vertical_SMD, { + translate: pt(0.614, 0.146), rotate: 0, + id: 'J2' +}) // sw.package const SW1 = board.add(SW_SPST_SKQG_WithoutStem, { translate: pt(0.714, 0.849), rotate: 0, @@ -143,22 +143,22 @@ const R8 = board.add(R_0603_1608Metric, { board.setNetlist([ {name: "usb.pwr", pads: [["J1", "A4"], ["J1", "A9"], ["J1", "B4"], ["J1", "B9"], ["U1", "3"], ["U1", "5"], ["C1", "1"], ["C3", "1"]]}, - {name: "usb.gnd", pads: [["J1", "A1"], ["J1", "A12"], ["J1", "B1"], ["J1", "B12"], ["J1", "S1"], ["R1", "1"], ["R2", "1"], ["U1", "1"], ["R4", "2"], ["C1", "2"], ["C3", "2"], ["C4", "2"], ["J2", "3"], ["J2", "5"], ["J2", "9"], ["U2", "23"], ["U2", "35"], ["U2", "44"], ["U2", "47"], ["U2", "8"], ["C5", "2"], ["C6", "2"], ["C7", "2"], ["C8", "2"], ["C9", "2"], ["C10", "2"], ["SW1", "2"], ["R5", "2"], ["R6", "2"], ["R7", "2"], ["R8", "2"]]}, + {name: "usb.gnd", pads: [["J1", "A1"], ["J1", "A12"], ["J1", "B1"], ["J1", "B12"], ["J1", "S1"], ["R1", "1"], ["R2", "1"], ["U1", "1"], ["R4", "2"], ["C1", "2"], ["C3", "2"], ["C4", "2"], ["U2", "23"], ["U2", "35"], ["U2", "44"], ["U2", "47"], ["U2", "8"], ["C5", "2"], ["C6", "2"], ["C7", "2"], ["C8", "2"], ["C9", "2"], ["C10", "2"], ["J2", "3"], ["J2", "5"], ["J2", "9"], ["SW1", "2"], ["R5", "2"], ["R6", "2"], ["R7", "2"], ["R8", "2"]]}, {name: "usb.usb.dp", pads: [["J1", "A6"], ["J1", "B6"]]}, {name: "usb.usb.dm", pads: [["J1", "A7"], ["J1", "B7"]]}, {name: "usb.conn.cc.cc1", pads: [["J1", "A5"], ["R1", "2"]]}, {name: "usb.conn.cc.cc2", pads: [["J1", "B5"], ["R2", "2"]]}, - {name: "reg.pwr_out", pads: [["R3", "1"], ["L1", "2"], ["C4", "1"], ["J2", "1"], ["U2", "1"], ["U2", "24"], ["U2", "36"], ["U2", "48"], ["U2", "9"], ["C5", "1"], ["C6", "1"], ["C7", "1"], ["C8", "1"], ["C9", "1"], ["C10", "1"]]}, + {name: "reg.pwr_out", pads: [["R3", "1"], ["L1", "2"], ["C4", "1"], ["U2", "1"], ["U2", "24"], ["U2", "36"], ["U2", "48"], ["U2", "9"], ["C5", "1"], ["C6", "1"], ["C7", "1"], ["C8", "1"], ["C9", "1"], ["C10", "1"], ["J2", "1"]]}, {name: "reg.ic.sw", pads: [["U1", "2"], ["C2", "2"], ["L1", "1"]]}, {name: "reg.ic.fb", pads: [["U1", "4"], ["R3", "2"], ["R4", "1"]]}, {name: "reg.ic.vbst", pads: [["U1", "6"], ["C2", "1"]]}, - {name: "mcu.swd_node.swdio", pads: [["J2", "2"], ["U2", "34"]]}, - {name: "mcu.swd_node.swclk", pads: [["J2", "4"], ["U2", "37"]]}, - {name: "mcu.reset_node", pads: [["J2", "10"], ["U2", "7"]]}, - {name: "mcu.swd.tdi", pads: [["J2", "8"]]}, - {name: "mcu.swd.swo", pads: [["J2", "6"]]}, + {name: "mcu.swd_node.swdio", pads: [["U2", "34"], ["J2", "2"]]}, + {name: "mcu.swd_node.swclk", pads: [["U2", "37"], ["J2", "4"]]}, + {name: "mcu.reset_node", pads: [["U2", "7"], ["J2", "10"]]}, {name: "mcu.ic.osc.xtal_in", pads: [["U2", "5"]]}, {name: "mcu.ic.osc.xtal_out", pads: [["U2", "6"]]}, + {name: "mcu.swd.tdi", pads: [["J2", "8"]]}, + {name: "mcu.swd.swo", pads: [["J2", "6"]]}, {name: "sw.out", pads: [["U2", "10"], ["SW1", "1"]]}, {name: "led[0].signal", pads: [["U2", "11"], ["D1", "2"]]}, {name: "led[0].package.k", pads: [["D1", "1"], ["R5", "1"]]}, diff --git a/examples/TofArray/TofArray.net.ref b/examples/TofArray/TofArray.net.ref index 5461d4fa6..33105948f 100644 --- a/examples/TofArray/TofArray.net.ref +++ b/examples/TofArray/TofArray.net.ref @@ -168,18 +168,6 @@ (property (name "edg_value") (value "5μA@1V 90Ω Single 3.53V~3.67V 200mW 3.6V SOD-323 Zener Diodes ROHS")) (sheetpath (names "/") (tstamps "/")) (tstamps "0eb80301")) -(comp (ref "J3") - (value "mcu.swd") - (footprint "Connector:Tag-Connect_TC2050-IDC-FP_2x05_P1.27mm_Vertical") - (property (name "Sheetname") (value "mcu")) - (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32f103.Stm32f103_48")) - (property (name "edg_path") (value "mcu.swd.conn")) - (property (name "edg_short_path") (value "mcu.swd")) - (property (name "edg_refdes") (value "J3")) - (property (name "edg_part") (value "")) - (property (name "edg_value") (value "")) - (sheetpath (names "/mcu/") (tstamps "/02850146/")) - (tstamps "02ae014f")) (comp (ref "U2") (value "mcu.ic") (footprint "Package_QFP:LQFP-48_7x7mm_P0.5mm") @@ -312,6 +300,18 @@ (property (name "edg_value") (value "50V 22pF C0G ±5% 0603 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/mcu/crystal/") (tstamps "/02850146/0c1b0303/")) (tstamps "05e801f6")) +(comp (ref "J3") + (value "mcu.swd") + (footprint "Connector:Tag-Connect_TC2050-IDC-FP_2x05_P1.27mm_Vertical") + (property (name "Sheetname") (value "mcu")) + (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32f103.Stm32f103_48")) + (property (name "edg_path") (value "mcu.swd.conn")) + (property (name "edg_short_path") (value "mcu.swd")) + (property (name "edg_refdes") (value "J3")) + (property (name "edg_part") (value "")) + (property (name "edg_value") (value "")) + (sheetpath (names "/mcu/") (tstamps "/02850146/")) + (tstamps "02ae014f")) (comp (ref "SW1") (value "sw1") (footprint "Button_Switch_SMD:SW_SPST_SKQG_WithoutStem") @@ -891,9 +891,6 @@ (node (ref C1) (pin 2)) (node (ref C2) (pin 2)) (node (ref D1) (pin 2)) - (node (ref J3) (pin 2)) - (node (ref J3) (pin 3)) - (node (ref J3) (pin 5)) (node (ref U2) (pin 23)) (node (ref U2) (pin 35)) (node (ref U2) (pin 44)) @@ -909,6 +906,9 @@ (node (ref X1) (pin 4)) (node (ref C9) (pin 2)) (node (ref C10) (pin 2)) + (node (ref J3) (pin 2)) + (node (ref J3) (pin 3)) + (node (ref J3) (pin 5)) (node (ref SW1) (pin 2)) (node (ref U3) (pin 12)) (node (ref U3) (pin 2)) @@ -961,7 +961,6 @@ (node (ref C2) (pin 1)) (node (ref TP3) (pin 1)) (node (ref D1) (pin 1)) - (node (ref J3) (pin 1)) (node (ref U2) (pin 1)) (node (ref U2) (pin 24)) (node (ref U2) (pin 36)) @@ -974,6 +973,7 @@ (node (ref C7) (pin 1)) (node (ref C8) (pin 1)) (node (ref R3) (pin 1)) + (node (ref J3) (pin 1)) (node (ref D2) (pin 2)) (node (ref D3) (pin 2)) (node (ref D4) (pin 2)) @@ -1123,19 +1123,19 @@ (node (ref X1) (pin 3)) (node (ref C10) (pin 1))) (net (code 35) (name "mcu.swd_node.swdio") - (node (ref J3) (pin 10)) - (node (ref U2) (pin 34))) + (node (ref U2) (pin 34)) + (node (ref J3) (pin 10))) (net (code 36) (name "mcu.swd_node.swclk") - (node (ref J3) (pin 9)) - (node (ref U2) (pin 37))) + (node (ref U2) (pin 37)) + (node (ref J3) (pin 9))) (net (code 37) (name "mcu.reset_node") - (node (ref J3) (pin 6)) - (node (ref U2) (pin 7))) + (node (ref U2) (pin 7)) + (node (ref J3) (pin 6))) (net (code 38) (name "mcu.swd.tdi") (node (ref J3) (pin 7))) (net (code 39) (name "mcu.swd.swo") - (node (ref J3) (pin 8)) - (node (ref U2) (pin 39))) + (node (ref U2) (pin 39)) + (node (ref J3) (pin 8))) (net (code 40) (name "tof.elt[0].ic.gpio1") (node (ref U3) (pin 7))) (net (code 41) (name "tof.elt[1].ic.gpio1") diff --git a/examples/TofArray/TofArray.svgpcb.js b/examples/TofArray/TofArray.svgpcb.js index be88a827f..6f96cbcfb 100644 --- a/examples/TofArray/TofArray.svgpcb.js +++ b/examples/TofArray/TofArray.svgpcb.js @@ -70,11 +70,6 @@ const D1 = board.add(D_SOD_323, { translate: pt(1.213, 1.719), rotate: 0, id: 'D1' }) -// mcu.swd.conn -const J3 = board.add(Tag_Connect_TC2050_IDC_FP_2x05_P1_27mm_Vertical, { - translate: pt(0.661, 0.167), rotate: 0, - id: 'J3' -}) // mcu.ic const U2 = board.add(LQFP_48_7x7mm_P0_5mm, { translate: pt(0.203, 0.203), rotate: 0, @@ -130,6 +125,11 @@ const C10 = board.add(C_0603_1608Metric, { translate: pt(0.682, 0.647), rotate: 0, id: 'C10' }) +// mcu.swd.conn +const J3 = board.add(Tag_Connect_TC2050_IDC_FP_2x05_P1_27mm_Vertical, { + translate: pt(0.661, 0.167), rotate: 0, + id: 'J3' +}) // sw1.package const SW1 = board.add(SW_SPST_SKQG_WithoutStem, { translate: pt(0.742, 1.424), rotate: 0, @@ -363,8 +363,8 @@ const D7 = board.add(LED_LiteOn_LTST_C19HE1WT, { board.setNetlist([ {name: "vusb", pads: [["J1", "A4"], ["J1", "A9"], ["J1", "B4"], ["J1", "B9"], ["TP1", "1"], ["U1", "3"], ["C1", "1"], ["U11", "1"], ["U11", "6"], ["C23", "1"], ["C24", "1"]]}, - {name: "gnd", pads: [["J1", "A1"], ["J1", "A12"], ["J1", "B1"], ["J1", "B12"], ["J1", "S1"], ["R1", "1"], ["R2", "1"], ["J2", "3"], ["TP2", "1"], ["U1", "1"], ["C1", "2"], ["C2", "2"], ["D1", "2"], ["J3", "2"], ["J3", "3"], ["J3", "5"], ["U2", "23"], ["U2", "35"], ["U2", "44"], ["U2", "47"], ["U2", "8"], ["C3", "2"], ["C4", "2"], ["C5", "2"], ["C6", "2"], ["C7", "2"], ["C8", "2"], ["X1", "2"], ["X1", "4"], ["C9", "2"], ["C10", "2"], ["SW1", "2"], ["U3", "12"], ["U3", "2"], ["U3", "3"], ["U3", "4"], ["U3", "6"], ["C11", "2"], ["C12", "2"], ["U4", "12"], ["U4", "2"], ["U4", "3"], ["U4", "4"], ["U4", "6"], ["C13", "2"], ["C14", "2"], ["U5", "12"], ["U5", "2"], ["U5", "3"], ["U5", "4"], ["U5", "6"], ["C15", "2"], ["C16", "2"], ["U6", "12"], ["U6", "2"], ["U6", "3"], ["U6", "4"], ["U6", "6"], ["C17", "2"], ["C18", "2"], ["U7", "12"], ["U7", "2"], ["U7", "3"], ["U7", "4"], ["U7", "6"], ["C19", "2"], ["C20", "2"], ["U8", "3"], ["U9", "2"], ["U9", "8"], ["C21", "2"], ["U10", "3"], ["C22", "2"], ["U11", "7"], ["U11", "9"], ["C23", "2"], ["C24", "2"], ["C26", "2"]]}, - {name: "v3v3", pads: [["U1", "2"], ["C2", "1"], ["TP3", "1"], ["D1", "1"], ["J3", "1"], ["U2", "1"], ["U2", "24"], ["U2", "36"], ["U2", "48"], ["U2", "9"], ["C3", "1"], ["C4", "1"], ["C5", "1"], ["C6", "1"], ["C7", "1"], ["C8", "1"], ["R3", "1"], ["D2", "2"], ["D3", "2"], ["D4", "2"], ["D5", "2"], ["D6", "2"], ["U3", "1"], ["U3", "11"], ["C11", "1"], ["C12", "1"], ["U4", "1"], ["U4", "11"], ["C13", "1"], ["C14", "1"], ["U5", "1"], ["U5", "11"], ["C15", "1"], ["C16", "1"], ["U6", "1"], ["U6", "11"], ["C17", "1"], ["C18", "1"], ["U7", "1"], ["U7", "11"], ["C19", "1"], ["C20", "1"], ["R4", "1"], ["R5", "1"], ["U9", "3"], ["C21", "1"], ["D7", "2"]]}, + {name: "gnd", pads: [["J1", "A1"], ["J1", "A12"], ["J1", "B1"], ["J1", "B12"], ["J1", "S1"], ["R1", "1"], ["R2", "1"], ["J2", "3"], ["TP2", "1"], ["U1", "1"], ["C1", "2"], ["C2", "2"], ["D1", "2"], ["U2", "23"], ["U2", "35"], ["U2", "44"], ["U2", "47"], ["U2", "8"], ["C3", "2"], ["C4", "2"], ["C5", "2"], ["C6", "2"], ["C7", "2"], ["C8", "2"], ["X1", "2"], ["X1", "4"], ["C9", "2"], ["C10", "2"], ["J3", "2"], ["J3", "3"], ["J3", "5"], ["SW1", "2"], ["U3", "12"], ["U3", "2"], ["U3", "3"], ["U3", "4"], ["U3", "6"], ["C11", "2"], ["C12", "2"], ["U4", "12"], ["U4", "2"], ["U4", "3"], ["U4", "4"], ["U4", "6"], ["C13", "2"], ["C14", "2"], ["U5", "12"], ["U5", "2"], ["U5", "3"], ["U5", "4"], ["U5", "6"], ["C15", "2"], ["C16", "2"], ["U6", "12"], ["U6", "2"], ["U6", "3"], ["U6", "4"], ["U6", "6"], ["C17", "2"], ["C18", "2"], ["U7", "12"], ["U7", "2"], ["U7", "3"], ["U7", "4"], ["U7", "6"], ["C19", "2"], ["C20", "2"], ["U8", "3"], ["U9", "2"], ["U9", "8"], ["C21", "2"], ["U10", "3"], ["C22", "2"], ["U11", "7"], ["U11", "9"], ["C23", "2"], ["C24", "2"], ["C26", "2"]]}, + {name: "v3v3", pads: [["U1", "2"], ["C2", "1"], ["TP3", "1"], ["D1", "1"], ["U2", "1"], ["U2", "24"], ["U2", "36"], ["U2", "48"], ["U2", "9"], ["C3", "1"], ["C4", "1"], ["C5", "1"], ["C6", "1"], ["C7", "1"], ["C8", "1"], ["R3", "1"], ["J3", "1"], ["D2", "2"], ["D3", "2"], ["D4", "2"], ["D5", "2"], ["D6", "2"], ["U3", "1"], ["U3", "11"], ["C11", "1"], ["C12", "1"], ["U4", "1"], ["U4", "11"], ["C13", "1"], ["C14", "1"], ["U5", "1"], ["U5", "11"], ["C15", "1"], ["C16", "1"], ["U6", "1"], ["U6", "11"], ["C17", "1"], ["C18", "1"], ["U7", "1"], ["U7", "11"], ["C19", "1"], ["C20", "1"], ["R4", "1"], ["R5", "1"], ["U9", "3"], ["C21", "1"], ["D7", "2"]]}, {name: "sw1_chain_0", pads: [["U2", "19"], ["SW1", "1"]]}, {name: "leds_chain_0.0", pads: [["U2", "20"], ["RN1", "8"]]}, {name: "leds_chain_0.1", pads: [["U2", "25"], ["RN1", "7"]]}, @@ -396,11 +396,11 @@ board.setNetlist([ {name: "mcu.gpio.tof_reset_4", pads: [["U2", "2"], ["U7", "5"]]}, {name: "mcu.xtal_node.xi", pads: [["U2", "5"], ["X1", "1"], ["C9", "1"]]}, {name: "mcu.xtal_node.xo", pads: [["U2", "6"], ["X1", "3"], ["C10", "1"]]}, - {name: "mcu.swd_node.swdio", pads: [["J3", "10"], ["U2", "34"]]}, - {name: "mcu.swd_node.swclk", pads: [["J3", "9"], ["U2", "37"]]}, - {name: "mcu.reset_node", pads: [["J3", "6"], ["U2", "7"]]}, + {name: "mcu.swd_node.swdio", pads: [["U2", "34"], ["J3", "10"]]}, + {name: "mcu.swd_node.swclk", pads: [["U2", "37"], ["J3", "9"]]}, + {name: "mcu.reset_node", pads: [["U2", "7"], ["J3", "6"]]}, {name: "mcu.swd.tdi", pads: [["J3", "7"]]}, - {name: "mcu.swd.swo", pads: [["J3", "8"], ["U2", "39"]]}, + {name: "mcu.swd.swo", pads: [["U2", "39"], ["J3", "8"]]}, {name: "tof.elt[0].ic.gpio1", pads: [["U3", "7"]]}, {name: "tof.elt[1].ic.gpio1", pads: [["U4", "7"]]}, {name: "tof.elt[2].ic.gpio1", pads: [["U5", "7"]]}, diff --git a/examples/UsbKey/UsbKey.net.ref b/examples/UsbKey/UsbKey.net.ref index 69dc3b0d6..0689a76d2 100644 --- a/examples/UsbKey/UsbKey.net.ref +++ b/examples/UsbKey/UsbKey.net.ref @@ -72,18 +72,6 @@ (property (name "edg_value") (value "25V 1uF X5R ±10% 0402 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/reg_3v3/") (tstamps "/0aba027a/")) (tstamps "0879026b")) -(comp (ref "J2") - (value "mcu.swd") - (footprint "Connector:Tag-Connect_TC2030-IDC-NL_2x03_P1.27mm_Vertical") - (property (name "Sheetname") (value "mcu")) - (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32l432.Stm32l432k")) - (property (name "edg_path") (value "mcu.swd.conn")) - (property (name "edg_short_path") (value "mcu.swd")) - (property (name "edg_refdes") (value "J2")) - (property (name "edg_part") (value "")) - (property (name "edg_value") (value "")) - (sheetpath (names "/mcu/") (tstamps "/02850146/")) - (tstamps "02ae014f")) (comp (ref "U2") (value "mcu.ic") (footprint "Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.45x3.45mm") @@ -96,6 +84,18 @@ (property (name "edg_value") (value "STM32L432Kxxx")) (sheetpath (names "/mcu/") (tstamps "/02850146/")) (tstamps "013700cd")) +(comp (ref "J2") + (value "mcu.swd") + (footprint "Connector:Tag-Connect_TC2030-IDC-NL_2x03_P1.27mm_Vertical") + (property (name "Sheetname") (value "mcu")) + (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32l432.Stm32l432k")) + (property (name "edg_path") (value "mcu.swd.conn")) + (property (name "edg_short_path") (value "mcu.swd")) + (property (name "edg_refdes") (value "J2")) + (property (name "edg_part") (value "")) + (property (name "edg_value") (value "")) + (sheetpath (names "/mcu/") (tstamps "/02850146/")) + (tstamps "02ae014f")) (comp (ref "D1") (value "rgb.package") (footprint "LED_SMD:LED_Lumex_SML-LX0404SIUPGUSB") @@ -210,21 +210,21 @@ (node (ref U1) (pin 2)) (node (ref U1) (pin 5)) (node (ref C1) (pin 2)) - (node (ref J2) (pin 5)) (node (ref U2) (pin 15)) (node (ref U2) (pin 16)) (node (ref U2) (pin 3)) (node (ref U2) (pin 32)) (node (ref U2) (pin 33)) + (node (ref J2) (pin 5)) (node (ref C2) (pin 2)) (node (ref C3) (pin 2)) (node (ref C4) (pin 2))) (net (code 2) (name "v3v3") (node (ref U1) (pin 1)) - (node (ref J2) (pin 1)) (node (ref U2) (pin 1)) (node (ref U2) (pin 17)) (node (ref U2) (pin 5)) + (node (ref J2) (pin 1)) (node (ref D1) (pin 1)) (node (ref C3) (pin 1)) (node (ref C4) (pin 1))) @@ -249,17 +249,17 @@ (node (ref U2) (pin 9)) (node (ref R3) (pin 2))) (net (code 9) (name "mcu.swd_node.swdio") - (node (ref J2) (pin 2)) - (node (ref U2) (pin 23))) + (node (ref U2) (pin 23)) + (node (ref J2) (pin 2))) (net (code 10) (name "mcu.swd_node.swclk") - (node (ref J2) (pin 4)) - (node (ref U2) (pin 24))) -(net (code 11) (name "mcu.swd.swo") + (node (ref U2) (pin 24)) + (node (ref J2) (pin 4))) +(net (code 11) (name "mcu.ic.nrst") + (node (ref U2) (pin 4))) +(net (code 12) (name "mcu.swd.swo") (node (ref J2) (pin 6))) -(net (code 12) (name "mcu.swd.reset") +(net (code 13) (name "mcu.swd.reset") (node (ref J2) (pin 3))) -(net (code 13) (name "mcu.ic.nrst") - (node (ref U2) (pin 4))) (net (code 14) (name "rgb.package.k_red") (node (ref D1) (pin 2)) (node (ref R1) (pin 1))) diff --git a/examples/UsbKey/UsbKey.svgpcb.js b/examples/UsbKey/UsbKey.svgpcb.js index 3498854b6..9874ccf04 100644 --- a/examples/UsbKey/UsbKey.svgpcb.js +++ b/examples/UsbKey/UsbKey.svgpcb.js @@ -30,16 +30,16 @@ const C1 = board.add(C_0402_1005Metric, { translate: pt(0.340, 0.678), rotate: 0, id: 'C1' }) -// mcu.swd.conn -const J2 = board.add(Tag_Connect_TC2030_IDC_NL_2x03_P1_27mm_Vertical, { - translate: pt(0.138, 0.365), rotate: 0, - id: 'J2' -}) // mcu.ic const U2 = board.add(QFN_32_1EP_5x5mm_P0_5mm_EP3_45x3_45mm, { translate: pt(0.123, 0.123), rotate: 0, id: 'U2' }) +// mcu.swd.conn +const J2 = board.add(Tag_Connect_TC2030_IDC_NL_2x03_P1_27mm_Vertical, { + translate: pt(0.138, 0.365), rotate: 0, + id: 'J2' +}) // rgb.package const D1 = board.add(LED_Lumex_SML_LX0404SIUPGUSB, { translate: pt(0.035, 0.597), rotate: 0, @@ -87,19 +87,19 @@ const C4 = board.add(C_0603_1608Metric, { }) board.setNetlist([ - {name: "gnd", pads: [["J1", "4"], ["U1", "2"], ["U1", "5"], ["C1", "2"], ["J2", "5"], ["U2", "15"], ["U2", "16"], ["U2", "3"], ["U2", "32"], ["U2", "33"], ["C2", "2"], ["C3", "2"], ["C4", "2"]]}, - {name: "v3v3", pads: [["U1", "1"], ["J2", "1"], ["U2", "1"], ["U2", "17"], ["U2", "5"], ["D1", "1"], ["C3", "1"], ["C4", "1"]]}, + {name: "gnd", pads: [["J1", "4"], ["U1", "2"], ["U1", "5"], ["C1", "2"], ["U2", "15"], ["U2", "16"], ["U2", "3"], ["U2", "32"], ["U2", "33"], ["J2", "5"], ["C2", "2"], ["C3", "2"], ["C4", "2"]]}, + {name: "v3v3", pads: [["U1", "1"], ["U2", "1"], ["U2", "17"], ["U2", "5"], ["J2", "1"], ["D1", "1"], ["C3", "1"], ["C4", "1"]]}, {name: "usb.pwr", pads: [["J1", "1"], ["U1", "3"], ["U1", "4"], ["C1", "1"]]}, {name: "usb.usb.dp", pads: [["J1", "3"], ["U2", "22"]]}, {name: "usb.usb.dm", pads: [["J1", "2"], ["U2", "21"]]}, {name: "mcu.gpio.rgb_red", pads: [["U2", "7"], ["R1", "2"]]}, {name: "mcu.gpio.rgb_green", pads: [["U2", "8"], ["R2", "2"]]}, {name: "mcu.gpio.rgb_blue", pads: [["U2", "9"], ["R3", "2"]]}, - {name: "mcu.swd_node.swdio", pads: [["J2", "2"], ["U2", "23"]]}, - {name: "mcu.swd_node.swclk", pads: [["J2", "4"], ["U2", "24"]]}, + {name: "mcu.swd_node.swdio", pads: [["U2", "23"], ["J2", "2"]]}, + {name: "mcu.swd_node.swclk", pads: [["U2", "24"], ["J2", "4"]]}, + {name: "mcu.ic.nrst", pads: [["U2", "4"]]}, {name: "mcu.swd.swo", pads: [["J2", "6"]]}, {name: "mcu.swd.reset", pads: [["J2", "3"]]}, - {name: "mcu.ic.nrst", pads: [["U2", "4"]]}, {name: "rgb.package.k_red", pads: [["D1", "2"], ["R1", "1"]]}, {name: "rgb.package.k_green", pads: [["D1", "3"], ["R2", "1"]]}, {name: "rgb.package.k_blue", pads: [["D1", "4"], ["R3", "1"]]}, diff --git a/examples/test_datalogger.py b/examples/test_datalogger.py index 580689454..9680eb6b8 100644 --- a/examples/test_datalogger.py +++ b/examples/test_datalogger.py @@ -296,7 +296,8 @@ def refinements(self) -> Refinements: "sw2=23", "v12sense=10", "v5sense=9", - "vscsense=8" "swd_swo=PIO0_8", + "vscsense=8", + "swd_swo=PIO0_8", ], ), (["pwr_5v", "power_path", "inductor", "part"], "NR5040T220M"), # peg to prior part selection diff --git a/examples/test_fcml.py b/examples/test_fcml.py index b43620514..3431075ff 100644 --- a/examples/test_fcml.py +++ b/examples/test_fcml.py @@ -529,6 +529,8 @@ def refinements(self) -> Refinements: (["reg_vgate"], Ap3012), ], instance_values=[ + (["mcu", "swd_connect_swo"], True), + (["mcu", "swd_connect_tdi"], True), ( ["mcu", "pin_assigns"], [ @@ -543,10 +545,10 @@ def refinements(self) -> Refinements: "fpga1=13", "fpga2=12", "fpga3=11", + "swd_swo=GPIO0", # UART0 TX + "swd_tdi=GPIO1", # UART0 RX ], ), - (["mcu", "swd_connect_swo"], True), - (["mcu", "swd_connect_tdi"], True), ( ["fpga", "pin_assigns"], [ @@ -569,8 +571,6 @@ def refinements(self) -> Refinements: "mcu1=3", "mcu2=4", "mcu3=6", - "swd_swo=GPIO0", # UART0 TX - "swd_tdi=GPIO1", # UART0 RX ], ), # flying caps need to be beefier for high current rating (which isn't modeled) From 17a37431bdd8337bdb094c82a310dd71a315e8e4 Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Mon, 25 May 2026 13:29:17 -0700 Subject: [PATCH 22/26] wip looks right at least --- examples/PicoProbe/PicoProbe.net.ref | 60 +++++------ examples/PicoProbe/PicoProbe.svgpcb.js | 22 ++-- examples/RobotCrawler/RobotCrawler.net.ref | 106 +++++++++---------- examples/RobotCrawler/RobotCrawler.svgpcb.js | 38 +++---- 4 files changed, 113 insertions(+), 113 deletions(-) diff --git a/examples/PicoProbe/PicoProbe.net.ref b/examples/PicoProbe/PicoProbe.net.ref index 850fd7637..537389881 100644 --- a/examples/PicoProbe/PicoProbe.net.ref +++ b/examples/PicoProbe/PicoProbe.net.ref @@ -156,18 +156,6 @@ (property (name "edg_value") (value "25V 4.7uF X5R ±10% 0805 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/target_reg/") (tstamps "/17010425/")) (tstamps "0be902ec")) -(comp (ref "SJ2") - (value "mcu.swd") - (footprint "Connector:Tag-Connect_TC2030-IDC-NL_2x03_P1.27mm_Vertical") - (property (name "Sheetname") (value "mcu")) - (property (name "Sheetfile") (value "edg.parts.microcontroller.Rp2040.Rp2040")) - (property (name "edg_path") (value "mcu.swd.conn")) - (property (name "edg_short_path") (value "mcu.swd")) - (property (name "edg_refdes") (value "SJ2")) - (property (name "edg_part") (value "")) - (property (name "edg_value") (value "")) - (sheetpath (names "/mcu/") (tstamps "/02850146/")) - (tstamps "02ae014f")) (comp (ref "SU3") (value "mcu.ic") (footprint "Package_DFN_QFN:QFN-56-1EP_7x7mm_P0.4mm_EP3.2x3.2mm") @@ -336,6 +324,18 @@ (property (name "edg_value") (value "25V 1uF X5R ±10% 0402 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/mcu/") (tstamps "/02850146/")) (tstamps "20e504ff")) +(comp (ref "SJ2") + (value "mcu.swd") + (footprint "Connector:Tag-Connect_TC2030-IDC-NL_2x03_P1.27mm_Vertical") + (property (name "Sheetname") (value "mcu")) + (property (name "Sheetfile") (value "edg.parts.microcontroller.Rp2040.Rp2040")) + (property (name "edg_path") (value "mcu.swd.conn")) + (property (name "edg_short_path") (value "mcu.swd")) + (property (name "edg_refdes") (value "SJ2")) + (property (name "edg_part") (value "")) + (property (name "edg_value") (value "")) + (sheetpath (names "/mcu/") (tstamps "/02850146/")) + (tstamps "02ae014f")) (comp (ref "SU5") (value "mcu.crystal") (footprint "Crystal:Resonator_SMD_Murata_CSTxExxV-3Pin_3.0x1.1mm") @@ -531,7 +531,6 @@ (node (ref SU2) (pin 2)) (node (ref SC3) (pin 2)) (node (ref SC4) (pin 2)) - (node (ref SJ2) (pin 5)) (node (ref SU3) (pin 19)) (node (ref SU3) (pin 57)) (node (ref SC5) (pin 2)) @@ -547,6 +546,7 @@ (node (ref SC14) (pin 2)) (node (ref SC15) (pin 2)) (node (ref SC16) (pin 2)) + (node (ref SJ2) (pin 5)) (node (ref SU5) (pin 2)) (node (ref SU6) (pin 3)) (node (ref SR5) (pin 2)) @@ -557,7 +557,6 @@ (net (code 3) (name "Sv3v3") (node (ref SU1) (pin 5)) (node (ref SC2) (pin 1)) - (node (ref SJ2) (pin 1)) (node (ref SU3) (pin 1)) (node (ref SU3) (pin 10)) (node (ref SU3) (pin 22)) @@ -577,6 +576,7 @@ (node (ref SC12) (pin 1)) (node (ref SU4) (pin 8)) (node (ref SC13) (pin 1)) + (node (ref SJ2) (pin 1)) (node (ref SR7) (pin 1))) (net (code 4) (name "Svtarget") (node (ref SU2) (pin 5)) @@ -605,48 +605,48 @@ (node (ref SU3) (pin 17)) (node (ref SR7) (pin 2))) (net (code 10) (name "Smcu.swd_node.swdio") - (node (ref SJ2) (pin 2)) - (node (ref SU3) (pin 25))) + (node (ref SU3) (pin 25)) + (node (ref SJ2) (pin 2))) (net (code 11) (name "Smcu.swd_node.swclk") - (node (ref SJ2) (pin 4)) - (node (ref SU3) (pin 24))) + (node (ref SU3) (pin 24)) + (node (ref SJ2) (pin 4))) (net (code 12) (name "Smcu.reset_node") - (node (ref SJ2) (pin 3)) - (node (ref SU3) (pin 26))) + (node (ref SU3) (pin 26)) + (node (ref SJ2) (pin 3))) (net (code 13) (name "Smcu.xtal_node.xi") (node (ref SU3) (pin 20)) (node (ref SU5) (pin 1))) (net (code 14) (name "Smcu.xtal_node.xo") (node (ref SU3) (pin 21)) (node (ref SU5) (pin 3))) -(net (code 15) (name "Smcu.swd.swo") - (node (ref SJ2) (pin 6)) - (node (ref SU3) (pin 2))) -(net (code 16) (name "Smcu.ic.dvdd") +(net (code 15) (name "Smcu.ic.dvdd") (node (ref SU3) (pin 23)) (node (ref SU3) (pin 45)) (node (ref SU3) (pin 50)) (node (ref SC14) (pin 1)) (node (ref SC15) (pin 1)) (node (ref SC16) (pin 1))) -(net (code 17) (name "Smcu.ic.qspi.sck") +(net (code 16) (name "Smcu.ic.qspi.sck") (node (ref SU3) (pin 52)) (node (ref SU4) (pin 6))) -(net (code 18) (name "Smcu.ic.qspi.mosi") +(net (code 17) (name "Smcu.ic.qspi.mosi") (node (ref SU3) (pin 53)) (node (ref SU4) (pin 5))) -(net (code 19) (name "Smcu.ic.qspi.miso") +(net (code 18) (name "Smcu.ic.qspi.miso") (node (ref SU3) (pin 55)) (node (ref SU4) (pin 2))) -(net (code 20) (name "Smcu.ic.qspi_cs") +(net (code 19) (name "Smcu.ic.qspi_cs") (node (ref SU3) (pin 56)) (node (ref SU4) (pin 1))) -(net (code 21) (name "Smcu.ic.qspi_sd2") +(net (code 20) (name "Smcu.ic.qspi_sd2") (node (ref SU3) (pin 54)) (node (ref SU4) (pin 3))) -(net (code 22) (name "Smcu.ic.qspi_sd3") +(net (code 21) (name "Smcu.ic.qspi_sd3") (node (ref SU3) (pin 51)) (node (ref SU4) (pin 7))) +(net (code 22) (name "Smcu.swd.swo") + (node (ref SU3) (pin 15)) + (node (ref SJ2) (pin 6))) (net (code 23) (name "Smcu.usb_res.interior.dp") (node (ref SU3) (pin 47)) (node (ref SR3) (pin 2))) diff --git a/examples/PicoProbe/PicoProbe.svgpcb.js b/examples/PicoProbe/PicoProbe.svgpcb.js index 2e00664bf..27fcc1597 100644 --- a/examples/PicoProbe/PicoProbe.svgpcb.js +++ b/examples/PicoProbe/PicoProbe.svgpcb.js @@ -65,11 +65,6 @@ const SC4 = board.add(C_0805_2012Metric, { translate: pt(1.080, 1.003), rotate: 0, id: 'SC4' }) -// mcu.swd.conn -const SJ2 = board.add(Tag_Connect_TC2030_IDC_NL_2x03_P1_27mm_Vertical, { - translate: pt(0.138, 0.443), rotate: 0, - id: 'SJ2' -}) // mcu.ic const SU3 = board.add(QFN_56_1EP_7x7mm_P0_4mm_EP3_2x3_2mm, { translate: pt(0.163, 0.163), rotate: 0, @@ -140,6 +135,11 @@ const SC16 = board.add(C_0402_1005Metric, { translate: pt(0.369, 0.655), rotate: 0, id: 'SC16' }) +// mcu.swd.conn +const SJ2 = board.add(Tag_Connect_TC2030_IDC_NL_2x03_P1_27mm_Vertical, { + translate: pt(0.138, 0.443), rotate: 0, + id: 'SJ2' +}) // mcu.crystal const SU5 = board.add(Resonator_SMD_Murata_CSTxExxV_3Pin_3_0x1_1mm, { translate: pt(0.394, 0.428), rotate: 0, @@ -213,20 +213,19 @@ const SR10 = board.add(R_0402_1005Metric, { board.setNetlist([ {name: "Svusb", pads: [["SJ1", "A4"], ["SJ1", "A9"], ["SJ1", "B4"], ["SJ1", "B9"], ["SD1", "1"], ["SU1", "1"], ["SU1", "3"], ["SC1", "1"], ["SU2", "1"], ["SC3", "1"]]}, - {name: "Sgnd", pads: [["SJ1", "A1"], ["SJ1", "A12"], ["SJ1", "B1"], ["SJ1", "B12"], ["SJ1", "S1"], ["SR1", "1"], ["SR2", "1"], ["SD1", "2"], ["SU1", "2"], ["SC1", "2"], ["SC2", "2"], ["SU2", "2"], ["SC3", "2"], ["SC4", "2"], ["SJ2", "5"], ["SU3", "19"], ["SU3", "57"], ["SC5", "2"], ["SC6", "2"], ["SC7", "2"], ["SC8", "2"], ["SC9", "2"], ["SC10", "2"], ["SC11", "2"], ["SC12", "2"], ["SU4", "4"], ["SC13", "2"], ["SC14", "2"], ["SC15", "2"], ["SC16", "2"], ["SU5", "2"], ["SU6", "3"], ["SR5", "2"], ["SR6", "2"], ["SJ3", "5"], ["SR8", "2"], ["SR10", "2"]]}, - {name: "Sv3v3", pads: [["SU1", "5"], ["SC2", "1"], ["SJ2", "1"], ["SU3", "1"], ["SU3", "10"], ["SU3", "22"], ["SU3", "33"], ["SU3", "42"], ["SU3", "43"], ["SU3", "44"], ["SU3", "48"], ["SU3", "49"], ["SC5", "1"], ["SC6", "1"], ["SC7", "1"], ["SC8", "1"], ["SC9", "1"], ["SC10", "1"], ["SC11", "1"], ["SC12", "1"], ["SU4", "8"], ["SC13", "1"], ["SR7", "1"]]}, + {name: "Sgnd", pads: [["SJ1", "A1"], ["SJ1", "A12"], ["SJ1", "B1"], ["SJ1", "B12"], ["SJ1", "S1"], ["SR1", "1"], ["SR2", "1"], ["SD1", "2"], ["SU1", "2"], ["SC1", "2"], ["SC2", "2"], ["SU2", "2"], ["SC3", "2"], ["SC4", "2"], ["SU3", "19"], ["SU3", "57"], ["SC5", "2"], ["SC6", "2"], ["SC7", "2"], ["SC8", "2"], ["SC9", "2"], ["SC10", "2"], ["SC11", "2"], ["SC12", "2"], ["SU4", "4"], ["SC13", "2"], ["SC14", "2"], ["SC15", "2"], ["SC16", "2"], ["SJ2", "5"], ["SU5", "2"], ["SU6", "3"], ["SR5", "2"], ["SR6", "2"], ["SJ3", "5"], ["SR8", "2"], ["SR10", "2"]]}, + {name: "Sv3v3", pads: [["SU1", "5"], ["SC2", "1"], ["SU3", "1"], ["SU3", "10"], ["SU3", "22"], ["SU3", "33"], ["SU3", "42"], ["SU3", "43"], ["SU3", "44"], ["SU3", "48"], ["SU3", "49"], ["SC5", "1"], ["SC6", "1"], ["SC7", "1"], ["SC8", "1"], ["SC9", "1"], ["SC10", "1"], ["SC11", "1"], ["SC12", "1"], ["SU4", "8"], ["SC13", "1"], ["SJ2", "1"], ["SR7", "1"]]}, {name: "Svtarget", pads: [["SU2", "5"], ["SC4", "1"], ["SJ3", "1"], ["SD4", "2"], ["SR9", "1"]]}, {name: "Susb_chain_0.d_P", pads: [["SJ1", "A6"], ["SJ1", "B6"], ["SR3", "1"], ["SU6", "2"]]}, {name: "Susb_chain_0.d_N", pads: [["SJ1", "A7"], ["SJ1", "B7"], ["SR4", "1"], ["SU6", "1"]]}, {name: "Susb.conn.cc.cc1", pads: [["SJ1", "A5"], ["SR1", "2"]]}, {name: "Susb.conn.cc.cc2", pads: [["SJ1", "B5"], ["SR2", "2"]]}, {name: "Starget_reg.reset", pads: [["SU2", "3"], ["SU3", "17"], ["SR7", "2"]]}, - {name: "Smcu.swd_node.swdio", pads: [["SJ2", "2"], ["SU3", "25"]]}, - {name: "Smcu.swd_node.swclk", pads: [["SJ2", "4"], ["SU3", "24"]]}, - {name: "Smcu.reset_node", pads: [["SJ2", "3"], ["SU3", "26"]]}, + {name: "Smcu.swd_node.swdio", pads: [["SU3", "25"], ["SJ2", "2"]]}, + {name: "Smcu.swd_node.swclk", pads: [["SU3", "24"], ["SJ2", "4"]]}, + {name: "Smcu.reset_node", pads: [["SU3", "26"], ["SJ2", "3"]]}, {name: "Smcu.xtal_node.xi", pads: [["SU3", "20"], ["SU5", "1"]]}, {name: "Smcu.xtal_node.xo", pads: [["SU3", "21"], ["SU5", "3"]]}, - {name: "Smcu.swd.swo", pads: [["SJ2", "6"], ["SU3", "2"]]}, {name: "Smcu.ic.dvdd", pads: [["SU3", "23"], ["SU3", "45"], ["SU3", "50"], ["SC14", "1"], ["SC15", "1"], ["SC16", "1"]]}, {name: "Smcu.ic.qspi.sck", pads: [["SU3", "52"], ["SU4", "6"]]}, {name: "Smcu.ic.qspi.mosi", pads: [["SU3", "53"], ["SU4", "5"]]}, @@ -234,6 +233,7 @@ board.setNetlist([ {name: "Smcu.ic.qspi_cs", pads: [["SU3", "56"], ["SU4", "1"]]}, {name: "Smcu.ic.qspi_sd2", pads: [["SU3", "54"], ["SU4", "3"]]}, {name: "Smcu.ic.qspi_sd3", pads: [["SU3", "51"], ["SU4", "7"]]}, + {name: "Smcu.swd.swo", pads: [["SU3", "15"], ["SJ2", "6"]]}, {name: "Smcu.usb_res.interior.dp", pads: [["SU3", "47"], ["SR3", "2"]]}, {name: "Smcu.usb_res.interior.dm", pads: [["SU3", "46"], ["SR4", "2"]]}, {name: "Sled_tgt.signal", pads: [["SU3", "27"], ["SD2", "2"]]}, diff --git a/examples/RobotCrawler/RobotCrawler.net.ref b/examples/RobotCrawler/RobotCrawler.net.ref index a67d4dc9b..7ff3c970f 100644 --- a/examples/RobotCrawler/RobotCrawler.net.ref +++ b/examples/RobotCrawler/RobotCrawler.net.ref @@ -576,18 +576,6 @@ (property (name "edg_value") (value "50V 1uF X5R ±10% 0603 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/mcu/en_pull/") (tstamps "/02850146/0b9c02f0/")) (tstamps "00640064")) -(comp (ref "RJ17") - (value "mcu_servo.swd") - (footprint "Connector:Tag-Connect_TC2030-IDC-NL_2x03_P1.27mm_Vertical") - (property (name "Sheetname") (value "mcu_servo")) - (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32f103.Stm32f103_48")) - (property (name "edg_path") (value "mcu_servo.swd.conn")) - (property (name "edg_short_path") (value "mcu_servo.swd")) - (property (name "edg_refdes") (value "RJ17")) - (property (name "edg_part") (value "")) - (property (name "edg_value") (value "")) - (sheetpath (names "/mcu_servo/") (tstamps "/12e703d4/")) - (tstamps "02ae014f")) (comp (ref "RU7") (value "mcu_servo.ic") (footprint "Package_QFP:LQFP-48_7x7mm_P0.5mm") @@ -672,17 +660,17 @@ (property (name "edg_value") (value "50V 1uF X5R ±10% 0603 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/mcu_servo/") (tstamps "/12e703d4/")) (tstamps "15dd03c3")) -(comp (ref "RJ18") - (value "mcu_test.swd") +(comp (ref "RJ17") + (value "mcu_servo.swd") (footprint "Connector:Tag-Connect_TC2030-IDC-NL_2x03_P1.27mm_Vertical") - (property (name "Sheetname") (value "mcu_test")) - (property (name "Sheetfile") (value "edg.parts.microcontroller.Rp2040.Rp2040")) - (property (name "edg_path") (value "mcu_test.swd.conn")) - (property (name "edg_short_path") (value "mcu_test.swd")) - (property (name "edg_refdes") (value "RJ18")) + (property (name "Sheetname") (value "mcu_servo")) + (property (name "Sheetfile") (value "edg.parts.microcontroller.Stm32f103.Stm32f103_48")) + (property (name "edg_path") (value "mcu_servo.swd.conn")) + (property (name "edg_short_path") (value "mcu_servo.swd")) + (property (name "edg_refdes") (value "RJ17")) (property (name "edg_part") (value "")) (property (name "edg_value") (value "")) - (sheetpath (names "/mcu_test/") (tstamps "/0f170365/")) + (sheetpath (names "/mcu_servo/") (tstamps "/12e703d4/")) (tstamps "02ae014f")) (comp (ref "RU8") (value "mcu_test.ic") @@ -852,6 +840,18 @@ (property (name "edg_value") (value "50V 1uF X5R ±10% 0603 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS")) (sheetpath (names "/mcu_test/") (tstamps "/0f170365/")) (tstamps "20e504ff")) +(comp (ref "RJ18") + (value "mcu_test.swd") + (footprint "Connector:Tag-Connect_TC2030-IDC-NL_2x03_P1.27mm_Vertical") + (property (name "Sheetname") (value "mcu_test")) + (property (name "Sheetfile") (value "edg.parts.microcontroller.Rp2040.Rp2040")) + (property (name "edg_path") (value "mcu_test.swd.conn")) + (property (name "edg_short_path") (value "mcu_test.swd")) + (property (name "edg_refdes") (value "RJ18")) + (property (name "edg_part") (value "")) + (property (name "edg_value") (value "")) + (sheetpath (names "/mcu_test/") (tstamps "/0f170365/")) + (tstamps "02ae014f")) (comp (ref "RR4") (value "i2c_pull.scl_res") (footprint "Resistor_SMD:R_0603_1608Metric") @@ -1556,7 +1556,6 @@ (node (ref RC13) (pin 2)) (node (ref RJ16) (pin 5)) (node (ref RC14) (pin 2)) - (node (ref RJ17) (pin 5)) (node (ref RU7) (pin 23)) (node (ref RU7) (pin 35)) (node (ref RU7) (pin 44)) @@ -1568,7 +1567,7 @@ (node (ref RC18) (pin 2)) (node (ref RC19) (pin 2)) (node (ref RC20) (pin 2)) - (node (ref RJ18) (pin 5)) + (node (ref RJ17) (pin 5)) (node (ref RU8) (pin 19)) (node (ref RU8) (pin 57)) (node (ref RC21) (pin 2)) @@ -1584,6 +1583,7 @@ (node (ref RC30) (pin 2)) (node (ref RC31) (pin 2)) (node (ref RC32) (pin 2)) + (node (ref RJ18) (pin 5)) (node (ref RR6) (pin 2)) (node (ref RR7) (pin 2)) (node (ref RR8) (pin 2)) @@ -1651,7 +1651,6 @@ (node (ref RC13) (pin 1)) (node (ref RJ16) (pin 1)) (node (ref RR3) (pin 1)) - (node (ref RJ17) (pin 1)) (node (ref RU7) (pin 1)) (node (ref RU7) (pin 24)) (node (ref RU7) (pin 36)) @@ -1663,7 +1662,7 @@ (node (ref RC18) (pin 1)) (node (ref RC19) (pin 1)) (node (ref RC20) (pin 1)) - (node (ref RJ18) (pin 1)) + (node (ref RJ17) (pin 1)) (node (ref RU8) (pin 1)) (node (ref RU8) (pin 10)) (node (ref RU8) (pin 22)) @@ -1683,6 +1682,7 @@ (node (ref RC28) (pin 1)) (node (ref RU9) (pin 8)) (node (ref RC29) (pin 1)) + (node (ref RJ18) (pin 1)) (node (ref RR4) (pin 1)) (node (ref RR5) (pin 1)) (node (ref RJ19) (pin 13)) @@ -1840,22 +1840,22 @@ (node (ref RU6) (pin 27)) (node (ref RJ16) (pin 2))) (net (code 45) (name "Rmcu_servo.swd_node.swdio") - (node (ref RJ17) (pin 2)) - (node (ref RU7) (pin 34))) + (node (ref RU7) (pin 34)) + (node (ref RJ17) (pin 2))) (net (code 46) (name "Rmcu_servo.swd_node.swclk") - (node (ref RJ17) (pin 4)) - (node (ref RU7) (pin 37))) + (node (ref RU7) (pin 37)) + (node (ref RJ17) (pin 4))) (net (code 47) (name "Rmcu_servo.reset_node") (node (ref RU6) (pin 12)) - (node (ref RJ17) (pin 3)) - (node (ref RU7) (pin 7))) -(net (code 48) (name "Rmcu_servo.swd.swo") - (node (ref RJ17) (pin 6)) - (node (ref RU7) (pin 42))) -(net (code 49) (name "Rmcu_servo.ic.osc.xtal_in") + (node (ref RU7) (pin 7)) + (node (ref RJ17) (pin 3))) +(net (code 48) (name "Rmcu_servo.ic.osc.xtal_in") (node (ref RU7) (pin 5))) -(net (code 50) (name "Rmcu_servo.ic.osc.xtal_out") +(net (code 49) (name "Rmcu_servo.ic.osc.xtal_out") (node (ref RU7) (pin 6))) +(net (code 50) (name "Rmcu_servo.swd.swo") + (node (ref RU7) (pin 42)) + (node (ref RJ17) (pin 6))) (net (code 51) (name "Rmcu_test.gpio.led_0") (node (ref RU8) (pin 4)) (node (ref RD4) (pin 2))) @@ -1869,46 +1869,46 @@ (node (ref RU8) (pin 16)) (node (ref RD7) (pin 2))) (net (code 55) (name "Rmcu_test.swd_node.swdio") - (node (ref RJ18) (pin 2)) - (node (ref RU8) (pin 25))) + (node (ref RU8) (pin 25)) + (node (ref RJ18) (pin 2))) (net (code 56) (name "Rmcu_test.swd_node.swclk") - (node (ref RJ18) (pin 4)) - (node (ref RU8) (pin 24))) + (node (ref RU8) (pin 24)) + (node (ref RJ18) (pin 4))) (net (code 57) (name "Rmcu_test.reset_node") - (node (ref RJ18) (pin 3)) - (node (ref RU8) (pin 26))) -(net (code 58) (name "Rmcu_test.swd.swo") - (node (ref RJ18) (pin 6)) - (node (ref RU8) (pin 2))) -(net (code 59) (name "Rmcu_test.ic.dvdd") + (node (ref RU8) (pin 26)) + (node (ref RJ18) (pin 3))) +(net (code 58) (name "Rmcu_test.ic.dvdd") (node (ref RU8) (pin 23)) (node (ref RU8) (pin 45)) (node (ref RU8) (pin 50)) (node (ref RC30) (pin 1)) (node (ref RC31) (pin 1)) (node (ref RC32) (pin 1))) -(net (code 60) (name "Rmcu_test.ic.qspi.sck") +(net (code 59) (name "Rmcu_test.ic.qspi.sck") (node (ref RU8) (pin 52)) (node (ref RU9) (pin 6))) -(net (code 61) (name "Rmcu_test.ic.qspi.mosi") +(net (code 60) (name "Rmcu_test.ic.qspi.mosi") (node (ref RU8) (pin 53)) (node (ref RU9) (pin 5))) -(net (code 62) (name "Rmcu_test.ic.qspi.miso") +(net (code 61) (name "Rmcu_test.ic.qspi.miso") (node (ref RU8) (pin 55)) (node (ref RU9) (pin 2))) -(net (code 63) (name "Rmcu_test.ic.qspi_cs") +(net (code 62) (name "Rmcu_test.ic.qspi_cs") (node (ref RU8) (pin 56)) (node (ref RU9) (pin 1))) -(net (code 64) (name "Rmcu_test.ic.qspi_sd2") +(net (code 63) (name "Rmcu_test.ic.qspi_sd2") (node (ref RU8) (pin 54)) (node (ref RU9) (pin 3))) -(net (code 65) (name "Rmcu_test.ic.qspi_sd3") +(net (code 64) (name "Rmcu_test.ic.qspi_sd3") (node (ref RU8) (pin 51)) (node (ref RU9) (pin 7))) -(net (code 66) (name "Rmcu_test.ic.xosc.xtal_in") +(net (code 65) (name "Rmcu_test.ic.xosc.xtal_in") (node (ref RU8) (pin 20))) -(net (code 67) (name "Rmcu_test.ic.xosc.xtal_out") +(net (code 66) (name "Rmcu_test.ic.xosc.xtal_out") (node (ref RU8) (pin 21))) +(net (code 67) (name "Rmcu_test.swd.swo") + (node (ref RU8) (pin 27)) + (node (ref RJ18) (pin 6))) (net (code 68) (name "Rled.signal") (node (ref RU6) (pin 33)) (node (ref RD2) (pin 2))) diff --git a/examples/RobotCrawler/RobotCrawler.svgpcb.js b/examples/RobotCrawler/RobotCrawler.svgpcb.js index 467a2b4bb..25e3ae2e1 100644 --- a/examples/RobotCrawler/RobotCrawler.svgpcb.js +++ b/examples/RobotCrawler/RobotCrawler.svgpcb.js @@ -240,11 +240,6 @@ const RC14 = board.add(C_0603_1608Metric, { translate: pt(1.987, 0.533), rotate: 0, id: 'RC14' }) -// mcu_servo.swd.conn -const RJ17 = board.add(Tag_Connect_TC2030_IDC_NL_2x03_P1_27mm_Vertical, { - translate: pt(1.444, 1.819), rotate: 0, - id: 'RJ17' -}) // mcu_servo.ic const RU7 = board.add(LQFP_48_7x7mm_P0_5mm, { translate: pt(1.064, 1.943), rotate: 0, @@ -280,10 +275,10 @@ const RC20 = board.add(C_0603_1608Metric, { translate: pt(1.076, 2.214), rotate: 0, id: 'RC20' }) -// mcu_test.swd.conn -const RJ18 = board.add(Tag_Connect_TC2030_IDC_NL_2x03_P1_27mm_Vertical, { - translate: pt(0.138, 2.183), rotate: 0, - id: 'RJ18' +// mcu_servo.swd.conn +const RJ17 = board.add(Tag_Connect_TC2030_IDC_NL_2x03_P1_27mm_Vertical, { + translate: pt(1.444, 1.819), rotate: 0, + id: 'RJ17' }) // mcu_test.ic const RU8 = board.add(QFN_56_1EP_7x7mm_P0_4mm_EP3_2x3_2mm, { @@ -355,6 +350,11 @@ const RC32 = board.add(C_0603_1608Metric, { translate: pt(0.058, 2.427), rotate: 0, id: 'RC32' }) +// mcu_test.swd.conn +const RJ18 = board.add(Tag_Connect_TC2030_IDC_NL_2x03_P1_27mm_Vertical, { + translate: pt(0.138, 2.183), rotate: 0, + id: 'RJ18' +}) // i2c_pull.scl_res.res const RR4 = board.add(R_0603_1608Metric, { translate: pt(1.559, 3.162), rotate: 0, @@ -613,8 +613,8 @@ const RC49 = board.add(C_0603_1608Metric, { board.setNetlist([ {name: "Rvbatt", pads: [["RJ1", "2"], ["RJ2", "2"], ["RJ3", "2"], ["RJ4", "2"], ["RJ5", "2"], ["RJ6", "2"], ["RJ7", "2"], ["RJ8", "2"], ["RJ9", "2"], ["RJ10", "2"], ["RJ11", "2"], ["RJ12", "2"], ["RJ13", "2"], ["RJ14", "2"], ["RJ15", "2"], ["RTP1", "1"], ["RU2", "2"], ["RC3", "1"], ["RU3", "4"], ["RU3", "5"], ["RL1", "1"], ["RC6", "1"], ["RU4", "3"], ["RC8", "1"], ["RU5", "3"], ["RC10", "1"], ["RD10", "2"], ["RC40", "1"], ["RD11", "2"], ["RC41", "1"], ["RD12", "2"], ["RC42", "1"], ["RD13", "2"], ["RC43", "1"], ["RD14", "2"], ["RC44", "1"], ["RD15", "2"], ["RC45", "1"], ["RD16", "2"], ["RC46", "1"], ["RD17", "2"], ["RC47", "1"], ["RD18", "2"], ["RC48", "1"], ["RD19", "2"], ["RC49", "1"]]}, - {name: "Rgnd", pads: [["RJ1", "1"], ["RJ2", "3"], ["RJ3", "3"], ["RJ4", "3"], ["RJ5", "3"], ["RJ6", "3"], ["RJ7", "3"], ["RJ8", "3"], ["RJ9", "3"], ["RJ10", "3"], ["RJ11", "3"], ["RJ12", "3"], ["RJ13", "3"], ["RU1", "1"], ["RU1", "2"], ["RU1", "3"], ["RU1", "6"], ["RU1", "7"], ["RC1", "2"], ["RC2", "2"], ["RJ14", "3"], ["RJ15", "3"], ["RTP2", "1"], ["RU2", "1"], ["RC3", "2"], ["RC4", "2"], ["RU3", "2"], ["RR2", "2"], ["RC6", "2"], ["RC7", "2"], ["RU4", "1"], ["RC8", "2"], ["RC9", "2"], ["RU5", "1"], ["RC10", "2"], ["RC11", "2"], ["RU6", "1"], ["RU6", "40"], ["RU6", "41"], ["RC12", "2"], ["RC13", "2"], ["RJ16", "5"], ["RC14", "2"], ["RJ17", "5"], ["RU7", "23"], ["RU7", "35"], ["RU7", "44"], ["RU7", "47"], ["RU7", "8"], ["RC15", "2"], ["RC16", "2"], ["RC17", "2"], ["RC18", "2"], ["RC19", "2"], ["RC20", "2"], ["RJ18", "5"], ["RU8", "19"], ["RU8", "57"], ["RC21", "2"], ["RC22", "2"], ["RC23", "2"], ["RC24", "2"], ["RC25", "2"], ["RC26", "2"], ["RC27", "2"], ["RC28", "2"], ["RU9", "4"], ["RC29", "2"], ["RC30", "2"], ["RC31", "2"], ["RC32", "2"], ["RR6", "2"], ["RR7", "2"], ["RR8", "2"], ["RR9", "2"], ["RR10", "2"], ["RR11", "2"], ["RJ19", "1"], ["RJ19", "10"], ["RJ19", "11"], ["RJ19", "12"], ["RJ19", "14"], ["RJ19", "15"], ["RJ19", "16"], ["RJ19", "21"], ["RJ19", "22"], ["RJ19", "23"], ["RJ19", "24"], ["RJ19", "25"], ["RJ19", "26"], ["RJ19", "31"], ["RJ19", "7"], ["RR12", "1"], ["RC33", "2"], ["RC34", "2"], ["RC35", "2"], ["RC36", "2"], ["RD9", "1"], ["RJ20", "10"], ["RJ20", "17"], ["RJ20", "23"], ["RC37", "2"], ["RC38", "2"], ["RC39", "2"], ["RD10", "4"], ["RC40", "2"], ["RD11", "4"], ["RC41", "2"], ["RD12", "4"], ["RC42", "2"], ["RD13", "4"], ["RC43", "2"], ["RD14", "4"], ["RC44", "2"], ["RD15", "4"], ["RC45", "2"], ["RD16", "4"], ["RC46", "2"], ["RD17", "4"], ["RC47", "2"], ["RD18", "4"], ["RC48", "2"], ["RD19", "4"], ["RC49", "2"]]}, - {name: "Rv3v3", pads: [["RU1", "12"], ["RU1", "5"], ["RU1", "8"], ["RC1", "1"], ["RC2", "1"], ["RU2", "3"], ["RC4", "1"], ["RTP3", "1"], ["RU6", "2"], ["RC12", "1"], ["RC13", "1"], ["RJ16", "1"], ["RR3", "1"], ["RJ17", "1"], ["RU7", "1"], ["RU7", "24"], ["RU7", "36"], ["RU7", "48"], ["RU7", "9"], ["RC15", "1"], ["RC16", "1"], ["RC17", "1"], ["RC18", "1"], ["RC19", "1"], ["RC20", "1"], ["RJ18", "1"], ["RU8", "1"], ["RU8", "10"], ["RU8", "22"], ["RU8", "33"], ["RU8", "42"], ["RU8", "43"], ["RU8", "44"], ["RU8", "48"], ["RU8", "49"], ["RC21", "1"], ["RC22", "1"], ["RC23", "1"], ["RC24", "1"], ["RC25", "1"], ["RC26", "1"], ["RC27", "1"], ["RC28", "1"], ["RU9", "8"], ["RC29", "1"], ["RR4", "1"], ["RR5", "1"], ["RJ19", "13"], ["RJ19", "17"], ["RJ19", "8"], ["RC35", "1"], ["RJ20", "14"], ["RC37", "1"], ["RR14", "1"]]}, + {name: "Rgnd", pads: [["RJ1", "1"], ["RJ2", "3"], ["RJ3", "3"], ["RJ4", "3"], ["RJ5", "3"], ["RJ6", "3"], ["RJ7", "3"], ["RJ8", "3"], ["RJ9", "3"], ["RJ10", "3"], ["RJ11", "3"], ["RJ12", "3"], ["RJ13", "3"], ["RU1", "1"], ["RU1", "2"], ["RU1", "3"], ["RU1", "6"], ["RU1", "7"], ["RC1", "2"], ["RC2", "2"], ["RJ14", "3"], ["RJ15", "3"], ["RTP2", "1"], ["RU2", "1"], ["RC3", "2"], ["RC4", "2"], ["RU3", "2"], ["RR2", "2"], ["RC6", "2"], ["RC7", "2"], ["RU4", "1"], ["RC8", "2"], ["RC9", "2"], ["RU5", "1"], ["RC10", "2"], ["RC11", "2"], ["RU6", "1"], ["RU6", "40"], ["RU6", "41"], ["RC12", "2"], ["RC13", "2"], ["RJ16", "5"], ["RC14", "2"], ["RU7", "23"], ["RU7", "35"], ["RU7", "44"], ["RU7", "47"], ["RU7", "8"], ["RC15", "2"], ["RC16", "2"], ["RC17", "2"], ["RC18", "2"], ["RC19", "2"], ["RC20", "2"], ["RJ17", "5"], ["RU8", "19"], ["RU8", "57"], ["RC21", "2"], ["RC22", "2"], ["RC23", "2"], ["RC24", "2"], ["RC25", "2"], ["RC26", "2"], ["RC27", "2"], ["RC28", "2"], ["RU9", "4"], ["RC29", "2"], ["RC30", "2"], ["RC31", "2"], ["RC32", "2"], ["RJ18", "5"], ["RR6", "2"], ["RR7", "2"], ["RR8", "2"], ["RR9", "2"], ["RR10", "2"], ["RR11", "2"], ["RJ19", "1"], ["RJ19", "10"], ["RJ19", "11"], ["RJ19", "12"], ["RJ19", "14"], ["RJ19", "15"], ["RJ19", "16"], ["RJ19", "21"], ["RJ19", "22"], ["RJ19", "23"], ["RJ19", "24"], ["RJ19", "25"], ["RJ19", "26"], ["RJ19", "31"], ["RJ19", "7"], ["RR12", "1"], ["RC33", "2"], ["RC34", "2"], ["RC35", "2"], ["RC36", "2"], ["RD9", "1"], ["RJ20", "10"], ["RJ20", "17"], ["RJ20", "23"], ["RC37", "2"], ["RC38", "2"], ["RC39", "2"], ["RD10", "4"], ["RC40", "2"], ["RD11", "4"], ["RC41", "2"], ["RD12", "4"], ["RC42", "2"], ["RD13", "4"], ["RC43", "2"], ["RD14", "4"], ["RC44", "2"], ["RD15", "4"], ["RC45", "2"], ["RD16", "4"], ["RC46", "2"], ["RD17", "4"], ["RC47", "2"], ["RD18", "4"], ["RC48", "2"], ["RD19", "4"], ["RC49", "2"]]}, + {name: "Rv3v3", pads: [["RU1", "12"], ["RU1", "5"], ["RU1", "8"], ["RC1", "1"], ["RC2", "1"], ["RU2", "3"], ["RC4", "1"], ["RTP3", "1"], ["RU6", "2"], ["RC12", "1"], ["RC13", "1"], ["RJ16", "1"], ["RR3", "1"], ["RU7", "1"], ["RU7", "24"], ["RU7", "36"], ["RU7", "48"], ["RU7", "9"], ["RC15", "1"], ["RC16", "1"], ["RC17", "1"], ["RC18", "1"], ["RC19", "1"], ["RC20", "1"], ["RJ17", "1"], ["RU8", "1"], ["RU8", "10"], ["RU8", "22"], ["RU8", "33"], ["RU8", "42"], ["RU8", "43"], ["RU8", "44"], ["RU8", "48"], ["RU8", "49"], ["RC21", "1"], ["RC22", "1"], ["RC23", "1"], ["RC24", "1"], ["RC25", "1"], ["RC26", "1"], ["RC27", "1"], ["RC28", "1"], ["RU9", "8"], ["RC29", "1"], ["RJ18", "1"], ["RR4", "1"], ["RR5", "1"], ["RJ19", "13"], ["RJ19", "17"], ["RJ19", "8"], ["RC35", "1"], ["RJ20", "14"], ["RC37", "1"], ["RR14", "1"]]}, {name: "Rv14", pads: [["RR1", "1"], ["RC5", "2"], ["RD1", "1"], ["RC7", "1"], ["RTP4", "1"], ["RJ19", "27"], ["RJ19", "5"], ["RC36", "1"]]}, {name: "Rv2v5", pads: [["RU4", "2"], ["RC9", "1"], ["RJ20", "21"]]}, {name: "Rv1v2", pads: [["RU5", "2"], ["RC11", "1"], ["RJ20", "15"]]}, @@ -656,20 +656,19 @@ board.setNetlist([ {name: "Rmcu.program_uart_node.b_tx", pads: [["RU6", "36"], ["RJ16", "4"]]}, {name: "Rmcu.program_en_node", pads: [["RU6", "3"], ["RJ16", "6"], ["RR3", "2"], ["RC14", "1"]]}, {name: "Rmcu.program_boot_node", pads: [["RU6", "27"], ["RJ16", "2"]]}, - {name: "Rmcu_servo.swd_node.swdio", pads: [["RJ17", "2"], ["RU7", "34"]]}, - {name: "Rmcu_servo.swd_node.swclk", pads: [["RJ17", "4"], ["RU7", "37"]]}, - {name: "Rmcu_servo.reset_node", pads: [["RU6", "12"], ["RJ17", "3"], ["RU7", "7"]]}, - {name: "Rmcu_servo.swd.swo", pads: [["RJ17", "6"], ["RU7", "42"]]}, + {name: "Rmcu_servo.swd_node.swdio", pads: [["RU7", "34"], ["RJ17", "2"]]}, + {name: "Rmcu_servo.swd_node.swclk", pads: [["RU7", "37"], ["RJ17", "4"]]}, + {name: "Rmcu_servo.reset_node", pads: [["RU6", "12"], ["RU7", "7"], ["RJ17", "3"]]}, {name: "Rmcu_servo.ic.osc.xtal_in", pads: [["RU7", "5"]]}, {name: "Rmcu_servo.ic.osc.xtal_out", pads: [["RU7", "6"]]}, + {name: "Rmcu_servo.swd.swo", pads: [["RU7", "42"], ["RJ17", "6"]]}, {name: "Rmcu_test.gpio.led_0", pads: [["RU8", "4"], ["RD4", "2"]]}, {name: "Rmcu_test.gpio.led_1", pads: [["RU8", "12"], ["RD5", "2"]]}, {name: "Rmcu_test.gpio.led_2", pads: [["RU8", "14"], ["RD6", "2"]]}, {name: "Rmcu_test.gpio.led_3", pads: [["RU8", "16"], ["RD7", "2"]]}, - {name: "Rmcu_test.swd_node.swdio", pads: [["RJ18", "2"], ["RU8", "25"]]}, - {name: "Rmcu_test.swd_node.swclk", pads: [["RJ18", "4"], ["RU8", "24"]]}, - {name: "Rmcu_test.reset_node", pads: [["RJ18", "3"], ["RU8", "26"]]}, - {name: "Rmcu_test.swd.swo", pads: [["RJ18", "6"], ["RU8", "2"]]}, + {name: "Rmcu_test.swd_node.swdio", pads: [["RU8", "25"], ["RJ18", "2"]]}, + {name: "Rmcu_test.swd_node.swclk", pads: [["RU8", "24"], ["RJ18", "4"]]}, + {name: "Rmcu_test.reset_node", pads: [["RU8", "26"], ["RJ18", "3"]]}, {name: "Rmcu_test.ic.dvdd", pads: [["RU8", "23"], ["RU8", "45"], ["RU8", "50"], ["RC30", "1"], ["RC31", "1"], ["RC32", "1"]]}, {name: "Rmcu_test.ic.qspi.sck", pads: [["RU8", "52"], ["RU9", "6"]]}, {name: "Rmcu_test.ic.qspi.mosi", pads: [["RU8", "53"], ["RU9", "5"]]}, @@ -679,6 +678,7 @@ board.setNetlist([ {name: "Rmcu_test.ic.qspi_sd3", pads: [["RU8", "51"], ["RU9", "7"]]}, {name: "Rmcu_test.ic.xosc.xtal_in", pads: [["RU8", "20"]]}, {name: "Rmcu_test.ic.xosc.xtal_out", pads: [["RU8", "21"]]}, + {name: "Rmcu_test.swd.swo", pads: [["RU8", "27"], ["RJ18", "6"]]}, {name: "Rled.signal", pads: [["RU6", "33"], ["RD2", "2"]]}, {name: "Rled.package.k", pads: [["RD2", "1"], ["RR6", "1"]]}, {name: "Rservo_led.signal", pads: [["RU7", "33"], ["RD3", "2"]]}, From 0ae7205e497235100f36b738685225cfd2b507df Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Mon, 25 May 2026 13:32:57 -0700 Subject: [PATCH 23/26] docs --- edg/abstract_parts/IoController.py | 2 ++ edg/parts/microcontroller/Rp2040.py | 5 ++--- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/edg/abstract_parts/IoController.py b/edg/abstract_parts/IoController.py index cfce4575a..497b9de2b 100644 --- a/edg/abstract_parts/IoController.py +++ b/edg/abstract_parts/IoController.py @@ -154,6 +154,8 @@ def connect_port_transformed(self_io: BasePort, inner_io: BasePort, name: str) - if isinstance(self_io, Vector): assert isinstance(inner_io, Vector) if transform_fn is None: + # TODO: this eats up the entire inner_io, requiring a hack to add additional items to inner_io + # using inner_io.request_vector is not yet supported self.connect(self_io, inner_io) else: self_io.defined() diff --git a/edg/parts/microcontroller/Rp2040.py b/edg/parts/microcontroller/Rp2040.py index 697d0407b..c4ce7bce4 100644 --- a/edg/parts/microcontroller/Rp2040.py +++ b/edg/parts/microcontroller/Rp2040.py @@ -356,9 +356,8 @@ def usb_export_transform(self_io: BasePort, assign: Optional[str]) -> Optional[B self.connect(self_io, self.usb_res.exterior) return self.usb_res.interior - self._wrap_inner( - self.ic, {UsbDevicePort: usb_export_transform, DigitalBidir: lambda port, assign: port} - ) # passthrough but keeps the vector open for SWD + # add a passthrough for gpio (DigitalBidir) to allow the SWD pins to be attached, if using + self._wrap_inner(self.ic, {UsbDevicePort: usb_export_transform, DigitalBidir: lambda port, assign: port}) if self.get(self.reset.is_connected()): self.connect(self.reset, self.ic.run) From dd045419afbe97f92ce9c233343fb57ca29b9185 Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Mon, 25 May 2026 13:56:23 -0700 Subject: [PATCH 24/26] Update IoController.py --- edg/abstract_parts/IoController.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/edg/abstract_parts/IoController.py b/edg/abstract_parts/IoController.py index 497b9de2b..1e896b349 100644 --- a/edg/abstract_parts/IoController.py +++ b/edg/abstract_parts/IoController.py @@ -106,7 +106,8 @@ def _export_ios_inner( If returned (transformed) port is None, the connection is discarded (though connections can be made within the transform function as a side effect). Otherwise, the returned port is connected to the inner port. - If this function is used, this must be a GeneratorBlock. + If this function is used, this must be a GeneratorBlock and the transformed port requested()s and + device pin_assigns must be generator params. Returns the filtered pin assigns, to pass into the inner block's pin assign. From 0884294a6c910dfa08b64d7370a8fedf93a490fe Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Mon, 25 May 2026 15:13:51 -0700 Subject: [PATCH 25/26] cleaning --- edg/abstract_parts/IoController.py | 2 +- edg/abstract_parts/IoControllerWrapped.py | 2 +- examples/test_blinky.py | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/edg/abstract_parts/IoController.py b/edg/abstract_parts/IoController.py index 1e896b349..b1946f1b7 100644 --- a/edg/abstract_parts/IoController.py +++ b/edg/abstract_parts/IoController.py @@ -185,7 +185,7 @@ def _wrap_inner( inner_pin_assigns = self._export_ios_inner(inner, transforms) self.assign(inner.pin_assigns, inner_pin_assigns) self.assign(self.actual_pin_assigns, inner.actual_pin_assigns) - self.assign(self.io_current_draw, self.ic.io_current_draw) + self.assign(self.io_current_draw, inner.io_current_draw) def _export_tap_ios_inner(self, inner: "BaseIoController") -> None: """Export-taps all IO ports from some inner BaseIoController. diff --git a/edg/abstract_parts/IoControllerWrapped.py b/edg/abstract_parts/IoControllerWrapped.py index 2e750544b..7202b3347 100644 --- a/edg/abstract_parts/IoControllerWrapped.py +++ b/edg/abstract_parts/IoControllerWrapped.py @@ -60,5 +60,5 @@ def remap_port_recursive(port: Port, prefix: str = "") -> None: def _remap_assigns_to_value(self, assigns: Dict[str, str]) -> List[str]: """Given a dict of pin assigns from _remap_pinning_assigns, returns a list of assign strings - eefor use in self.actual_pin_assigns""" + for use in self.actual_pin_assigns""" return [f"{name}={assign}" for name, assign in assigns.items()] diff --git a/examples/test_blinky.py b/examples/test_blinky.py index 4e81d0676..8a8b545d9 100644 --- a/examples/test_blinky.py +++ b/examples/test_blinky.py @@ -20,7 +20,7 @@ def contents(self) -> None: class TestBlinkyBasic(SimpleBoardTop): - """The simplest cirucit, a microcontroller dev board with a LED. + """The simplest circuit, a microcontroller dev board with a LED. This also tests the dev board wrapper concept.""" @override From 3c5205e06468647c91b98ca831dc10b8e14da64b Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Mon, 25 May 2026 15:16:17 -0700 Subject: [PATCH 26/26] Update test_blinky.py --- examples/test_blinky.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/test_blinky.py b/examples/test_blinky.py index 8a8b545d9..39a5fdff2 100644 --- a/examples/test_blinky.py +++ b/examples/test_blinky.py @@ -37,7 +37,7 @@ class TestBlinkyEmpty(SimpleBoardTop): class TestBlinkyBasicBattery(SimpleBoardTop): - """The simplest cirucit, a microcontroller dev board with a LED, powered from a battery""" + """The simplest circuit, a microcontroller dev board with a LED, powered from a battery""" @override def contents(self) -> None: