Support multi-pin assigns in footprint pinning

edg/abstract_parts/BaseIoControllerWrapped.py

@@ -121,8 +121,10 @@ def _remap_assigns_to_value(assigns: Dict[str, Tuple[Optional[str], Optional[str
         return pin_assigns
 
     def _make_pinning(
-        self, fixed_pinning: Dict[str, Union[Passive, HasPassivePort]], remapping: Dict[str, str]
-    ) -> Dict[str, Union[Passive, HasPassivePort]]:
+        self,
+        fixed_pinning: Mapping[Union[Iterable[str], str], Union[Passive, HasPassivePort]],
+        remapping: Dict[str, str],
+    ) -> Mapping[Union[Iterable[str], str], Union[Passive, HasPassivePort]]:
         """Creates the footprint pinning dict for the wrapped footprint, given the fixed pinning and
         remapping from pin name to this footprint's pin number.
         This generates pinning for all BaseIoController IOs.
@@ -132,9 +134,10 @@ def _make_pinning(
         """
         remapped_pin_assigns = self._remap_model_pin_assigns(remapping, self.get(self.pin_assigns))
         pin_dict = self._generator_pin_dict()
-        fixed_pinning.update(self._remap_to_footprint_pinning(remapped_pin_assigns, pin_dict))
+        pinning = dict(fixed_pinning)
+        pinning.update(self._remap_to_footprint_pinning(remapped_pin_assigns, pin_dict))
         self.assign(self.actual_pin_assigns, self._remap_assigns_to_value(remapped_pin_assigns))
-        return fixed_pinning
+        return pinning
 
 
 class BaseIoControllerWrapper(BaseIoController):

edg/abstract_parts/IoController.py

@@ -1,5 +1,5 @@
 from itertools import chain
-from typing import List, Dict, Tuple, Type, Optional, Any, Union, Callable
+from typing import List, Dict, Tuple, Type, Optional, Any, Union, Callable, Mapping, Iterable
 from typing_extensions import override
 from deprecated import deprecated
 
@@ -272,15 +272,15 @@ def contents(self) -> None:
         self.generator_param(self.pin_assigns)
         self._generator_param_all_ios()  # defined in contents() so subclass __init__ can define additional _io_ports
 
-    def _system_pinmap(self) -> Dict[str, Union[Passive, HasPassivePort]]:
+    def _system_pinmap(self) -> Mapping[Union[Iterable[str], str], Union[Passive, HasPassivePort]]:
         """Implement me. Defines the fixed pin mappings from pin number to port."""
         raise NotImplementedError
 
     def _io_pinmap(self) -> PinMapUtil:
         """Implement me. Defines the assignable IO pinmaps."""
         raise NotImplementedError
 
-    def _make_pinning(self) -> Dict[str, Union[Passive, HasPassivePort]]:
+    def _make_pinning(self) -> Mapping[Union[Iterable[str], str], Union[Passive, HasPassivePort]]:
         allocation_list = []
         for io_port in self._io_ports:
             if isinstance(io_port, Vector):  # derive Vector connections from requested

edg/electronics_model/CircuitBlock.py

@@ -1,6 +1,6 @@
 from __future__ import annotations
 
-from typing import Generic, Any, Optional, List, Mapping, Dict, Union, TYPE_CHECKING
+from typing import Generic, Any, Optional, Mapping, Dict, Union, TYPE_CHECKING, Tuple, Iterable, overload, Set
 
 from deprecated import deprecated
 from typing_extensions import TypeVar, override
@@ -36,12 +36,42 @@ def __init__(self, *args: Any, **kwargs: Any) -> None:
         self.fp_pnp_offset_x = self.Parameter(FloatExpr())
         self.fp_pnp_offset_y = self.Parameter(FloatExpr())
 
-    # TODO: allow value to be taken from parameters, ideally w/ string concat from params
+    @overload
     def footprint(
         self,
         refdes: StringLike,
         footprint: StringLike,
-        pinning: Mapping[str, Union["Passive", "HasPassivePort"]],
+        pinning: Mapping[str, Union[Passive, HasPassivePort]],
+        mfr: Optional[StringLike] = None,
+        part: Optional[StringLike] = None,
+        value: Optional[StringLike] = None,
+        datasheet: Optional[StringLike] = None,
+        pnp_rot: Optional[float] = None,
+        pnp_offset: Optional[tuple[float, float]] = None,
+    ) -> None: ...
+
+    @overload
+    def footprint(
+        self,
+        refdes: StringLike,
+        footprint: StringLike,
+        pinning: Mapping[Union[Iterable[str], str], Union[Passive, HasPassivePort]],
+        mfr: Optional[StringLike] = None,
+        part: Optional[StringLike] = None,
+        value: Optional[StringLike] = None,
+        datasheet: Optional[StringLike] = None,
+        pnp_rot: Optional[float] = None,
+        pnp_offset: Optional[tuple[float, float]] = None,
+    ) -> None: ...
+
+    def footprint(
+        self,
+        refdes: StringLike,
+        footprint: StringLike,
+        pinning: Union[
+            Mapping[str, Union[Passive, HasPassivePort]],
+            Mapping[Union[Iterable[str], str], Union[Passive, HasPassivePort]],
+        ],
         mfr: Optional[StringLike] = None,
         part: Optional[StringLike] = None,
         value: Optional[StringLike] = None,
@@ -75,12 +105,21 @@ def footprint(
         self.fp_is_footprint = self.Metadata("")
 
         pinning_array = []
+        assigned_pins: Set[str] = set()
         for pin_name, pin_port in pinning.items():
             if isinstance(pin_port, HasPassivePort):
                 pin_port = pin_port.net
             if not isinstance(pin_port, (CircuitPort, Passive)):
                 raise EdgTypeError(f"Footprint(...) pin", pin_port, Passive)
-            pinning_array.append(f"{pin_name}={pin_port._name_from(self)}")
+
+            if isinstance(pin_name, str):
+                pin_tuples: Tuple[str, ...] = (pin_name,)
+            else:
+                pin_tuples = tuple(iter(pin_name))
+            for pin in pin_tuples:
+                pinning_array.append(f"{pin}={pin_port._name_from(self)}")
+                assert pin not in assigned_pins, f"duplicate pin name {pin} in footprint pinning"
+                assigned_pins.add(pin)
         self.assign(self.fp_pinning, pinning_array)
 
         self.assign(self.fp_footprint, footprint)

edg/electronics_model/KiCadSchematicBlock.py

@@ -86,12 +86,11 @@ def __init__(
     @override
     def generate(self) -> None:
         super().generate()
-        mapping = {pin_name: self.ports.append_elt(Passive(), pin_name) for pin_name in self.get(self.kicad_pins)}
         self.ports.defined()
         self.footprint(
             self.kicad_refdes_prefix,
             self.kicad_footprint,
-            mapping,
+            {pin_name: self.ports.append_elt(Passive(), pin_name) for pin_name in self.get(self.kicad_pins)},
             part=self.kicad_part,
             value=self.kicad_value,
             datasheet=self.kicad_datasheet,

edg/parts/connector/UsbPorts.py

@@ -61,22 +61,14 @@ def contents(self) -> None:
             "J",
             "Connector_USB:USB_C_Receptacle_XKB_U262-16XN-4BVC11",
             {
-                "A1": self.gnd,
-                "B12": self.gnd,
-                "A4": self.pwr,
-                "B9": self.pwr,
-                "A5": self.cc.cc1,
-                "A6": self.usb.dp,
-                "A7": self.usb.dm,
+                ("A1", "B12", "B1", "A12"): self.gnd,
+                ("A4", "B9", "B4", "A9"): self.pwr,
+                ("A6", "B6"): self.usb.dp,
+                ("A7", "B7"): self.usb.dm,
                 # 'A8': sbu1,
                 # 'B8': sbu2
-                "B7": self.usb.dm,
-                "B6": self.usb.dp,
+                "A5": self.cc.cc1,
                 "B5": self.cc.cc2,
-                "B4": self.pwr,
-                "A9": self.pwr,
-                "B1": self.gnd,
-                "A12": self.gnd,
                 "S1": self.shield,
             },
             mfr="Sparkfun",

edg/parts/display/oled/Nhd_312_25664uc.py

@@ -43,16 +43,11 @@ def contents(self) -> None:
                 "2": self.vdd,
                 # '3':  # no connect
                 "4": self.dc,
-                "5": self.vss,  # R/nW in parallel interface
-                "6": self.vss,  # E/nRD in parallel interface
+                ("5", "6"): self.vss,  # R/nW, E/nRD in parallel interface
                 "7": self.sclk,
                 "8": self.sdin,
                 # '9'  # no connect  # DB2 in parallel interface
-                "10": self.vss,  # DB3 in parallel interface
-                "11": self.vss,  # DB4 in parallel interface
-                "12": self.vss,  # DB5 in parallel interface
-                "13": self.vss,  # DB6 in parallel interface
-                "14": self.vss,  # DB7 in parallel interface
+                ("10", "11", "12", "13", "14"): self.vss,  # DB3-DB7 in parallel interface
                 # '15':  # no connect
                 "16": self.nres,
                 "17": self.ncs,

edg/parts/human_interface/Joystick_Xbox.py

@@ -30,12 +30,9 @@ def contents(self) -> None:
             "edg:Joystick_XboxElite2",
             {
                 "1": self.sw,
-                "2": self.gnd,
-                "3": self.gnd,
+                ("2", "3", "8"): self.gnd,
+                ("5", "6"): self.pwr,
                 "4": self.ax1,
-                "5": self.pwr,
-                "6": self.pwr,
                 "7": self.ax2,
-                "8": self.gnd,
             },
         )

edg/parts/interface/UsbInterface_Ft232h.py

@@ -94,22 +94,11 @@ def contents(self) -> None:
                 "37": self.vcca,
                 "38": self.vcccore,
                 "39": self.vccd,
-                "12": self.vccio,
-                "24": self.vccio,
-                "46": self.vccio,
+                ("12", "24", "46"): self.vccio,
                 "8": self.vpll,
                 "3": self.vphy,
-                "4": self.gnd,  # AGND
-                "9": self.gnd,  # AGND
-                "41": self.gnd,  # AGND
-                "10": self.gnd,
-                "11": self.gnd,
-                "22": self.gnd,
-                "23": self.gnd,
-                "35": self.gnd,
-                "36": self.gnd,
-                "47": self.gnd,
-                "48": self.gnd,
+                ("4", "9", "41"): self.gnd,  # AGND
+                ("10", "11", "22", "23", "35", "36", "47", "48"): self.gnd,
                 "1": self.osc.xtal_in,
                 "2": self.osc.xtal_out,
                 "5": self.ref,

edg/parts/interface/UsbPd_Fusb302b.py

@@ -34,19 +34,16 @@ def contents(self) -> None:
             {
                 "1": self.cc.cc2,
                 "2": self.vbus,
-                "3": self.vdd,
-                "4": self.vdd,
+                ("3", "4"): self.vdd,
                 "5": self.int_n,
                 "6": self.i2c.scl,
                 "7": self.i2c.sda,
-                "8": self.gnd,
-                "9": self.gnd,
+                ("8", "9", "15"): self.gnd,
                 "10": self.cc.cc1,
                 "11": self.cc.cc1,
                 "12": self.vconn,
                 "13": self.vconn,
                 "14": self.cc.cc2,
-                "15": self.gnd,
             },
             mfr="ON Semiconductor",
             part="FUSB302B11MPX",  # actual several compatible variants

edg/parts/microcontroller/Esp32.py

@@ -114,13 +114,10 @@ def generate(self) -> None:
         )
 
     @override
-    def _system_pinmap(self) -> Dict[str, Union[Passive, HasPassivePort]]:
+    def _system_pinmap(self) -> Mapping[Union[Iterable[str], str], Union[Passive, HasPassivePort]]:
         return {
             "2": self.pwr,
-            "1": self.gnd,
-            "15": self.gnd,
-            "38": self.gnd,
-            "39": self.gnd,  # EP
+            ("1", "15", "38", "39"): self.gnd,
             "3": self.chip_pu,
             "25": self.io0,
             "24": self.io2,
@@ -267,7 +264,6 @@ class Esp32_Wroom_32(
 
     def __init__(self) -> None:
         super().__init__()
-        self.ic: Esp32_Wroom_32_Device
         self.generator_param(self.reset.is_connected())
 
     @override

edg/parts/microcontroller/Esp32c3.py

@@ -36,10 +36,9 @@ class Esp32c3_Device(Esp32c3_Interfaces, BaseIoControllerPinmapGenerator, Intern
     }
 
     @override
-    def _system_pinmap(self) -> Dict[str, Union[Passive, HasPassivePort]]:
+    def _system_pinmap(self) -> Mapping[Union[Iterable[str], str], Union[Passive, HasPassivePort]]:
         return {
-            "31": self.vdda,
-            "32": self.vdda,
+            ("31", "32"): self.vdda,
             "33": self.gnd,
             "6": self.io2,
             "7": self.en,
@@ -51,8 +50,7 @@ def _system_pinmap(self) -> Dict[str, Union[Passive, HasPassivePort]]:
             "11": self.vdd3p3_rtc,
             "17": self.vdd3p3_cpu,
             "18": self.vdd_spi,
-            "2": self.vdd3p3,
-            "3": self.vdd3p3,
+            ("2", "3"): self.vdd3p3,
             "30": self.xtal.xtal_in,
             "29": self.xtal.xtal_out,
         }
@@ -216,7 +214,6 @@ class Esp32c3(
 
     def __init__(self) -> None:
         super().__init__()
-        self.ic: Esp32c3_Device
         self.generator_param(self.reset.is_connected(), self.pin_assigns, self.gpio.requested())
 
         self._io2_ext_connected: bool = False
@@ -436,7 +433,6 @@ class Esp32c3_Wroom02(
 
     def __init__(self) -> None:
         super().__init__()
-        self.ic: Esp32c3_Wroom02_Device
         self.generator_param(self.reset.is_connected(), self.pin_assigns, self.gpio.requested())
 
         self._io2_ext_connected: bool = False

edg/parts/microcontroller/Esp32s3.py

@@ -112,11 +112,10 @@ def generate(self) -> None:
         )
 
     @override
-    def _system_pinmap(self) -> Dict[str, Union[Passive, HasPassivePort]]:
+    def _system_pinmap(self) -> Mapping[Union[Iterable[str], str], Union[Passive, HasPassivePort]]:
         return {
             "2": self.pwr,  # including VDD3V3, VDD3P3_RTC, VDD_SPI, VDD3P3_CPU
-            "1": self.gnd,
-            "40": self.gnd,
+            ("1", "40"): self.gnd,
             "41": self.gnd,  # EP
             "3": self.chip_pu,
             "27": self.io0,
@@ -314,7 +313,6 @@ def __init__(self, **kwargs: Any) -> None:
         self.gnd = self.Port(Ground.empty(), optional=True)
         self.v3v3 = self.Port(Passive.empty(), optional=True)
         self.vusb = self.Port(Passive.empty(), optional=True)  # VUsb
-        self.cam_sccb = self.Port(I2cController.empty(), optional=True)  # internally connected to camera
         self.generator_param(self.pin_assigns)
         self._generator_param_all_ios()
 
@@ -330,8 +328,6 @@ def generate(self) -> None:
                     "1": self.v3v3,
                     "21": self.gnd,
                     "20": self.vusb,
-                    "3": self.cam_sccb.sda,
-                    "4": self.cam_sccb.scl,
                 },
                 self._PIN_REMAPPING,
             ),

edg/parts/microcontroller/Ice40up.py

@@ -139,13 +139,11 @@ def __init__(self, **kwargs: Any) -> None:
         self.spi_config_cs = self.Port(self._dpio1_model)
 
     @override
-    def _system_pinmap(
-        self,
-    ) -> Dict[str, Union[Passive, HasPassivePort]]:  # names consistent with pinout spreadsheet
+    def _system_pinmap(self) -> Mapping[Union[Iterable[str], str], Union[Passive, HasPassivePort]]:
+        # names consistent with pinout spreadsheet
         return {
             "29": self.vcc_pll,
-            "5": self.vcc,
-            "30": self.vcc,
+            ("5", "30"): self.vcc,
             "22": self.vccio_1,
             "33": self.vccio_0,
             "1": self.vccio_2,

edg/parts/microcontroller/Lpc1549.py

@@ -5,6 +5,10 @@
 from ...circuits import *
 from ...vendor_parts.jlc.JlcPart import JlcPart
 
+# This file uses an old style that uses inheritance to allow variations of the same chip.
+# This is no longer used elsewhere.
+# TODO: find a unified way to support variations of the same chip
+
 
 @non_library
 class Lpc1549Base_Device(
@@ -58,7 +62,7 @@ def __init__(self, **kwargs: Any) -> None:
         self._io_ports.insert(0, self.swd)
 
     @override
-    def _system_pinmap(self) -> Dict[str, Union[Passive, HasPassivePort]]:
+    def _system_pinmap(self) -> Mapping[Union[Iterable[str], str], Union[Passive, HasPassivePort]]:
         return VariantPinRemapper(
             {
                 "VddA": self.pwr,
@@ -75,7 +79,9 @@ def _system_pinmap(self) -> Dict[str, Union[Passive, HasPassivePort]]:
                 "RTCXOUT": self.xtal_rtc.xtal_out,
                 "RESET": self.reset,
             }
-        ).remap(self.SYSTEM_PIN_REMAP)
+        ).remap(
+            self.SYSTEM_PIN_REMAP
+        )  # type: ignore
 
     @override
     def _io_pinmap(self) -> PinMapUtil: