feat: MISRA-C CI, stack usage analysis, hw benchmark configs

[tbitcs]

MISRA-C CI, Stack Usage Analysis & Hardware Benchmark Configs

Implements REQ-BUILD-003 (MISRA-C analysis CI) and REQ-ARCH-040 (hardware benchmark configurations).

Changes

MISRA-C CI job (.github/workflows/ci.yml)

• New misra job running cppcheck with MISRA C 2012 addon
• Falls back to --enable=all built-in checks if the MISRA addon is unavailable
• Suppresses known intentional deviations (Rules 1.1, 20.9, 21.6)
• Gates on zero errors (warnings OK)

Stack usage analysis (.github/workflows/ci.yml)

• Adds -DEXTRA_CFLAGS=-fstack-usage to twister unit test builds
• Post-build step checks no function exceeds 512-byte stack limit
• Uploads .su files as separate CI artifact

MISRA deviations doc (docs/safety/MISRA_DEVIATIONS.md)

• Documents Rules 1.1, 11.3, 14.3, 20.9, 21.6 with rationale and location
• Defines process for adding new deviations

Hardware benchmark ( ests/benchmarks/hw_benchmark/)

• Cycle-accurate PID benchmark using DWT CYCCNT on Cortex-M
• Falls back to clock_gettime on native_sim
• Board overlays for nucleo_f446re and nucleo_h743zi
• testcase.yaml with platform_allow for both boards + native_sim
• README with build/flash/capture instructions

Test Results

• pytest: 63 passed, 1 skipped (placeholder golden vector)

Conversation: https://app.warp.dev/conversation/0c1afc16-259c-435a-9140-5e87c7d022ec
Run: https://oz.warp.dev/runs/019e88b0-c5e8-7189-b1f6-4660beea2e8d

This PR was generated with Oz.