@@ -67,25 +67,77 @@ static const flash_layout_t flash_layout[] = {
6767};
6868// must be able to hold a full page (for re-writing upon erase)
6969static uint32_t page_buffer [FLASH_PAGE_SIZE / 4 ] = {0x0 };
70+
71+ static void icc_flush (void ) {
72+ // Flush all instruction cache
73+ // ME18 has bug where top-level sysctrl flush bit only works once.
74+ // Have to use low-level flush bits for each ICC instance.
75+ MXC_ICC_Flush (MXC_ICC0 );
76+ }
77+ static void icc_enable (void ) {
78+ MXC_ICC_Enable (MXC_ICC0 );
79+ }
80+ static void icc_disable (void ) {
81+ MXC_ICC_Disable (MXC_ICC0 );
82+ }
83+
84+ static void flash_lock (void ) {
85+ MXC_FLC0 -> ctrl |= MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED ;
86+ MXC_FLC1 -> ctrl |= MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED ;
87+ }
88+
7089#elif defined(MAX32650 )
7190static const flash_layout_t flash_layout [] = {
7291 { 0x10000000 , FLASH_PAGE_SIZE , 192 },
7392};
7493// must be able to hold a full page (for re-writing upon erase)
7594static uint32_t page_buffer [FLASH_PAGE_SIZE / 4 ] = {0x0 };
95+
96+ static void icc_flush (void ) {
97+ // Flush all instruction cache
98+ MXC_ICC_Flush ();
99+ }
100+ static void icc_enable (void ) {
101+ MXC_ICC_Enable ();
102+ }
103+ static void icc_disable (void ) {
104+ MXC_ICC_Disable ();
105+ }
106+
107+ static void flash_lock (void ) {
108+ MXC_FLC -> ctrl |= MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED ;
109+ }
76110#elif defined(MAX32665 )
77- // MAX32666 has two flash banks, but we do not actually need to
111+ // MAX32666 has two flash banks, but we do not actually need to
78112// treat them separately
79113static const flash_layout_t flash_layout [] = {
80114 { 0x10000000 , FLASH_PAGE_SIZE , 64 },
81115 { 0x10080000 , FLASH_PAGE_SIZE , 64 },
82116};
83117// must be able to hold a full page (for re-writing upon erase)
84118static uint32_t page_buffer [FLASH_PAGE_SIZE / 4 ] = {0x0 };
119+
120+ static void icc_flush (void ) {
121+ // Flush all instruction cache
122+ MXC_ICC_Flush ();
123+ }
124+ static void icc_enable (void ) {
125+ MXC_ICC_Enable ();
126+ }
127+ static void icc_disable (void ) {
128+ MXC_ICC_Disable ();
129+ }
130+
131+ static void flash_lock (void ) {
132+ MXC_FLC0 -> cn |= MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED ;
133+ MXC_FLC1 -> cn |= MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED ;
134+ }
85135#else
86136#error "Invalid BOARD. Please set BOARD equal to any board under 'boards/'."
87137#endif
88138
139+
140+
89141static inline int32_t block2addr (uint32_t block ) {
90142 if (block >= 0 && block < INTERNAL_FLASH_FILESYSTEM_NUM_BLOCKS ) {
91143 return CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR + block * FILESYSTEM_BLOCK_SIZE ;
@@ -110,9 +162,9 @@ int flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size) {
110162 flash_layout_t bank = flash_layout [i ];
111163
112164 // Determine if the flash bank is a hit for this address
113- if ((addr >= bank .base_addr ) &&
165+ if ((addr >= bank .base_addr ) &&
114166 (addr < bank .base_addr + bank .sector_size * bank .num_sectors )
115- ) {
167+ ) {
116168 // Assign the sector index assuming uniform sector sizes
117169 sector_index = i * bank .num_sectors + ((addr - bank .base_addr ) / bank .sector_size );
118170 * start_addr = flash_layout [0 ].base_addr + (sector_index * bank .sector_size );
@@ -137,12 +189,7 @@ uint32_t supervisor_flash_get_block_count(void) {
137189}
138190
139191void port_internal_flash_flush (void ) {
140-
141- // Flush all instruction cache
142- // ME18 has bug where top-level sysctrl flush bit only works once.
143- // Have to use low-level flush bits for each ICC instance.
144- MXC_ICC_Flush (MXC_ICC0 );
145- MXC_ICC_Flush (MXC_ICC1 );
192+ icc_flush ();
146193
147194 // Clear the line fill buffer by reading 2 pages from flash
148195 volatile uint32_t * line_addr ;
@@ -199,7 +246,7 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num,
199246 blocks_left = (page_size - (dest_addr - page_start )) / FILESYSTEM_BLOCK_SIZE ;
200247 count = MIN (num_blocks , blocks_left );
201248
202- MXC_ICC_Disable ( MXC_ICC0 );
249+ icc_disable ( );
203250
204251 // Buffer the page of flash to erase
205252 MXC_FLC_Read (page_start , page_buffer , page_size );
@@ -209,11 +256,7 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num,
209256 error = MXC_FLC_PageErase (dest_addr );
210257 );
211258 if (error != E_NO_ERROR ) {
212- // lock flash & reset
213- MXC_FLC0 -> ctrl = (MXC_FLC0 -> ctrl & ~MXC_F_FLC_REVA_CTRL_UNLOCK ) | MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED ;
214- #if defined(MAX32666 )
215- MXC_FLC1 -> ctrl = (MXC_FLC1 -> ctrl & ~MXC_F_FLC_REVA_CTRL_UNLOCK ) | MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED ;
216- #endif
259+ flash_lock ();
217260 reset_into_safe_mode (SAFE_MODE_FLASH_WRITE_FAIL );
218261 }
219262
@@ -228,14 +271,11 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num,
228271 );
229272 if (error != E_NO_ERROR ) {
230273 // lock flash & reset
231- MXC_FLC0 -> ctrl = (MXC_FLC0 -> ctrl & ~MXC_F_FLC_REVA_CTRL_UNLOCK ) | MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED ;
232- #if defined(MAX32666 )
233- MXC_FLC1 -> ctrl = (MXC_FLC1 -> ctrl & ~MXC_F_FLC_REVA_CTRL_UNLOCK ) | MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED ;
234- #endif
274+ flash_lock ();
235275 reset_into_safe_mode (SAFE_MODE_FLASH_WRITE_FAIL );
236276 }
237277
238- MXC_ICC_Enable ( MXC_ICC0 );
278+ icc_enable ( );
239279
240280 block_num += count ;
241281 src += count * FILESYSTEM_BLOCK_SIZE ;
0 commit comments