diff --git a/ASF/My Project.atzip b/ASF/My Project.atzip new file mode 100644 index 0000000..1c46347 Binary files /dev/null and b/ASF/My Project.atzip differ diff --git a/ASF/New.atstart b/ASF/New.atstart new file mode 100644 index 0000000..dc6093d --- /dev/null +++ b/ASF/New.atstart @@ -0,0 +1,2368 @@ +format_version: '2' +name: My Project +versions: + api: '1.0' + backend: 1.9.698 + commit: '' + content: unknown + content_pack_name: unknown + format: '2' + frontend: 1.9.698 + packs_version_avr8: 1.0.1463 + packs_version_qtouch: unknown + packs_version_sam: 1.0.1726 + version_backend: 1.9.698 + version_frontend: '' +board: + identifier: CustomBoard + device: SAMD51P20A-AF +details: null +application: null +middlewares: + FREERTOS_V1000_0: + user_label: FREERTOS_V1000_0 + configuration: + freertos_advanced: true + freertos_check_for_stack_overflow: true + freertos_etaskgetstate: false + freertos_generate_run_time_stats: false + freertos_max_co_routine_priorities: 2 + freertos_max_priorities: 5 + freertos_minimal_stack_size: 64 + freertos_pctaskgettaskname: true + freertos_tick_rate_hz: 1000 + freertos_timer_task_priority: 2 + freertos_timer_task_stack_depth: 64 + freertos_total_heap_size: 2400 + freertos_use_16_bit_ticks: false + freertos_use_application_task_tag_functions: false + freertos_use_co_routines: false + freertos_use_counting_semaphores: false + freertos_use_idle_hook: false + freertos_use_malloc_failed_hook: false + freertos_use_mutexes: true + freertos_use_port_optimised_functions: false + freertos_use_preemption: true + freertos_use_recursive_mutexes: false + freertos_use_stats_formatting_functions: true + freertos_use_tick_hook: false + freertos_use_tickless_idle: false + freertos_use_timers: true + freertos_use_trace_facility: true + freertos_uxtaskpriorityget: false + freertos_vtaskcleanupresources: false + freertos_vtaskdelay: true + freertos_vtaskdelayuntil: false + freertos_vtaskdelete: true + freertos_vtaskpriorityset: false + freertos_vtasksuspend: true + freertos_xresumefromisr: false + freertos_xtaskgetcurrenttaskhandle: false + freertos_xtaskgetidletaskhandle: false + freertos_xtimerpendfunctioncall: false + definition: Atmel:RTOS1000:0.0.1::FreeRTOS_v1000_MemMang_1 + functionality: FreeRTOS_v10.0.0 + api: RTOS:FreeRTOSv1000:MemMang_1 + dependencies: {} +drivers: + ADC_0: + user_label: ADC_0 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::ADC0::driver_config_definition::ADC::HAL:Driver:ADC.Sync + functionality: ADC + api: HAL:Driver:ADC_Sync + configuration: + adc_advanced_settings: false + adc_arch_adjres: 0 + adc_arch_corren: false + adc_arch_dbgrun: false + adc_arch_event_settings: false + adc_arch_flushei: false + adc_arch_flushinv: false + adc_arch_gaincorr: 0 + adc_arch_leftadj: false + adc_arch_offcomp: false + adc_arch_offsetcorr: 0 + adc_arch_ondemand: false + adc_arch_refcomp: false + adc_arch_resrdyeo: false + adc_arch_runstdby: false + adc_arch_samplen: 0 + adc_arch_samplenum: 1 sample + adc_arch_seqen: 0 + adc_arch_startei: false + adc_arch_startinv: false + adc_arch_winlt: 0 + adc_arch_winmode: No window mode + adc_arch_winmoneo: false + adc_arch_winut: 0 + adc_differential_mode: false + adc_freerunning_mode: false + adc_pinmux_negative: ADC AIN0 pin + adc_pinmux_positive: ADC AIN0 pin + adc_prescaler: Peripheral clock divided by 2 + adc_reference: Internal bandgap reference + adc_resolution: 12-bit + optional_signals: + - identifier: ADC_0:AIN/0 + pad: PA02 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC0.AIN.0 + name: ADC0/AIN/0 + label: AIN/0 + - identifier: ADC_0:AIN/1 + pad: PA03 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC0.AIN.1 + name: ADC0/AIN/1 + label: AIN/1 + - identifier: ADC_0:AIN/2 + pad: PB08 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC0.AIN.2 + name: ADC0/AIN/2 + label: AIN/2 + - identifier: ADC_0:AIN/3 + pad: PB09 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC0.AIN.3 + name: ADC0/AIN/3 + label: AIN/3 + - identifier: ADC_0:AIN/4 + pad: PA04 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC0.AIN.4 + name: ADC0/AIN/4 + label: AIN/4 + - identifier: ADC_0:AIN/5 + pad: PA05 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC0.AIN.5 + name: ADC0/AIN/5 + label: AIN/5 + - identifier: ADC_0:AIN/6 + pad: PA06 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC0.AIN.6 + name: ADC0/AIN/6 + label: AIN/6 + - identifier: ADC_0:AIN/7 + pad: PA07 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC0.AIN.7 + name: ADC0/AIN/7 + label: AIN/7 + - identifier: ADC_0:AIN/8 + pad: PA08 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC0.AIN.8 + name: ADC0/AIN/8 + label: AIN/8 + - identifier: ADC_0:AIN/9 + pad: PA09 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC0.AIN.9 + name: ADC0/AIN/9 + label: AIN/9 + - identifier: ADC_0:AIN/10 + pad: PA10 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC0.AIN.10 + name: ADC0/AIN/10 + label: AIN/10 + - identifier: ADC_0:AIN/11 + pad: PA11 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC0.AIN.11 + name: ADC0/AIN/11 + label: AIN/11 + - identifier: ADC_0:AIN/12 + pad: PB00 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC0.AIN.12 + name: ADC0/AIN/12 + label: AIN/12 + - identifier: ADC_0:AIN/13 + pad: PB01 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC0.AIN.13 + name: ADC0/AIN/13 + label: AIN/13 + - identifier: ADC_0:AIN/14 + pad: PB02 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC0.AIN.14 + name: ADC0/AIN/14 + label: AIN/14 + - identifier: ADC_0:AIN/15 + pad: PB03 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC0.AIN.15 + name: ADC0/AIN/15 + label: AIN/15 + variant: null + clocks: + domain_group: + nodes: + - name: ADC + input: Generic clock generator 0 + external: false + external_frequency: 0 + configuration: + adc_gclk_selection: Generic clock generator 0 + ADC_1: + user_label: ADC_1 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::ADC1::driver_config_definition::ADC::HAL:Driver:ADC.Sync + functionality: ADC + api: HAL:Driver:ADC_Sync + configuration: + adc_advanced_settings: false + adc_arch_adjres: 0 + adc_arch_corren: false + adc_arch_dbgrun: false + adc_arch_event_settings: false + adc_arch_flushei: false + adc_arch_flushinv: false + adc_arch_gaincorr: 0 + adc_arch_leftadj: false + adc_arch_offcomp: false + adc_arch_offsetcorr: 0 + adc_arch_ondemand: false + adc_arch_refcomp: false + adc_arch_resrdyeo: false + adc_arch_runstdby: false + adc_arch_samplen: 0 + adc_arch_samplenum: 1 sample + adc_arch_seqen: 0 + adc_arch_startei: false + adc_arch_startinv: false + adc_arch_winlt: 0 + adc_arch_winmode: No window mode + adc_arch_winmoneo: false + adc_arch_winut: 0 + adc_differential_mode: false + adc_freerunning_mode: false + adc_pinmux_negative: ADC AIN0 pin + adc_pinmux_positive: ADC AIN0 pin + adc_prescaler: Peripheral clock divided by 2 + adc_reference: Internal bandgap reference + adc_resolution: 12-bit + optional_signals: + - identifier: ADC_1:AIN/4 + pad: PC02 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC1.AIN.4 + name: ADC1/AIN/4 + label: AIN/4 + - identifier: ADC_1:AIN/5 + pad: PC03 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC1.AIN.5 + name: ADC1/AIN/5 + label: AIN/5 + - identifier: ADC_1:AIN/6 + pad: PB04 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC1.AIN.6 + name: ADC1/AIN/6 + label: AIN/6 + - identifier: ADC_1:AIN/7 + pad: PB05 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC1.AIN.7 + name: ADC1/AIN/7 + label: AIN/7 + - identifier: ADC_1:AIN/8 + pad: PB06 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC1.AIN.8 + name: ADC1/AIN/8 + label: AIN/8 + - identifier: ADC_1:AIN/9 + pad: PB07 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC1.AIN.9 + name: ADC1/AIN/9 + label: AIN/9 + - identifier: ADC_1:AIN/10 + pad: PC00 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC1.AIN.10 + name: ADC1/AIN/10 + label: AIN/10 + - identifier: ADC_1:AIN/11 + pad: PC01 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC1.AIN.11 + name: ADC1/AIN/11 + label: AIN/11 + - identifier: ADC_1:AIN/12 + pad: PC30 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC1.AIN.12 + name: ADC1/AIN/12 + label: AIN/12 + - identifier: ADC_1:AIN/13 + pad: PC31 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC1.AIN.13 + name: ADC1/AIN/13 + label: AIN/13 + - identifier: ADC_1:AIN/14 + pad: PD00 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC1.AIN.14 + name: ADC1/AIN/14 + label: AIN/14 + - identifier: ADC_1:AIN/15 + pad: PD01 + mode: Enabled + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::ADC1.AIN.15 + name: ADC1/AIN/15 + label: AIN/15 + variant: null + clocks: + domain_group: + nodes: + - name: ADC + input: Generic clock generator 0 + external: false + external_frequency: 0 + configuration: + adc_gclk_selection: Generic clock generator 0 + CMCC: + user_label: CMCC + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::CMCC::driver_config_definition::CMCC::HAL:HPL:CMCC + functionality: System + api: HAL:HPL:CMCC + configuration: + cache_size: 4 KB + cmcc_advanced_configuration: false + cmcc_clock_gating_disable: false + cmcc_data_cache_disable: false + cmcc_enable: true + cmcc_inst_cache_disable: false + optional_signals: [] + variant: null + clocks: + domain_group: null + DMAC: + user_label: DMAC + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::DMAC::driver_config_definition::DMAC::HAL:HPL:DMAC + functionality: System + api: HAL:HPL:DMAC + configuration: + dmac_beatsize_0: 8-bit bus transfer + dmac_beatsize_1: 8-bit bus transfer + dmac_beatsize_10: 8-bit bus transfer + dmac_beatsize_11: 8-bit bus transfer + dmac_beatsize_12: 8-bit bus transfer + dmac_beatsize_13: 8-bit bus transfer + dmac_beatsize_14: 8-bit bus transfer + dmac_beatsize_15: 8-bit bus transfer + dmac_beatsize_16: 8-bit bus transfer + dmac_beatsize_17: 8-bit bus transfer + dmac_beatsize_18: 8-bit bus transfer + dmac_beatsize_19: 8-bit bus transfer + dmac_beatsize_2: 8-bit bus transfer + dmac_beatsize_20: 8-bit bus transfer + dmac_beatsize_21: 8-bit bus transfer + dmac_beatsize_22: 8-bit bus transfer + dmac_beatsize_23: 8-bit bus transfer + dmac_beatsize_24: 8-bit bus transfer + dmac_beatsize_25: 8-bit bus transfer + dmac_beatsize_26: 8-bit bus transfer + dmac_beatsize_27: 8-bit bus transfer + dmac_beatsize_28: 8-bit bus transfer + dmac_beatsize_29: 8-bit bus transfer + dmac_beatsize_3: 8-bit bus transfer + dmac_beatsize_30: 8-bit bus transfer + dmac_beatsize_31: 8-bit bus transfer + dmac_beatsize_4: 8-bit bus transfer + dmac_beatsize_5: 8-bit bus transfer + dmac_beatsize_6: 8-bit bus transfer + dmac_beatsize_7: 8-bit bus transfer + dmac_beatsize_8: 8-bit bus transfer + dmac_beatsize_9: 8-bit bus transfer + dmac_blockact_0: Channel will be disabled if it is the last block transfer in + the transaction + dmac_blockact_1: Channel will be disabled if it is the last block transfer in + the transaction + dmac_blockact_10: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_11: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_12: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_13: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_14: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_15: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_16: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_17: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_18: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_19: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_2: Channel will be disabled if it is the last block transfer in + the transaction + dmac_blockact_20: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_21: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_22: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_23: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_24: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_25: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_26: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_27: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_28: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_29: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_3: Channel will be disabled if it is the last block transfer in + the transaction + dmac_blockact_30: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_31: Channel will be disabled if it is the last block transfer + in the transaction + dmac_blockact_4: Channel will be disabled if it is the last block transfer in + the transaction + dmac_blockact_5: Channel will be disabled if it is the last block transfer in + the transaction + dmac_blockact_6: Channel will be disabled if it is the last block transfer in + the transaction + dmac_blockact_7: Channel will be disabled if it is the last block transfer in + the transaction + dmac_blockact_8: Channel will be disabled if it is the last block transfer in + the transaction + dmac_blockact_9: Channel will be disabled if it is the last block transfer in + the transaction + dmac_channel_0_settings: false + dmac_channel_10_settings: false + dmac_channel_11_settings: false + dmac_channel_12_settings: false + dmac_channel_13_settings: false + dmac_channel_14_settings: false + dmac_channel_15_settings: false + dmac_channel_16_settings: false + dmac_channel_17_settings: false + dmac_channel_18_settings: false + dmac_channel_19_settings: false + dmac_channel_1_settings: false + dmac_channel_20_settings: false + dmac_channel_21_settings: false + dmac_channel_22_settings: false + dmac_channel_23_settings: false + dmac_channel_24_settings: false + dmac_channel_25_settings: false + dmac_channel_26_settings: false + dmac_channel_27_settings: false + dmac_channel_28_settings: false + dmac_channel_29_settings: false + dmac_channel_2_settings: false + dmac_channel_30_settings: false + dmac_channel_31_settings: false + dmac_channel_3_settings: false + dmac_channel_4_settings: false + dmac_channel_5_settings: false + dmac_channel_6_settings: false + dmac_channel_7_settings: false + dmac_channel_8_settings: false + dmac_channel_9_settings: false + dmac_dbgrun: false + dmac_dstinc_0: false + dmac_dstinc_1: false + dmac_dstinc_10: false + dmac_dstinc_11: false + dmac_dstinc_12: false + dmac_dstinc_13: false + dmac_dstinc_14: false + dmac_dstinc_15: false + dmac_dstinc_16: false + dmac_dstinc_17: false + dmac_dstinc_18: false + dmac_dstinc_19: false + dmac_dstinc_2: false + dmac_dstinc_20: false + dmac_dstinc_21: false + dmac_dstinc_22: false + dmac_dstinc_23: false + dmac_dstinc_24: false + dmac_dstinc_25: false + dmac_dstinc_26: false + dmac_dstinc_27: false + dmac_dstinc_28: false + dmac_dstinc_29: false + dmac_dstinc_3: false + dmac_dstinc_30: false + dmac_dstinc_31: false + dmac_dstinc_4: false + dmac_dstinc_5: false + dmac_dstinc_6: false + dmac_dstinc_7: false + dmac_dstinc_8: false + dmac_dstinc_9: false + dmac_enable: false + dmac_evact_0: No action + dmac_evact_1: No action + dmac_evact_10: No action + dmac_evact_11: No action + dmac_evact_12: No action + dmac_evact_13: No action + dmac_evact_14: No action + dmac_evact_15: No action + dmac_evact_16: No action + dmac_evact_17: No action + dmac_evact_18: No action + dmac_evact_19: No action + dmac_evact_2: No action + dmac_evact_20: No action + dmac_evact_21: No action + dmac_evact_22: No action + dmac_evact_23: No action + dmac_evact_24: No action + dmac_evact_25: No action + dmac_evact_26: No action + dmac_evact_27: No action + dmac_evact_28: No action + dmac_evact_29: No action + dmac_evact_3: No action + dmac_evact_30: No action + dmac_evact_31: No action + dmac_evact_4: No action + dmac_evact_5: No action + dmac_evact_6: No action + dmac_evact_7: No action + dmac_evact_8: No action + dmac_evact_9: No action + dmac_evie_0: false + dmac_evie_1: false + dmac_evie_10: false + dmac_evie_11: false + dmac_evie_12: false + dmac_evie_13: false + dmac_evie_14: false + dmac_evie_15: false + dmac_evie_16: false + dmac_evie_17: false + dmac_evie_18: false + dmac_evie_19: false + dmac_evie_2: false + dmac_evie_20: false + dmac_evie_21: false + dmac_evie_22: false + dmac_evie_23: false + dmac_evie_24: false + dmac_evie_25: false + dmac_evie_26: false + dmac_evie_27: false + dmac_evie_28: false + dmac_evie_29: false + dmac_evie_3: false + dmac_evie_30: false + dmac_evie_31: false + dmac_evie_4: false + dmac_evie_5: false + dmac_evie_6: false + dmac_evie_7: false + dmac_evie_8: false + dmac_evie_9: false + dmac_evoe_0: false + dmac_evoe_1: false + dmac_evoe_10: false + dmac_evoe_11: false + dmac_evoe_12: false + dmac_evoe_13: false + dmac_evoe_14: false + dmac_evoe_15: false + dmac_evoe_16: false + dmac_evoe_17: false + dmac_evoe_18: false + dmac_evoe_19: false + dmac_evoe_2: false + dmac_evoe_20: false + dmac_evoe_21: false + dmac_evoe_22: false + dmac_evoe_23: false + dmac_evoe_24: false + dmac_evoe_25: false + dmac_evoe_26: false + dmac_evoe_27: false + dmac_evoe_28: false + dmac_evoe_29: false + dmac_evoe_3: false + dmac_evoe_30: false + dmac_evoe_31: false + dmac_evoe_4: false + dmac_evoe_5: false + dmac_evoe_6: false + dmac_evoe_7: false + dmac_evoe_8: false + dmac_evoe_9: false + dmac_evosel_0: Event generation disabled + dmac_evosel_1: Event generation disabled + dmac_evosel_10: Event generation disabled + dmac_evosel_11: Event generation disabled + dmac_evosel_12: Event generation disabled + dmac_evosel_13: Event generation disabled + dmac_evosel_14: Event generation disabled + dmac_evosel_15: Event generation disabled + dmac_evosel_16: Event generation disabled + dmac_evosel_17: Event generation disabled + dmac_evosel_18: Event generation disabled + dmac_evosel_19: Event generation disabled + dmac_evosel_2: Event generation disabled + dmac_evosel_20: Event generation disabled + dmac_evosel_21: Event generation disabled + dmac_evosel_22: Event generation disabled + dmac_evosel_23: Event generation disabled + dmac_evosel_24: Event generation disabled + dmac_evosel_25: Event generation disabled + dmac_evosel_26: Event generation disabled + dmac_evosel_27: Event generation disabled + dmac_evosel_28: Event generation disabled + dmac_evosel_29: Event generation disabled + dmac_evosel_3: Event generation disabled + dmac_evosel_30: Event generation disabled + dmac_evosel_31: Event generation disabled + dmac_evosel_4: Event generation disabled + dmac_evosel_5: Event generation disabled + dmac_evosel_6: Event generation disabled + dmac_evosel_7: Event generation disabled + dmac_evosel_8: Event generation disabled + dmac_evosel_9: Event generation disabled + dmac_lvl_0: Channel priority 0 + dmac_lvl_1: Channel priority 0 + dmac_lvl_10: Channel priority 0 + dmac_lvl_11: Channel priority 0 + dmac_lvl_12: Channel priority 0 + dmac_lvl_13: Channel priority 0 + dmac_lvl_14: Channel priority 0 + dmac_lvl_15: Channel priority 0 + dmac_lvl_16: Channel priority 0 + dmac_lvl_17: Channel priority 0 + dmac_lvl_18: Channel priority 0 + dmac_lvl_19: Channel priority 0 + dmac_lvl_2: Channel priority 0 + dmac_lvl_20: Channel priority 0 + dmac_lvl_21: Channel priority 0 + dmac_lvl_22: Channel priority 0 + dmac_lvl_23: Channel priority 0 + dmac_lvl_24: Channel priority 0 + dmac_lvl_25: Channel priority 0 + dmac_lvl_26: Channel priority 0 + dmac_lvl_27: Channel priority 0 + dmac_lvl_28: Channel priority 0 + dmac_lvl_29: Channel priority 0 + dmac_lvl_3: Channel priority 0 + dmac_lvl_30: Channel priority 0 + dmac_lvl_31: Channel priority 0 + dmac_lvl_4: Channel priority 0 + dmac_lvl_5: Channel priority 0 + dmac_lvl_6: Channel priority 0 + dmac_lvl_7: Channel priority 0 + dmac_lvl_8: Channel priority 0 + dmac_lvl_9: Channel priority 0 + dmac_lvlen0: true + dmac_lvlen1: true + dmac_lvlen2: true + dmac_lvlen3: true + dmac_lvlpri0: 0 + dmac_lvlpri1: 0 + dmac_lvlpri2: 0 + dmac_lvlpri3: 0 + dmac_rrlvlen0: Static arbitration scheme for channel with priority 0 + dmac_rrlvlen1: Static arbitration scheme for channel with priority 1 + dmac_rrlvlen2: Static arbitration scheme for channel with priority 2 + dmac_rrlvlen3: Static arbitration scheme for channel with priority 3 + dmac_runstdby_0: false + dmac_runstdby_1: false + dmac_runstdby_10: false + dmac_runstdby_11: false + dmac_runstdby_12: false + dmac_runstdby_13: false + dmac_runstdby_14: false + dmac_runstdby_15: false + dmac_runstdby_16: false + dmac_runstdby_17: false + dmac_runstdby_18: false + dmac_runstdby_19: false + dmac_runstdby_2: false + dmac_runstdby_20: false + dmac_runstdby_21: false + dmac_runstdby_22: false + dmac_runstdby_23: false + dmac_runstdby_24: false + dmac_runstdby_25: false + dmac_runstdby_26: false + dmac_runstdby_27: false + dmac_runstdby_28: false + dmac_runstdby_29: false + dmac_runstdby_3: false + dmac_runstdby_30: false + dmac_runstdby_31: false + dmac_runstdby_4: false + dmac_runstdby_5: false + dmac_runstdby_6: false + dmac_runstdby_7: false + dmac_runstdby_8: false + dmac_runstdby_9: false + dmac_srcinc_0: false + dmac_srcinc_1: false + dmac_srcinc_10: false + dmac_srcinc_11: false + dmac_srcinc_12: false + dmac_srcinc_13: false + dmac_srcinc_14: false + dmac_srcinc_15: false + dmac_srcinc_16: false + dmac_srcinc_17: false + dmac_srcinc_18: false + dmac_srcinc_19: false + dmac_srcinc_2: false + dmac_srcinc_20: false + dmac_srcinc_21: false + dmac_srcinc_22: false + dmac_srcinc_23: false + dmac_srcinc_24: false + dmac_srcinc_25: false + dmac_srcinc_26: false + dmac_srcinc_27: false + dmac_srcinc_28: false + dmac_srcinc_29: false + dmac_srcinc_3: false + dmac_srcinc_30: false + dmac_srcinc_31: false + dmac_srcinc_4: false + dmac_srcinc_5: false + dmac_srcinc_6: false + dmac_srcinc_7: false + dmac_srcinc_8: false + dmac_srcinc_9: false + dmac_stepsel_0: Step size settings apply to the destination address + dmac_stepsel_1: Step size settings apply to the destination address + dmac_stepsel_10: Step size settings apply to the destination address + dmac_stepsel_11: Step size settings apply to the destination address + dmac_stepsel_12: Step size settings apply to the destination address + dmac_stepsel_13: Step size settings apply to the destination address + dmac_stepsel_14: Step size settings apply to the destination address + dmac_stepsel_15: Step size settings apply to the destination address + dmac_stepsel_16: Step size settings apply to the destination address + dmac_stepsel_17: Step size settings apply to the destination address + dmac_stepsel_18: Step size settings apply to the destination address + dmac_stepsel_19: Step size settings apply to the destination address + dmac_stepsel_2: Step size settings apply to the destination address + dmac_stepsel_20: Step size settings apply to the destination address + dmac_stepsel_21: Step size settings apply to the destination address + dmac_stepsel_22: Step size settings apply to the destination address + dmac_stepsel_23: Step size settings apply to the destination address + dmac_stepsel_24: Step size settings apply to the destination address + dmac_stepsel_25: Step size settings apply to the destination address + dmac_stepsel_26: Step size settings apply to the destination address + dmac_stepsel_27: Step size settings apply to the destination address + dmac_stepsel_28: Step size settings apply to the destination address + dmac_stepsel_29: Step size settings apply to the destination address + dmac_stepsel_3: Step size settings apply to the destination address + dmac_stepsel_30: Step size settings apply to the destination address + dmac_stepsel_31: Step size settings apply to the destination address + dmac_stepsel_4: Step size settings apply to the destination address + dmac_stepsel_5: Step size settings apply to the destination address + dmac_stepsel_6: Step size settings apply to the destination address + dmac_stepsel_7: Step size settings apply to the destination address + dmac_stepsel_8: Step size settings apply to the destination address + dmac_stepsel_9: Step size settings apply to the destination address + dmac_stepsize_0: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_1: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_10: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_11: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_12: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_13: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_14: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_15: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_16: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_17: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_18: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_19: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_2: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_20: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_21: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_22: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_23: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_24: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_25: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_26: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_27: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_28: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_29: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_3: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_30: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_31: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_4: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_5: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_6: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_7: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_8: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_stepsize_9: Next ADDR = ADDR + (BEATSIZE + 1) * 1 + dmac_trifsrc_0: Only software/event triggers + dmac_trifsrc_1: Only software/event triggers + dmac_trifsrc_10: Only software/event triggers + dmac_trifsrc_11: Only software/event triggers + dmac_trifsrc_12: Only software/event triggers + dmac_trifsrc_13: Only software/event triggers + dmac_trifsrc_14: Only software/event triggers + dmac_trifsrc_15: Only software/event triggers + dmac_trifsrc_16: Only software/event triggers + dmac_trifsrc_17: Only software/event triggers + dmac_trifsrc_18: Only software/event triggers + dmac_trifsrc_19: Only software/event triggers + dmac_trifsrc_2: Only software/event triggers + dmac_trifsrc_20: Only software/event triggers + dmac_trifsrc_21: Only software/event triggers + dmac_trifsrc_22: Only software/event triggers + dmac_trifsrc_23: Only software/event triggers + dmac_trifsrc_24: Only software/event triggers + dmac_trifsrc_25: Only software/event triggers + dmac_trifsrc_26: Only software/event triggers + dmac_trifsrc_27: Only software/event triggers + dmac_trifsrc_28: Only software/event triggers + dmac_trifsrc_29: Only software/event triggers + dmac_trifsrc_3: Only software/event triggers + dmac_trifsrc_30: Only software/event triggers + dmac_trifsrc_31: Only software/event triggers + dmac_trifsrc_4: Only software/event triggers + dmac_trifsrc_5: Only software/event triggers + dmac_trifsrc_6: Only software/event triggers + dmac_trifsrc_7: Only software/event triggers + dmac_trifsrc_8: Only software/event triggers + dmac_trifsrc_9: Only software/event triggers + dmac_trigact_0: One trigger required for each block transfer + dmac_trigact_1: One trigger required for each block transfer + dmac_trigact_10: One trigger required for each block transfer + dmac_trigact_11: One trigger required for each block transfer + dmac_trigact_12: One trigger required for each block transfer + dmac_trigact_13: One trigger required for each block transfer + dmac_trigact_14: One trigger required for each block transfer + dmac_trigact_15: One trigger required for each block transfer + dmac_trigact_16: One trigger required for each block transfer + dmac_trigact_17: One trigger required for each block transfer + dmac_trigact_18: One trigger required for each block transfer + dmac_trigact_19: One trigger required for each block transfer + dmac_trigact_2: One trigger required for each block transfer + dmac_trigact_20: One trigger required for each block transfer + dmac_trigact_21: One trigger required for each block transfer + dmac_trigact_22: One trigger required for each block transfer + dmac_trigact_23: One trigger required for each block transfer + dmac_trigact_24: One trigger required for each block transfer + dmac_trigact_25: One trigger required for each block transfer + dmac_trigact_26: One trigger required for each block transfer + dmac_trigact_27: One trigger required for each block transfer + dmac_trigact_28: One trigger required for each block transfer + dmac_trigact_29: One trigger required for each block transfer + dmac_trigact_3: One trigger required for each block transfer + dmac_trigact_30: One trigger required for each block transfer + dmac_trigact_31: One trigger required for each block transfer + dmac_trigact_4: One trigger required for each block transfer + dmac_trigact_5: One trigger required for each block transfer + dmac_trigact_6: One trigger required for each block transfer + dmac_trigact_7: One trigger required for each block transfer + dmac_trigact_8: One trigger required for each block transfer + dmac_trigact_9: One trigger required for each block transfer + optional_signals: [] + variant: null + clocks: + domain_group: null + GCLK: + user_label: GCLK + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::GCLK::driver_config_definition::GCLK::HAL:HPL:GCLK + functionality: System + api: HAL:HPL:GCLK + configuration: + $input: 12000000 + $input_id: External Crystal Oscillator 8-48MHz (XOSC1) + RESERVED_InputFreq: 12000000 + RESERVED_InputFreq_id: External Crystal Oscillator 8-48MHz (XOSC1) + _$freq_output_Generic clock generator 0: 12000000 + _$freq_output_Generic clock generator 1: 6000000 + _$freq_output_Generic clock generator 10: 12000000 + _$freq_output_Generic clock generator 11: 12000000 + _$freq_output_Generic clock generator 2: 12000000 + _$freq_output_Generic clock generator 3: 32768 + _$freq_output_Generic clock generator 4: 32768 + _$freq_output_Generic clock generator 5: 48000000 + _$freq_output_Generic clock generator 6: 120000512 + _$freq_output_Generic clock generator 7: 12000000 + _$freq_output_Generic clock generator 8: 12000000 + _$freq_output_Generic clock generator 9: 12000000 + enable_gclk_gen_0: true + enable_gclk_gen_0__externalclock: 1000000 + enable_gclk_gen_1: true + enable_gclk_gen_10: false + enable_gclk_gen_10__externalclock: 1000000 + enable_gclk_gen_11: false + enable_gclk_gen_11__externalclock: 1000000 + enable_gclk_gen_1__externalclock: 1000000 + enable_gclk_gen_2: true + enable_gclk_gen_2__externalclock: 1000000 + enable_gclk_gen_3: true + enable_gclk_gen_3__externalclock: 1000000 + enable_gclk_gen_4: true + enable_gclk_gen_4__externalclock: 1000000 + enable_gclk_gen_5: true + enable_gclk_gen_5__externalclock: 1000000 + enable_gclk_gen_6: false + enable_gclk_gen_6__externalclock: 1000000 + enable_gclk_gen_7: false + enable_gclk_gen_7__externalclock: 1000000 + enable_gclk_gen_8: false + enable_gclk_gen_8__externalclock: 1000000 + enable_gclk_gen_9: false + enable_gclk_gen_9__externalclock: 1000000 + gclk_arch_gen_0_enable: true + gclk_arch_gen_0_idc: false + gclk_arch_gen_0_oe: false + gclk_arch_gen_0_oov: false + gclk_arch_gen_0_runstdby: false + gclk_arch_gen_10_enable: false + gclk_arch_gen_10_idc: false + gclk_arch_gen_10_oe: false + gclk_arch_gen_10_oov: false + gclk_arch_gen_10_runstdby: false + gclk_arch_gen_11_enable: false + gclk_arch_gen_11_idc: false + gclk_arch_gen_11_oe: false + gclk_arch_gen_11_oov: false + gclk_arch_gen_11_runstdby: false + gclk_arch_gen_1_enable: true + gclk_arch_gen_1_idc: false + gclk_arch_gen_1_oe: false + gclk_arch_gen_1_oov: false + gclk_arch_gen_1_runstdby: true + gclk_arch_gen_2_enable: true + gclk_arch_gen_2_idc: false + gclk_arch_gen_2_oe: false + gclk_arch_gen_2_oov: false + gclk_arch_gen_2_runstdby: false + gclk_arch_gen_3_enable: true + gclk_arch_gen_3_idc: false + gclk_arch_gen_3_oe: false + gclk_arch_gen_3_oov: false + gclk_arch_gen_3_runstdby: false + gclk_arch_gen_4_enable: true + gclk_arch_gen_4_idc: false + gclk_arch_gen_4_oe: false + gclk_arch_gen_4_oov: false + gclk_arch_gen_4_runstdby: false + gclk_arch_gen_5_enable: false + gclk_arch_gen_5_idc: false + gclk_arch_gen_5_oe: false + gclk_arch_gen_5_oov: false + gclk_arch_gen_5_runstdby: false + gclk_arch_gen_6_enable: false + gclk_arch_gen_6_idc: false + gclk_arch_gen_6_oe: false + gclk_arch_gen_6_oov: false + gclk_arch_gen_6_runstdby: false + gclk_arch_gen_7_enable: false + gclk_arch_gen_7_idc: false + gclk_arch_gen_7_oe: false + gclk_arch_gen_7_oov: false + gclk_arch_gen_7_runstdby: false + gclk_arch_gen_8_enable: false + gclk_arch_gen_8_idc: false + gclk_arch_gen_8_oe: false + gclk_arch_gen_8_oov: false + gclk_arch_gen_8_runstdby: false + gclk_arch_gen_9_enable: false + gclk_arch_gen_9_idc: false + gclk_arch_gen_9_oe: false + gclk_arch_gen_9_oov: false + gclk_arch_gen_9_runstdby: false + gclk_gen_0_div: 4 + gclk_gen_0_div_sel: false + gclk_gen_0_oscillator: Digital Frequency Locked Loop (DFLL48M) + gclk_gen_10_div: 1 + gclk_gen_10_div_sel: false + gclk_gen_10_oscillator: External Crystal Oscillator 8-48MHz (XOSC1) + gclk_gen_11_div: 1 + gclk_gen_11_div_sel: false + gclk_gen_11_oscillator: External Crystal Oscillator 8-48MHz (XOSC1) + gclk_gen_1_div: 8 + gclk_gen_1_div_sel: false + gclk_gen_1_oscillator: Digital Frequency Locked Loop (DFLL48M) + gclk_gen_2_div: 1 + gclk_gen_2_div_sel: true + gclk_gen_2_oscillator: Digital Frequency Locked Loop (DFLL48M) + gclk_gen_3_div: 1 + gclk_gen_3_div_sel: false + gclk_gen_3_oscillator: 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) + gclk_gen_4_div: 1 + gclk_gen_4_div_sel: false + gclk_gen_4_oscillator: 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) + gclk_gen_5_div: 1 + gclk_gen_5_div_sel: false + gclk_gen_5_oscillator: Digital Frequency Locked Loop (DFLL48M) + gclk_gen_6_div: 1 + gclk_gen_6_div_sel: false + gclk_gen_6_oscillator: Digital Phase Locked Loop (DPLL1) + gclk_gen_7_div: 1 + gclk_gen_7_div_sel: false + gclk_gen_7_oscillator: External Crystal Oscillator 8-48MHz (XOSC1) + gclk_gen_8_div: 1 + gclk_gen_8_div_sel: false + gclk_gen_8_oscillator: External Crystal Oscillator 8-48MHz (XOSC1) + gclk_gen_9_div: 1 + gclk_gen_9_div_sel: false + gclk_gen_9_oscillator: External Crystal Oscillator 8-48MHz (XOSC1) + optional_signals: [] + variant: null + clocks: + domain_group: null + MCLK: + user_label: MCLK + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::MCLK::driver_config_definition::MCLK::HAL:HPL:MCLK + functionality: System + api: HAL:HPL:MCLK + configuration: + $input: 12000000 + $input_id: Generic clock generator 0 + RESERVED_InputFreq: 12000000 + RESERVED_InputFreq_id: Generic clock generator 0 + _$freq_output_CPU: 12000000 + cpu_clock_source: Generic clock generator 0 + cpu_div: '1' + enable_cpu_clock: true + mclk_arch_bupdiv: Divide by 8 + mclk_arch_hsdiv: Divide by 1 + mclk_arch_lpdiv: Divide by 4 + nvm_wait_states: '0' + optional_signals: [] + variant: null + clocks: + domain_group: + nodes: + - name: CPU + input: CPU + external: false + external_frequency: 0 + configuration: {} + OSC32KCTRL: + user_label: OSC32KCTRL + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::OSC32KCTRL::driver_config_definition::OSC32KCTRL::HAL:HPL:OSC32KCTRL + functionality: System + api: HAL:HPL:OSC32KCTRL + configuration: + $input: 32768 + $input_id: 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) + RESERVED_InputFreq: 32768 + RESERVED_InputFreq_id: 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) + _$freq_output_RTC source: 32768 + enable_osculp32k: true + enable_rtc_source: true + enable_xosc32k: false + osculp32k_calib: 0 + osculp32k_calib_enable: false + rtc_1khz_selection: false + rtc_source_oscillator: 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) + xosc32k_arch_cfden: false + xosc32k_arch_cfdeo: false + xosc32k_arch_cgm: Standard mode + xosc32k_arch_en1k: false + xosc32k_arch_en32k: false + xosc32k_arch_enable: false + xosc32k_arch_ondemand: true + xosc32k_arch_runstdby: false + xosc32k_arch_startup: 62592us + xosc32k_arch_swben: false + xosc32k_arch_xtalen: true + optional_signals: [] + variant: null + clocks: + domain_group: null + OSCCTRL: + user_label: OSCCTRL + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::OSCCTRL::driver_config_definition::OSCCTRL::HAL:HPL:OSCCTRL + functionality: System + api: HAL:HPL:OSCCTRL + configuration: + $input: 32768 + $input_id: Generic clock generator 4 + RESERVED_InputFreq: 32768 + RESERVED_InputFreq_id: Generic clock generator 4 + _$freq_output_Digital Frequency Locked Loop (DFLL48M): 48000000 + _$freq_output_Digital Phase Locked Loop (DPLL0): 47985664 + _$freq_output_Digital Phase Locked Loop (DPLL1): 120000512 + _$freq_output_External Crystal Oscillator 8-48MHz (XOSC0): 12000000 + _$freq_output_External Crystal Oscillator 8-48MHz (XOSC1): 12000000 + dfll_arch_bplckc: false + dfll_arch_calibration: false + dfll_arch_ccdis: false + dfll_arch_coarse: 31 + dfll_arch_cstep: 1 + dfll_arch_enable: true + dfll_arch_fine: 128 + dfll_arch_fstep: 1 + dfll_arch_llaw: false + dfll_arch_ondemand: false + dfll_arch_qldis: false + dfll_arch_runstdby: false + dfll_arch_stable: false + dfll_arch_usbcrm: false + dfll_arch_waitlock: true + dfll_mode: Open Loop Mode + dfll_mul: 0 + dfll_ref_clock: Generic clock generator 3 + enable_dfll: true + enable_fdpll0: false + enable_fdpll1: false + enable_xosc0: false + enable_xosc1: false + fdpll0_arch_dcoen: false + fdpll0_arch_enable: false + fdpll0_arch_filter: 0 + fdpll0_arch_lbypass: false + fdpll0_arch_ltime: No time-out, automatic lock + fdpll0_arch_ondemand: false + fdpll0_arch_refclk: XOSC32K clock reference + fdpll0_arch_runstdby: false + fdpll0_arch_wuf: false + fdpll0_clock_dcofilter: 0 + fdpll0_clock_div: 0 + fdpll0_ldr: 1463 + fdpll0_ldrfrac: 13 + fdpll0_ref_clock: 32kHz External Crystal Oscillator (XOSC32K) + fdpll1_arch_dcoen: false + fdpll1_arch_enable: false + fdpll1_arch_filter: 0 + fdpll1_arch_lbypass: false + fdpll1_arch_ltime: No time-out, automatic lock + fdpll1_arch_ondemand: false + fdpll1_arch_refclk: GCLK clock reference + fdpll1_arch_runstdby: false + fdpll1_arch_wuf: false + fdpll1_clock_dcofilter: 0 + fdpll1_clock_div: 10 + fdpll1_ldr: 3661 + fdpll1_ldrfrac: 4 + fdpll1_ref_clock: Generic clock generator 4 + xosc0_arch_cfden: false + xosc0_arch_enable: false + xosc0_arch_enalc: false + xosc0_arch_lowbufgain: false + xosc0_arch_ondemand: false + xosc0_arch_runstdby: false + xosc0_arch_startup: 31us + xosc0_arch_swben: false + xosc0_arch_xtalen: false + xosc0_frequency: 12000000 + xosc1_arch_cfden: false + xosc1_arch_enable: false + xosc1_arch_enalc: false + xosc1_arch_lowbufgain: false + xosc1_arch_ondemand: false + xosc1_arch_runstdby: false + xosc1_arch_startup: 31us + xosc1_arch_swben: false + xosc1_arch_xtalen: true + xosc1_frequency: 12000000 + optional_signals: [] + variant: null + clocks: + domain_group: null + PORT: + user_label: PORT + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::PORT::driver_config_definition::PORT::HAL:HPL:PORT + functionality: System + api: HAL:HPL:PORT + configuration: + enable_port_input_event_0: false + enable_port_input_event_1: false + enable_port_input_event_2: false + enable_port_input_event_3: false + porta_event_action_0: Output register of pin will be set to level of event + porta_event_action_1: Output register of pin will be set to level of event + porta_event_action_2: Output register of pin will be set to level of event + porta_event_action_3: Output register of pin will be set to level of event + porta_event_pin_identifier_0: 0 + porta_event_pin_identifier_1: 0 + porta_event_pin_identifier_2: 0 + porta_event_pin_identifier_3: 0 + porta_input_event_enable_0: false + porta_input_event_enable_1: false + porta_input_event_enable_2: false + porta_input_event_enable_3: false + portb_event_action_0: Output register of pin will be set to level of event + portb_event_action_1: Output register of pin will be set to level of event + portb_event_action_2: Output register of pin will be set to level of event + portb_event_action_3: Output register of pin will be set to level of event + portb_event_pin_identifier_0: 0 + portb_event_pin_identifier_1: 0 + portb_event_pin_identifier_2: 0 + portb_event_pin_identifier_3: 0 + portb_input_event_enable_0: false + portb_input_event_enable_1: false + portb_input_event_enable_2: false + portb_input_event_enable_3: false + portc_event_action_0: Output register of pin will be set to level of event + portc_event_action_1: Output register of pin will be set to level of event + portc_event_action_2: Output register of pin will be set to level of event + portc_event_action_3: Output register of pin will be set to level of event + portc_event_pin_identifier_0: 0 + portc_event_pin_identifier_1: 0 + portc_event_pin_identifier_2: 0 + portc_event_pin_identifier_3: 0 + portc_input_event_enable_0: false + portc_input_event_enable_1: false + portc_input_event_enable_2: false + portc_input_event_enable_3: false + portd_event_action_0: Output register of pin will be set to level of event + portd_event_action_1: Output register of pin will be set to level of event + portd_event_action_2: Output register of pin will be set to level of event + portd_event_action_3: Output register of pin will be set to level of event + portd_event_pin_identifier_0: 0 + portd_event_pin_identifier_1: 0 + portd_event_pin_identifier_2: 0 + portd_event_pin_identifier_3: 0 + portd_input_event_enable_0: false + portd_input_event_enable_1: false + portd_input_event_enable_2: false + portd_input_event_enable_3: false + optional_signals: [] + variant: null + clocks: + domain_group: null + RAMECC: + user_label: RAMECC + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::RAMECC::driver_config_definition::RAMECC::HAL:HPL:RAMECC + functionality: System + api: HAL:HPL:RAMECC + configuration: {} + optional_signals: [] + variant: null + clocks: + domain_group: null + TIMER_0: + user_label: TIMER_0 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::RTC::driver_config_definition::Timer::HAL:Driver:Timer + functionality: Timer + api: HAL:Driver:Timer + configuration: + rtc_arch_comp_val: 32 + rtc_arch_init_reset: true + rtc_arch_prescaler: OFF(Peripheral clock divided by 1) + rtc_cmpeo0: false + rtc_cmpeo1: false + rtc_event_control: false + rtc_ovfeo: false + rtc_pereo0: false + rtc_pereo1: false + rtc_pereo2: false + rtc_pereo3: false + rtc_pereo4: false + rtc_pereo5: false + rtc_pereo6: false + rtc_pereo7: false + rtc_tamper_active_layer_frequency_prescalar: DIV2 CLK_RTC_OUT is CLK_RTC /2 + rtc_tamper_debounce_frequency_prescalar: DIV2 CLK_RTC_DEB is CLK_RTC /2 + rtc_tamper_input_action_0: OFF(Disabled) + rtc_tamper_input_action_1: OFF(Disabled) + rtc_tamper_input_action_2: OFF(Disabled) + rtc_tamper_input_action_3: OFF(Disabled) + rtc_tamper_input_action_4: OFF(Disabled) + rtc_tampereo: false + rtc_tampevei: false + tamper_debounce_enable_0: false + tamper_debounce_enable_1: false + tamper_debounce_enable_2: false + tamper_debounce_enable_3: false + tamper_debounce_enable_4: false + tamper_input_0_settings: false + tamper_input_1_settings: false + tamper_input_2_settings: false + tamper_input_3_settings: false + tamper_input_4_settings: false + tamper_level_0: false + tamper_level_1: false + tamper_level_2: false + tamper_level_3: false + tamper_level_4: false + optional_signals: [] + variant: null + clocks: + domain_group: + nodes: + - name: RTC + input: RTC source + external: false + external_frequency: 0 + configuration: + rtc_clk_selection: RTC source + SPI_MRAM: + user_label: SPI_MRAM + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::SERCOM0::driver_config_definition::SPI.Master::HAL:Driver:SPI.Master.Sync + functionality: SPI + api: HAL:Driver:SPI_Master_Sync + configuration: + spi_master_advanced: false + spi_master_arch_cpha: Sample input on leading edge + spi_master_arch_cpol: SCK is low when idle + spi_master_arch_dbgstop: Keep running + spi_master_arch_dord: MSB first + spi_master_arch_ibon: In data stream + spi_master_arch_runstdby: false + spi_master_baud_rate: 50000 + spi_master_character_size: 8 bits + spi_master_dummybyte: 511 + spi_master_rx_enable: true + optional_signals: [] + variant: + specification: TXPO=0, RXPO=2 + required_signals: + - name: SERCOM0/PAD/0 + pad: PB24 + label: MOSI + - name: SERCOM0/PAD/1 + pad: PB25 + label: SCK + - name: SERCOM0/PAD/2 + pad: PC18 + label: MISO + clocks: + domain_group: + nodes: + - name: Core + input: Generic clock generator 0 + external: false + external_frequency: 0 + - name: Slow + input: Generic clock generator 3 + external: false + external_frequency: 0 + configuration: + core_gclk_selection: Generic clock generator 0 + slow_gclk_selection: Generic clock generator 3 + SPI_DISPLAY: + user_label: SPI_DISPLAY + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::SERCOM1::driver_config_definition::SPI.Master::HAL:Driver:SPI.Master.Sync + functionality: SPI + api: HAL:Driver:SPI_Master_Sync + configuration: + spi_master_advanced: false + spi_master_arch_cpha: Sample input on leading edge + spi_master_arch_cpol: SCK is low when idle + spi_master_arch_dbgstop: Keep running + spi_master_arch_dord: MSB first + spi_master_arch_ibon: In data stream + spi_master_arch_runstdby: false + spi_master_baud_rate: 50000 + spi_master_character_size: 8 bits + spi_master_dummybyte: 511 + spi_master_rx_enable: true + optional_signals: [] + variant: + specification: TXPO=0, RXPO=2 + required_signals: + - name: SERCOM1/PAD/0 + pad: PA00 + label: MOSI + - name: SERCOM1/PAD/1 + pad: PA01 + label: SCK + - name: SERCOM1/PAD/2 + pad: PA18 + label: MISO + clocks: + domain_group: + nodes: + - name: Core + input: Generic clock generator 0 + external: false + external_frequency: 0 + - name: Slow + input: Generic clock generator 3 + external: false + external_frequency: 0 + configuration: + core_gclk_selection: Generic clock generator 0 + slow_gclk_selection: Generic clock generator 3 + SPI_CAMERA: + user_label: SPI_CAMERA + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::SERCOM2::driver_config_definition::SPI.Master::HAL:Driver:SPI.Master.Sync + functionality: SPI + api: HAL:Driver:SPI_Master_Sync + configuration: + spi_master_advanced: false + spi_master_arch_cpha: Sample input on leading edge + spi_master_arch_cpol: SCK is low when idle + spi_master_arch_dbgstop: Keep running + spi_master_arch_dord: MSB first + spi_master_arch_ibon: In data stream + spi_master_arch_runstdby: false + spi_master_baud_rate: 50000 + spi_master_character_size: 8 bits + spi_master_dummybyte: 511 + spi_master_rx_enable: true + optional_signals: [] + variant: + specification: TXPO=0, RXPO=2 + required_signals: + - name: SERCOM2/PAD/0 + pad: PB26 + label: MOSI + - name: SERCOM2/PAD/1 + pad: PB27 + label: SCK + - name: SERCOM2/PAD/2 + pad: PA14 + label: MISO + clocks: + domain_group: + nodes: + - name: Core + input: Generic clock generator 0 + external: false + external_frequency: 0 + - name: Slow + input: Generic clock generator 3 + external: false + external_frequency: 0 + configuration: + core_gclk_selection: Generic clock generator 0 + slow_gclk_selection: Generic clock generator 3 + I2C_SBAND: + user_label: I2C_SBAND + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::SERCOM3::driver_config_definition::I2C.Master.Standard~2FFast-mode::HAL:Driver:I2C.Master.Sync + functionality: I2C + api: HAL:Driver:I2C_Master_Sync + configuration: + i2c_master_advanced: false + i2c_master_arch_dbgstop: Keep running + i2c_master_arch_inactout: Disabled + i2c_master_arch_lowtout: false + i2c_master_arch_mexttoen: false + i2c_master_arch_runstdby: false + i2c_master_arch_sdahold: 300-600ns hold time + i2c_master_arch_sexttoen: false + i2c_master_arch_trise: 215 + i2c_master_baud_rate: 100000 + optional_signals: [] + variant: + specification: SDA=0, SCL=1 + required_signals: + - name: SERCOM3/PAD/0 + pad: PA17 + label: SDA + - name: SERCOM3/PAD/1 + pad: PA16 + label: SCL + clocks: + domain_group: + nodes: + - name: Core + input: Generic clock generator 0 + external: false + external_frequency: 0 + - name: Slow + input: Generic clock generator 3 + external: false + external_frequency: 0 + configuration: + core_gclk_selection: Generic clock generator 0 + slow_gclk_selection: Generic clock generator 3 + SPI_MAGNETOMETER_GYRO: + user_label: SPI_MAGNETOMETER_GYRO + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::SERCOM4::driver_config_definition::SPI.Master::HAL:Driver:SPI.Master.Sync + functionality: SPI + api: HAL:Driver:SPI_Master_Sync + configuration: + spi_master_advanced: false + spi_master_arch_cpha: Sample input on leading edge + spi_master_arch_cpol: SCK is low when idle + spi_master_arch_dbgstop: Keep running + spi_master_arch_dord: MSB first + spi_master_arch_ibon: In data stream + spi_master_arch_runstdby: false + spi_master_baud_rate: 50000 + spi_master_character_size: 8 bits + spi_master_dummybyte: 511 + spi_master_rx_enable: true + optional_signals: [] + variant: + specification: TXPO=0, RXPO=2 + required_signals: + - name: SERCOM4/PAD/0 + pad: PA13 + label: MOSI + - name: SERCOM4/PAD/1 + pad: PA12 + label: SCK + - name: SERCOM4/PAD/2 + pad: PB14 + label: MISO + clocks: + domain_group: + nodes: + - name: Core + input: Generic clock generator 0 + external: false + external_frequency: 0 + - name: Slow + input: Generic clock generator 3 + external: false + external_frequency: 0 + configuration: + core_gclk_selection: Generic clock generator 0 + slow_gclk_selection: Generic clock generator 3 + SPI_SBAND: + user_label: SPI_SBAND + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::SERCOM5::driver_config_definition::SPI.Master::HAL:Driver:SPI.Master.Sync + functionality: SPI + api: HAL:Driver:SPI_Master_Sync + configuration: + spi_master_advanced: false + spi_master_arch_cpha: Sample input on leading edge + spi_master_arch_cpol: SCK is low when idle + spi_master_arch_dbgstop: Keep running + spi_master_arch_dord: MSB first + spi_master_arch_ibon: In data stream + spi_master_arch_runstdby: false + spi_master_baud_rate: 50000 + spi_master_character_size: 8 bits + spi_master_dummybyte: 511 + spi_master_rx_enable: true + optional_signals: [] + variant: + specification: TXPO=0, RXPO=2 + required_signals: + - name: SERCOM5/PAD/0 + pad: PB16 + label: MOSI + - name: SERCOM5/PAD/1 + pad: PB17 + label: SCK + - name: SERCOM5/PAD/2 + pad: PB18 + label: MISO + clocks: + domain_group: + nodes: + - name: Core + input: Generic clock generator 0 + external: false + external_frequency: 0 + - name: Slow + input: Generic clock generator 3 + external: false + external_frequency: 0 + configuration: + core_gclk_selection: Generic clock generator 0 + slow_gclk_selection: Generic clock generator 3 + I2C_CAMERA: + user_label: I2C_CAMERA + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::SERCOM6::driver_config_definition::I2C.Master.Standard~2FFast-mode::HAL:Driver:I2C.Master.Sync + functionality: I2C + api: HAL:Driver:I2C_Master_Sync + configuration: + i2c_master_advanced: false + i2c_master_arch_dbgstop: Keep running + i2c_master_arch_inactout: Disabled + i2c_master_arch_lowtout: false + i2c_master_arch_mexttoen: false + i2c_master_arch_runstdby: false + i2c_master_arch_sdahold: 300-600ns hold time + i2c_master_arch_sexttoen: false + i2c_master_arch_trise: 215 + i2c_master_baud_rate: 100000 + optional_signals: [] + variant: + specification: SDA=0, SCL=1 + required_signals: + - name: SERCOM6/PAD/0 + pad: PD09 + label: SDA + - name: SERCOM6/PAD/1 + pad: PD08 + label: SCL + clocks: + domain_group: + nodes: + - name: Core + input: Generic clock generator 0 + external: false + external_frequency: 0 + - name: Slow + input: Generic clock generator 3 + external: false + external_frequency: 0 + configuration: + core_gclk_selection: Generic clock generator 0 + slow_gclk_selection: Generic clock generator 3 + SPI_UHF: + user_label: SPI_UHF + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::SERCOM7::driver_config_definition::SPI.Master::HAL:Driver:SPI.Master.Sync + functionality: SPI + api: HAL:Driver:SPI_Master_Sync + configuration: + spi_master_advanced: false + spi_master_arch_cpha: Sample input on leading edge + spi_master_arch_cpol: SCK is low when idle + spi_master_arch_dbgstop: Keep running + spi_master_arch_dord: MSB first + spi_master_arch_ibon: In data stream + spi_master_arch_runstdby: false + spi_master_baud_rate: 50000 + spi_master_character_size: 8 bits + spi_master_dummybyte: 511 + spi_master_rx_enable: true + optional_signals: [] + variant: + specification: TXPO=0, RXPO=2 + required_signals: + - name: SERCOM7/PAD/0 + pad: PC12 + label: MOSI + - name: SERCOM7/PAD/1 + pad: PC13 + label: SCK + - name: SERCOM7/PAD/2 + pad: PD10 + label: MISO + clocks: + domain_group: + nodes: + - name: Core + input: Generic clock generator 0 + external: false + external_frequency: 0 + - name: Slow + input: Generic clock generator 3 + external: false + external_frequency: 0 + configuration: + core_gclk_selection: Generic clock generator 0 + slow_gclk_selection: Generic clock generator 3 + DELAY_0: + user_label: DELAY_0 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::SysTick::driver_config_definition::Delay::HAL:Driver:Delay + functionality: Delay + api: HAL:Driver:Delay + configuration: + systick_arch_tickint: false + optional_signals: [] + variant: null + clocks: + domain_group: null + MAGNETORQUER_1: + user_label: MAGNETORQUER_1 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::TCC0::driver_config_definition::PWM::HAL:Driver:PWM + functionality: PWM + api: HAL:Driver:PWM + configuration: + tcc_arch_alock: false + tcc_arch_cc0: 0 + tcc_arch_cc1: 0 + tcc_arch_cc2: 0 + tcc_arch_cc3: 0 + tcc_arch_cc4: 0 + tcc_arch_cc5: 0 + tcc_arch_cnteo: false + tcc_arch_cntsel: An interrupt/event is generated when a new counter cycle starts + tcc_arch_cpten0: false + tcc_arch_cpten1: false + tcc_arch_cpten2: false + tcc_arch_cpten3: false + tcc_arch_cpten4: false + tcc_arch_cpten5: false + tcc_arch_cpten6: false + tcc_arch_cpten7: false + tcc_arch_dbgrun: false + tcc_arch_evact0: Event action disabled + tcc_arch_evact1: Event action disabled + tcc_arch_lupd: true + tcc_arch_mcei0: false + tcc_arch_mcei1: false + tcc_arch_mcei2: false + tcc_arch_mcei3: false + tcc_arch_mcei4: false + tcc_arch_mcei5: false + tcc_arch_mceo0: false + tcc_arch_mceo1: false + tcc_arch_mceo2: false + tcc_arch_mceo3: false + tcc_arch_mceo4: false + tcc_arch_mceo5: false + tcc_arch_ovfeo: false + tcc_arch_prescsync: Reload or reset counter on next GCLK + tcc_arch_runstdby: false + tcc_arch_sel_ch: 3 + tcc_arch_tcei0: false + tcc_arch_tcei1: false + tcc_arch_tceinv0: false + tcc_arch_tceinv1: false + tcc_arch_trgeo: false + tcc_arch_wave_duty_val: 500 + tcc_arch_wave_per_val: 1000 + tcc_arch_wavegen: Single-slope PWM + tcc_per: 10000 + tcc_prescaler: Divide by 8 + timer_event_control: false + optional_signals: + - identifier: MAGNETORQUER_1:WO/0 + pad: PA20 + mode: PWM output + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::TCC0.WO.0 + name: TCC0/WO/0 + label: WO/0 + - identifier: MAGNETORQUER_1:WO/1 + pad: PA21 + mode: PWM output + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::TCC0.WO.1 + name: TCC0/WO/1 + label: WO/1 + - identifier: MAGNETORQUER_1:WO/2 + pad: PA22 + mode: PWM output + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::TCC0.WO.2 + name: TCC0/WO/2 + label: WO/2 + - identifier: MAGNETORQUER_1:WO/3 + pad: PA23 + mode: PWM output + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::TCC0.WO.3 + name: TCC0/WO/3 + label: WO/3 + variant: null + clocks: + domain_group: + nodes: + - name: TCC + input: Generic clock generator 0 + external: false + external_frequency: 0 + configuration: + tcc_gclk_selection: Generic clock generator 0 + MAGNETORQUER_2: + user_label: MAGNETORQUER_2 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::TCC1::driver_config_definition::PWM::HAL:Driver:PWM + functionality: PWM + api: HAL:Driver:PWM + configuration: + tcc_arch_alock: false + tcc_arch_cc0: 0 + tcc_arch_cc1: 0 + tcc_arch_cc2: 0 + tcc_arch_cc3: 0 + tcc_arch_cnteo: false + tcc_arch_cntsel: An interrupt/event is generated when a new counter cycle starts + tcc_arch_cpten0: false + tcc_arch_cpten1: false + tcc_arch_cpten2: false + tcc_arch_cpten3: false + tcc_arch_cpten4: false + tcc_arch_cpten5: false + tcc_arch_cpten6: false + tcc_arch_cpten7: false + tcc_arch_dbgrun: false + tcc_arch_evact0: Event action disabled + tcc_arch_evact1: Event action disabled + tcc_arch_lupd: true + tcc_arch_mcei0: false + tcc_arch_mcei1: false + tcc_arch_mcei2: false + tcc_arch_mcei3: false + tcc_arch_mceo0: false + tcc_arch_mceo1: false + tcc_arch_mceo2: false + tcc_arch_mceo3: false + tcc_arch_ovfeo: false + tcc_arch_prescsync: Reload or reset counter on next GCLK + tcc_arch_runstdby: false + tcc_arch_sel_ch: 3 + tcc_arch_tcei0: false + tcc_arch_tcei1: false + tcc_arch_tceinv0: false + tcc_arch_tceinv1: false + tcc_arch_trgeo: false + tcc_arch_wave_duty_val: 500 + tcc_arch_wave_per_val: 1000 + tcc_arch_wavegen: Single-slope PWM + tcc_per: 10000 + tcc_prescaler: Divide by 8 + timer_event_control: false + optional_signals: + - identifier: MAGNETORQUER_2:WO/0 + pad: PD20 + mode: PWM output + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::TCC1.WO.0 + name: TCC1/WO/0 + label: WO/0 + - identifier: MAGNETORQUER_2:WO/1 + pad: PD21 + mode: PWM output + configuration: null + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::optional_signal_definition::TCC1.WO.1 + name: TCC1/WO/1 + label: WO/1 + variant: null + clocks: + domain_group: + nodes: + - name: TCC + input: Generic clock generator 0 + external: false + external_frequency: 0 + configuration: + tcc_gclk_selection: Generic clock generator 0 + RAND_0: + user_label: RAND_0 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::TRNG::driver_config_definition::RAND::HAL:Driver:RAND.Sync + functionality: RAND + api: HAL:Driver:RAND_Sync + configuration: + trng_datardyeo: false + trng_runstdby: false + optional_signals: [] + variant: null + clocks: + domain_group: null + WDT_0: + user_label: WDT_0 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::WDT::driver_config_definition::WDT::HAL:Driver:WDT + functionality: WDT + api: HAL:Driver:WDT + configuration: + wdt_arch_per: 8 clock cycles + wdt_arch_window: 8 clock cycles + wdt_arch_window_en: false + optional_signals: [] + variant: null + clocks: + domain_group: null +pads: + DISPLAY_MOSI: + name: PA00 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA00 + mode: Digital output + user_label: DISPLAY_MOSI + configuration: null + DISPLAY_SCK: + name: PA01 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA01 + mode: Digital output + user_label: DISPLAY_SCK + configuration: null + PC00: + name: PC00 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC00 + mode: Analog + user_label: PC00 + configuration: null + PC01: + name: PC01 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC01 + mode: Analog + user_label: PC01 + configuration: null + PC02: + name: PC02 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC02 + mode: Analog + user_label: PC02 + configuration: null + PC03: + name: PC03 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC03 + mode: Analog + user_label: PC03 + configuration: null + PA02: + name: PA02 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA02 + mode: Analog + user_label: PA02 + configuration: null + PA03: + name: PA03 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA03 + mode: Analog + user_label: PA03 + configuration: null + PB04: + name: PB04 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB04 + mode: Analog + user_label: PB04 + configuration: null + PB05: + name: PB05 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB05 + mode: Analog + user_label: PB05 + configuration: null + PD00: + name: PD00 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PD00 + mode: Analog + user_label: PD00 + configuration: null + PD01: + name: PD01 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PD01 + mode: Analog + user_label: PD01 + configuration: null + PB06: + name: PB06 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB06 + mode: Analog + user_label: PB06 + configuration: null + PB07: + name: PB07 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB07 + mode: Analog + user_label: PB07 + configuration: null + PB08: + name: PB08 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB08 + mode: Analog + user_label: PB08 + configuration: null + PB09: + name: PB09 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB09 + mode: Analog + user_label: PB09 + configuration: null + PA04: + name: PA04 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA04 + mode: Analog + user_label: PA04 + configuration: null + PA05: + name: PA05 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA05 + mode: Analog + user_label: PA05 + configuration: null + PA06: + name: PA06 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA06 + mode: Analog + user_label: PA06 + configuration: null + PA07: + name: PA07 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA07 + mode: Analog + user_label: PA07 + configuration: null + MRAM1_CS: + name: PC04 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC04 + mode: Digital output + user_label: MRAM1_CS + configuration: + pad_initial_level: High + MRAM1_RST: + name: PC05 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC05 + mode: Digital output + user_label: MRAM1_RST + configuration: + pad_initial_level: High + MRAM2_CS: + name: PC06 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC06 + mode: Digital output + user_label: MRAM2_CS + configuration: + pad_initial_level: High + MRAM2_RST: + name: PC07 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC07 + mode: Digital output + user_label: MRAM2_RST + configuration: + pad_initial_level: High + PA08: + name: PA08 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA08 + mode: Analog + user_label: PA08 + configuration: null + PA09: + name: PA09 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA09 + mode: Analog + user_label: PA09 + configuration: null + PA10: + name: PA10 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA10 + mode: Analog + user_label: PA10 + configuration: null + PA11: + name: PA11 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA11 + mode: Analog + user_label: PA11 + configuration: null + MRAM3_CS: + name: PB10 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB10 + mode: Digital output + user_label: MRAM3_CS + configuration: + pad_initial_level: High + MRAM3_RST: + name: PB11 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB11 + mode: Digital output + user_label: MRAM3_RST + configuration: + pad_initial_level: High + MRAM1_WP: + name: PB12 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB12 + mode: Digital output + user_label: MRAM1_WP + configuration: + pad_initial_level: High + MRAM2_WP: + name: PB13 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB13 + mode: Digital output + user_label: MRAM2_WP + configuration: + pad_initial_level: High + MAGNETOMETER_GYRO_MISO: + name: PB14 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB14 + mode: Digital input + user_label: MAGNETOMETER_GYRO_MISO + configuration: null + MRAM3_WP: + name: PB15 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB15 + mode: Digital output + user_label: MRAM3_WP + configuration: + pad_initial_level: High + CAMERA_SCL: + name: PD08 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PD08 + mode: I2C + user_label: CAMERA_SCL + configuration: null + CAMERA_SDA: + name: PD09 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PD09 + mode: I2C + user_label: CAMERA_SDA + configuration: null + UHF_MISO: + name: PD10 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PD10 + mode: Digital input + user_label: UHF_MISO + configuration: null + DISPLAY_RST: + name: PD11 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PD11 + mode: Digital output + user_label: DISPLAY_RST + configuration: + pad_initial_level: High + DISPLAY_DC: + name: PD12 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PD12 + mode: Digital output + user_label: DISPLAY_DC + configuration: + pad_initial_level: High + MAGNETOMETER_DRDY: + name: PC10 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC10 + mode: Digital input + user_label: MAGNETOMETER_DRDY + configuration: + pad_pull_config: Pull-down + DISPLAY_CS: + name: PC11 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC11 + mode: Digital output + user_label: DISPLAY_CS + configuration: + pad_initial_level: High + UHF_MOSI: + name: PC12 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC12 + mode: Digital output + user_label: UHF_MOSI + configuration: null + UHF_SCK: + name: PC13 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC13 + mode: Digital output + user_label: UHF_SCK + configuration: null + CAMERA_CS: + name: PC14 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC14 + mode: Digital output + user_label: CAMERA_CS + configuration: + pad_initial_level: High + LED_ORANGE1: + name: PC15 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC15 + mode: Digital output + user_label: LED_ORANGE1 + configuration: + pad_initial_level: High + MAGNETOMETER_GYRO_SCK: + name: PA12 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA12 + mode: Digital output + user_label: MAGNETOMETER_GYRO_SCK + configuration: null + MAGNETOMETER_GYRO_MOSI: + name: PA13 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA13 + mode: Digital output + user_label: MAGNETOMETER_GYRO_MOSI + configuration: null + CAMERA_MISO: + name: PA14 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA14 + mode: Digital input + user_label: CAMERA_MISO + configuration: null + LED_ORANGE2: + name: PA15 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA15 + mode: Digital output + user_label: LED_ORANGE2 + configuration: + pad_initial_level: High + SBAND_SCL: + name: PA16 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA16 + mode: I2C + user_label: SBAND_SCL + configuration: null + SBAND_SDA: + name: PA17 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA17 + mode: I2C + user_label: SBAND_SDA + configuration: null + DISPLAY_MISO: + name: PA18 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA18 + mode: Digital input + user_label: DISPLAY_MISO + configuration: null + LED_RED: + name: PA19 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA19 + mode: Digital output + user_label: LED_RED + configuration: + pad_initial_level: High + UHF_CS: + name: PC16 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC16 + mode: Digital output + user_label: UHF_CS + configuration: + pad_initial_level: High + UHF_RST: + name: PC17 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC17 + mode: Digital output + user_label: UHF_RST + configuration: + pad_initial_level: High + MRAM_MISO: + name: PC18 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC18 + mode: Digital input + user_label: MRAM_MISO + configuration: null + MAGNETOMETER_CS: + name: PC19 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC19 + mode: Digital output + user_label: MAGNETOMETER_CS + configuration: + pad_initial_level: High + GYRO_CS: + name: PC20 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC20 + mode: Digital output + user_label: GYRO_CS + configuration: + pad_initial_level: High + PD20: + name: PD20 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PD20 + mode: Peripheral IO + user_label: PD20 + configuration: null + PD21: + name: PD21 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PD21 + mode: Peripheral IO + user_label: PD21 + configuration: null + SBAND_MOSI: + name: PB16 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB16 + mode: Digital output + user_label: SBAND_MOSI + configuration: null + SBAND_SCK: + name: PB17 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB17 + mode: Digital output + user_label: SBAND_SCK + configuration: null + SBAND_MISO: + name: PB18 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB18 + mode: Digital input + user_label: SBAND_MISO + configuration: null + PA20: + name: PA20 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA20 + mode: Peripheral IO + user_label: PA20 + configuration: null + PA21: + name: PA21 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA21 + mode: Peripheral IO + user_label: PA21 + configuration: null + PA22: + name: PA22 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA22 + mode: Peripheral IO + user_label: PA22 + configuration: null + PA23: + name: PA23 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PA23 + mode: Peripheral IO + user_label: PA23 + configuration: null + MRAM_MOSI: + name: PB24 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB24 + mode: Digital output + user_label: MRAM_MOSI + configuration: null + MRAM_SCK: + name: PB25 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB25 + mode: Digital output + user_label: MRAM_SCK + configuration: null + CAMERA_MOSI: + name: PB26 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB26 + mode: Digital output + user_label: CAMERA_MOSI + configuration: null + CAMERA_SCK: + name: PB27 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB27 + mode: Digital output + user_label: CAMERA_SCK + configuration: null + PC30: + name: PC30 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC30 + mode: Analog + user_label: PC30 + configuration: null + PC31: + name: PC31 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PC31 + mode: Analog + user_label: PC31 + configuration: null + PB00: + name: PB00 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB00 + mode: Analog + user_label: PB00 + configuration: null + PB01: + name: PB01 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB01 + mode: Analog + user_label: PB01 + configuration: null + PB02: + name: PB02 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB02 + mode: Analog + user_label: PB02 + configuration: null + PB03: + name: PB03 + definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51P20A-AF::pad::PB03 + mode: Analog + user_label: PB03 + configuration: null +toolchain_options: [] +static_files: []