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[Z80] Fix regression test crashes and fix GlobalISel unit tests
1 parent 4b56c30 commit e3aa74b

5 files changed

Lines changed: 16 additions & 40 deletions

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‎llvm/lib/Target/Z80/GISel/Z80LegalizerInfo.cpp‎

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -148,8 +148,6 @@ Z80LegalizerInfo::Z80LegalizerInfo(const Z80Subtarget &STI,
148148

149149
getActionDefinitionsBuilder({G_ZEXT, G_ANYEXT})
150150
.legalForCartesianProduct(LegalScalars, NotMaxWithOne)
151-
.widenScalarToNextPow2(0, 8)
152-
.widenScalarToNextPow2(1, 1)
153151
.clampScalar(0, *LegalScalars.begin(), *std::prev(LegalScalars.end()))
154152
.clampScalar(1, *NotMaxWithOne.begin(), *std::prev(NotMaxWithOne.end()));
155153

@@ -198,8 +196,6 @@ Z80LegalizerInfo::Z80LegalizerInfo(const Z80Subtarget &STI,
198196

199197
getActionDefinitionsBuilder(G_TRUNC)
200198
.legalForCartesianProduct(NotMaxWithOne, LegalScalars)
201-
.widenScalarToNextPow2(0, 1)
202-
.widenScalarToNextPow2(1, 8)
203199
.clampScalar(1, *LegalScalars.begin(), *std::prev(LegalScalars.end()))
204200
.clampScalar(0, *NotMaxWithOne.begin(), *std::prev(NotMaxWithOne.end()));
205201

‎llvm/test/CodeGen/Z80/intrinsics.ll‎

Lines changed: 0 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,6 @@ define i8 @abs.i8(i8) {
2020
; Z80-NEXT: ld a, l
2121
; Z80-NEXT: xor a, e
2222
; Z80-NEXT: ld l, a
23-
; Z80-NEXT: ld a, l
2423
; Z80-NEXT: ret
2524
;
2625
; EZ80-CODE16-LABEL: abs.i8:
@@ -38,7 +37,6 @@ define i8 @abs.i8(i8) {
3837
; EZ80-CODE16-NEXT: ld a, l
3938
; EZ80-CODE16-NEXT: xor a, e
4039
; EZ80-CODE16-NEXT: ld l, a
41-
; EZ80-CODE16-NEXT: ld a, l
4240
; EZ80-CODE16-NEXT: ret
4341
;
4442
; EZ80-LABEL: abs.i8:
@@ -56,7 +54,6 @@ define i8 @abs.i8(i8) {
5654
; EZ80-NEXT: ld a, l
5755
; EZ80-NEXT: xor a, e
5856
; EZ80-NEXT: ld l, a
59-
; EZ80-NEXT: ld a, l
6057
; EZ80-NEXT: ret
6158
call i8 @llvm.abs.i8(i8 %0, i1 false)
6259
ret i8 %2
@@ -3281,7 +3278,6 @@ define i8 @fshl.i8(i8, i8, i8) {
32813278
; Z80-NEXT: ld a, e
32823279
; Z80-NEXT: or a, l
32833280
; Z80-NEXT: ld l, a
3284-
; Z80-NEXT: ld a, l
32853281
; Z80-NEXT: ret
32863282
;
32873283
; EZ80-CODE16-LABEL: fshl.i8:
@@ -3309,7 +3305,6 @@ define i8 @fshl.i8(i8, i8, i8) {
33093305
; EZ80-CODE16-NEXT: ld a, e
33103306
; EZ80-CODE16-NEXT: or a, l
33113307
; EZ80-CODE16-NEXT: ld l, a
3312-
; EZ80-CODE16-NEXT: ld a, l
33133308
; EZ80-CODE16-NEXT: ret
33143309
;
33153310
; EZ80-LABEL: fshl.i8:
@@ -3337,7 +3332,6 @@ define i8 @fshl.i8(i8, i8, i8) {
33373332
; EZ80-NEXT: ld a, e
33383333
; EZ80-NEXT: or a, l
33393334
; EZ80-NEXT: ld l, a
3340-
; EZ80-NEXT: ld a, l
33413335
; EZ80-NEXT: ret
33423336
call i8 @llvm.fshl.i8(i8 %0, i8 %1, i8 %2)
33433337
ret i8 %4
@@ -3901,7 +3895,6 @@ define i8 @fshr.i8(i8, i8, i8) {
39013895
; Z80-NEXT: ld a, e
39023896
; Z80-NEXT: or a, l
39033897
; Z80-NEXT: ld l, a
3904-
; Z80-NEXT: ld a, l
39053898
; Z80-NEXT: ret
39063899
;
39073900
; EZ80-CODE16-LABEL: fshr.i8:
@@ -3929,7 +3922,6 @@ define i8 @fshr.i8(i8, i8, i8) {
39293922
; EZ80-CODE16-NEXT: ld a, e
39303923
; EZ80-CODE16-NEXT: or a, l
39313924
; EZ80-CODE16-NEXT: ld l, a
3932-
; EZ80-CODE16-NEXT: ld a, l
39333925
; EZ80-CODE16-NEXT: ret
39343926
;
39353927
; EZ80-LABEL: fshr.i8:
@@ -3957,7 +3949,6 @@ define i8 @fshr.i8(i8, i8, i8) {
39573949
; EZ80-NEXT: ld a, e
39583950
; EZ80-NEXT: or a, l
39593951
; EZ80-NEXT: ld l, a
3960-
; EZ80-NEXT: ld a, l
39613952
; EZ80-NEXT: ret
39623953
call i8 @llvm.fshr.i8(i8 %0, i8 %1, i8 %2)
39633954
ret i8 %4
@@ -5598,7 +5589,6 @@ define i1 @smul.with.overflow.i8(i8, i8) {
55985589
; Z80-NEXT: ld a, l
55995590
; Z80-NEXT: or a, e
56005591
; Z80-NEXT: ld l, a
5601-
; Z80-NEXT: ld a, l
56025592
; Z80-NEXT: or a, a
56035593
; Z80-NEXT: jr z, BB63_6
56045594
; Z80-NEXT: ; %bb.5:
@@ -5702,7 +5692,6 @@ define i1 @smul.with.overflow.i8(i8, i8) {
57025692
; EZ80-CODE16-NEXT: ld a, l
57035693
; EZ80-CODE16-NEXT: or a, e
57045694
; EZ80-CODE16-NEXT: ld l, a
5705-
; EZ80-CODE16-NEXT: ld a, l
57065695
; EZ80-CODE16-NEXT: or a, a
57075696
; EZ80-CODE16-NEXT: jr z, BB63_6
57085697
; EZ80-CODE16-NEXT: ; %bb.5:
@@ -5793,7 +5782,6 @@ define i1 @smul.with.overflow.i8(i8, i8) {
57935782
; EZ80-NEXT: ld a, l
57945783
; EZ80-NEXT: or a, e
57955784
; EZ80-NEXT: ld l, a
5796-
; EZ80-NEXT: ld a, l
57975785
; EZ80-NEXT: or a, a
57985786
; EZ80-NEXT: jr z, BB63_6
57995787
; EZ80-NEXT: ; %bb.5:
@@ -5916,7 +5904,6 @@ define i1 @smul.with.overflow.i16(i16, i16) {
59165904
; Z80-NEXT: ld a, l
59175905
; Z80-NEXT: or a, e
59185906
; Z80-NEXT: ld l, a
5919-
; Z80-NEXT: ld a, l
59205907
; Z80-NEXT: or a, a
59215908
; Z80-NEXT: jr z, BB64_6
59225909
; Z80-NEXT: ; %bb.5:
@@ -6005,7 +5992,6 @@ define i1 @smul.with.overflow.i16(i16, i16) {
60055992
; EZ80-CODE16-NEXT: ld a, l
60065993
; EZ80-CODE16-NEXT: or a, e
60075994
; EZ80-CODE16-NEXT: ld l, a
6008-
; EZ80-CODE16-NEXT: ld a, l
60095995
; EZ80-CODE16-NEXT: or a, a
60105996
; EZ80-CODE16-NEXT: jr z, BB64_6
60115997
; EZ80-CODE16-NEXT: ; %bb.5:
@@ -6102,7 +6088,6 @@ define i1 @smul.with.overflow.i16(i16, i16) {
61026088
; EZ80-NEXT: ld a, l
61036089
; EZ80-NEXT: or a, e
61046090
; EZ80-NEXT: ld l, a
6105-
; EZ80-NEXT: ld a, l
61066091
; EZ80-NEXT: or a, a
61076092
; EZ80-NEXT: jr z, BB64_6
61086093
; EZ80-NEXT: ; %bb.5:

‎llvm/test/CodeGen/Z80/operations.ll‎

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -599,7 +599,6 @@ define i8 @and.i8(i8, i8) {
599599
; EZ80-NEXT: ld l, (iy + 6)
600600
; EZ80-NEXT: and a, l
601601
; EZ80-NEXT: ld l, a
602-
; EZ80-NEXT: ld a, l
603602
; EZ80-NEXT: ret
604603
and i8 %0, %1
605604
ret i8 %3
@@ -826,7 +825,6 @@ define i8 @or.i8(i8, i8) {
826825
; EZ80-NEXT: ld l, (iy + 6)
827826
; EZ80-NEXT: or a, l
828827
; EZ80-NEXT: ld l, a
829-
; EZ80-NEXT: ld a, l
830828
; EZ80-NEXT: ret
831829
or i8 %0, %1
832830
ret i8 %3
@@ -1053,7 +1051,6 @@ define i8 @xor.i8(i8, i8) {
10531051
; EZ80-NEXT: ld l, (iy + 6)
10541052
; EZ80-NEXT: xor a, l
10551053
; EZ80-NEXT: ld l, a
1056-
; EZ80-NEXT: ld a, l
10571054
; EZ80-NEXT: ret
10581055
xor i8 %0, %1
10591056
ret i8 %3
@@ -1280,7 +1277,6 @@ define i8 @add.i8(i8, i8) {
12801277
; EZ80-NEXT: ld l, (iy + 6)
12811278
; EZ80-NEXT: add a, l
12821279
; EZ80-NEXT: ld l, a
1283-
; EZ80-NEXT: ld a, l
12841280
; EZ80-NEXT: ret
12851281
add i8 %0, %1
12861282
ret i8 %3
@@ -1563,7 +1559,6 @@ define i8 @sub.i8(i8, i8) {
15631559
; EZ80-NEXT: ld l, (iy + 6)
15641560
; EZ80-NEXT: sub a, l
15651561
; EZ80-NEXT: ld l, a
1566-
; EZ80-NEXT: ld a, l
15671562
; EZ80-NEXT: ret
15681563
sub i8 %0, %1
15691564
ret i8 %3

‎llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp‎

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -199,7 +199,7 @@ TEST_F(AArch64GISelMITest, LowerBitCountingCTTZ0) {
199199
LegalizerHelper Helper(*MF, Info, Observer, B);
200200
// Perform Legalization
201201
EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
202-
Helper.lower(*MIBCTTZ, 0));
202+
Helper.lower(*MIBCTTZ, 0, LLT::scalar(32)));
203203

204204
auto CheckStr = R"(
205205
CHECK: [[CZU:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF %0
@@ -232,7 +232,7 @@ TEST_F(AArch64GISelMITest, LowerBitCountingCTTZ1) {
232232
// Perform Legalization
233233

234234
EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
235-
Helper.lower(*MIBCTTZ, 0));
235+
Helper.lower(*MIBCTTZ, 0, LLT::scalar(64)));
236236

237237
auto CheckStr = R"(
238238
CHECK: [[NEG1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
@@ -337,7 +337,7 @@ TEST_F(AArch64GISelMITest, LowerBitCountingCTTZ2) {
337337

338338
B.setInsertPt(*EntryMBB, MIBCTTZ->getIterator());
339339
EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
340-
Helper.lower(*MIBCTTZ, 0));
340+
Helper.lower(*MIBCTTZ, 0, LLT::scalar(64)));
341341

342342
auto CheckStr = R"(
343343
CHECK: [[NEG1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
@@ -437,7 +437,7 @@ TEST_F(AArch64GISelMITest, LowerBitCountingCTTZ3) {
437437
DummyGISelObserver Observer;
438438
LegalizerHelper Helper(*MF, Info, Observer, B);
439439
EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
440-
Helper.lower(*MIBCTTZ, 0));
440+
Helper.lower(*MIBCTTZ, 0, LLT::scalar(64)));
441441

442442
auto CheckStr = R"(
443443
CHECK: CTTZ
@@ -464,7 +464,7 @@ TEST_F(AArch64GISelMITest, LowerBitCountingCTLZ0) {
464464
DummyGISelObserver Observer;
465465
LegalizerHelper Helper(*MF, Info, Observer, B);
466466
EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
467-
Helper.lower(*MIBCTLZ, 0));
467+
Helper.lower(*MIBCTLZ, 0, LLT::scalar(64)));
468468

469469
auto CheckStr = R"(
470470
CHECK: [[CZU:%[0-9]+]]:_(s64) = G_CTLZ_ZERO_UNDEF %0
@@ -495,7 +495,7 @@ TEST_F(AArch64GISelMITest, LowerBitCountingCTLZLibcall) {
495495
DummyGISelObserver Observer;
496496
LegalizerHelper Helper(*MF, Info, Observer, B);
497497
EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
498-
Helper.lower(*MIBCTLZ, 0));
498+
Helper.lower(*MIBCTLZ, 0, LLT::scalar(32)));
499499

500500
auto CheckStr = R"(
501501
CHECK: [[CZU:%[0-9]+]]:_(s32) = G_CTLZ_ZERO_UNDEF %0
@@ -528,7 +528,7 @@ TEST_F(AArch64GISelMITest, LowerBitCountingCTLZ1) {
528528
DummyGISelObserver Observer;
529529
LegalizerHelper Helper(*MF, Info, Observer, B);
530530
EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
531-
Helper.lower(*MIBCTLZ, 0));
531+
Helper.lower(*MIBCTLZ, 0, s8));
532532

533533
auto CheckStr = R"(
534534
CHECK: [[Trunc:%[0-9]+]]:_(s8) = G_TRUNC
@@ -1604,7 +1604,7 @@ TEST_F(AArch64GISelMITest, LowerFNEG) {
16041604
Helper.lower(*FNeg0, 0, LLT::scalar(64)));
16051605
B.setInstr(*FNeg1);
16061606
EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
1607-
Helper.lower(*FNeg1, 0));
1607+
Helper.lower(*FNeg1, 0, LLT::scalar(64)));
16081608

16091609
auto CheckStr = R"(
16101610
CHECK: [[FADD:%[0-9]+]]:_(s64) = nsz G_FADD %0:_, %1:_
@@ -1658,7 +1658,7 @@ TEST_F(AArch64GISelMITest, LowerMinMax) {
16581658
Helper.lower(*UMin, 0, s64));
16591659
B.setInstr(*UMax);
16601660
EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
1661-
Helper.lower(*UMax, 0));
1661+
Helper.lower(*UMax, 0, s64));
16621662

16631663
B.setInstr(*SMinV);
16641664
EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
@@ -1671,7 +1671,7 @@ TEST_F(AArch64GISelMITest, LowerMinMax) {
16711671
Helper.lower(*UMinV, 0, v2s32));
16721672
B.setInstr(*UMaxV);
16731673
EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
1674-
Helper.lower(*UMaxV, 0));
1674+
Helper.lower(*UMaxV, 0, v2s32));
16751675

16761676
auto CheckStr = R"(
16771677
CHECK: [[CMP0:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), %0:_(s64), %1:_

‎llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -45,10 +45,10 @@ TEST_F(AArch64GISelMITest, MatchIntConstantRegister) {
4545
if (!TM)
4646
GTEST_SKIP();
4747
auto MIBCst = B.buildConstant(LLT::scalar(64), 42);
48-
ValueAndVReg Src0;
48+
std::optional<ValueAndVReg> Src0;
4949
bool match = mi_match(MIBCst.getReg(0), *MRI, m_GCst(Src0));
5050
EXPECT_TRUE(match);
51-
EXPECT_EQ(Src0.VReg, MIBCst.getReg(0));
51+
EXPECT_EQ(Src0->VReg, MIBCst.getReg(0));
5252
}
5353

5454
TEST_F(AArch64GISelMITest, MatchIntConstantSplat) {
@@ -706,14 +706,14 @@ TEST_F(AArch64GISelMITest, MatchFPOrIntConst) {
706706

707707
Register IntOne = B.buildConstant(LLT::scalar(64), 1).getReg(0);
708708
Register FPOne = B.buildFConstant(LLT::scalar(64), 1.0).getReg(0);
709-
ValueAndVReg ValReg;
709+
std::optional<ValueAndVReg> ValReg;
710710
std::optional<FPValueAndVReg> FValReg;
711711

712-
EXPECT_TRUE(mi_match(IntOne, *MRI, m_ICst(ValReg)));
713-
EXPECT_EQ(IntOne, ValReg.VReg);
712+
EXPECT_TRUE(mi_match(IntOne, *MRI, m_GCst(ValReg)));
713+
EXPECT_EQ(IntOne, ValReg->VReg);
714714
EXPECT_FALSE(mi_match(IntOne, *MRI, m_GFCst(FValReg)));
715715

716-
EXPECT_FALSE(mi_match(FPOne, *MRI, m_ICst(ValReg)));
716+
EXPECT_FALSE(mi_match(FPOne, *MRI, m_GCst(ValReg)));
717717
EXPECT_TRUE(mi_match(FPOne, *MRI, m_GFCst(FValReg)));
718718
EXPECT_EQ(FPOne, FValReg->VReg);
719719
}

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