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test(bench): add llsc_tzconvert_bench fixture for ARM64 CAS livelock repro
Repeated localtime()/__tz_convert() calls exercise the outline-atomics LDAXR/STXR CAS loop (glibc tzset_lock) that triggered the ARM64 fallback-LL/SC livelock. Wired into generate_config.py's CI matrix; the CI workflow compiles it fresh (no arch-specific deps beyond libc), so unlike testdata/take_strings-* it isn't checked in as a binary.
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.github/workflows/codspeed.yml

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- name: Install uv
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uses: astral-sh/setup-uv@v5
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# Compiled locally rather than checked in (unlike the take_strings-*
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# binaries) since it has no arch-specific dependencies beyond libc.
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- name: Build bench fixtures
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working-directory: bench/testdata
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run: cc -O2 -o llsc_tzconvert_bench llsc_tzconvert_bench.c
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# Generate the codspeed.yml for this Valgrind version. The script derives
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# the version label from `valgrind --version`, so each matrix job emits its
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# own config (e.g. valgrind.codspeed / valgrind-3.26.0 / valgrind-3.25.1).

.gitignore

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# Capstone build install prefix (built from the third_party/capstone submodule)
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/.capstone
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# fake CodSpeed benchmark fixture binary (compiled from testdata/llsc_tzconvert_bench.c)
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/bench/testdata/llsc_tzconvert_bench
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# python bytecode cache left behind when something imports generate_config.py as a module
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/bench/__pycache__/

bench/generate_config.py

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"python3 testdata/test.py",
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"stress-ng --cpu 1 --cpu-ops 10",
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"stress-ng --cpu 4 --cpu-ops 10",
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# Repeated localtime()/__tz_convert() calls: the guest CAS loop
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# (outline-atomics LDAXR/STXR helper) that triggered the ARM64
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# fallback-LL/SC livelock fix. Built by the "Build bench fixtures" CI
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# step from testdata/llsc_tzconvert_bench.c (not checked in as a binary).
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"testdata/llsc_tzconvert_bench 5000",
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]
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# Callgrind configurations: (extra args, config name, requires_codspeed). The
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version https://git-lfs.github.com/spec/v1
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oid sha256:f428498cf6aa54398cc0c15877680c54e26a1e66e06669cf87b4a55c900e19d3
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size 1188

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