graph LR
Instruction_Set_Data_ISD_Parsers_Orchestrator_["Instruction Set Data (ISD) & Parsers (Orchestrator)"]
Instruction_Database_Processor["Instruction Database Processor"]
Map_Information_Reader["Map Information Reader"]
Instruction_Set_Data_ISD_Parsers_Orchestrator_ -- "orchestrates" --> Instruction_Database_Processor
Instruction_Set_Data_ISD_Parsers_Orchestrator_ -- "orchestrates" --> Map_Information_Reader
External_Chip_Model_Integrator -- "provides data to" --> Instruction_Database_Processor
External_Constant_Tables_Manager -- "provides data to" --> Instruction_Database_Processor
Instruction_Database_Processor -- "provides structured instruction data to" --> External_Instruction_Set_Code_Generator_Graph_Builder
Map_Information_Reader -- "provides mapping data to" --> External_Instruction_Length_Decoder_Generator
Map_Information_Reader -- "provides mapping data to" --> External_Instruction_Set_Code_Generator_Graph_Builder
The Instruction Set Data Processing Subsystem is responsible for the comprehensive ingestion, parsing, and structuring of raw instruction set definition data. Orchestrated by the Instruction Set Data (ISD) & Parsers (Orchestrator), this subsystem processes diverse input sources to produce a unified, machine-consumable format. The Instruction Database Processor handles the detailed parsing and refinement of instruction definitions, incorporating data from external sources like the Chip Model Integrator and Constant Tables Manager. Concurrently, the Map Information Reader extracts and provides essential opcode encoding and instruction form mapping data. The structured instruction data and mapping information are then made available to external downstream components, such as the Instruction Set Code Generator & Graph Builder and the Instruction Length Decoder Generator, enabling the generation of code and decoders based on the processed instruction set.
This component serves as the high-level orchestrator and facade for the instruction set data processing subsystem. It coordinates the overall process of reading, parsing, and structuring raw instruction set definition data from various input sources, ensuring the output is a unified, machine-consumable format. It represents the primary interface for other parts of the system to access the processed instruction data.
Related Classes/Methods:
This specialized component is responsible for the detailed ingestion and parsing of raw instruction definitions. It performs critical tasks such as refining operand widths, computing memory operand properties, and expanding compound values. Its primary output is a highly structured representation of the core instruction set data, ready for further processing by external components.
Related Classes/Methods:
This component is dedicated to parsing and providing essential mapping data. This includes critical information related to opcode encoding spaces and instruction forms, which is vital for understanding how instructions are encoded and decoded within the instruction set architecture. This data is consumed by external components that generate decoders or code.
Related Classes/Methods: