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| 1 | +/* |
| 2 | + * Copyright (c) Meta Platforms, Inc. and affiliates. |
| 3 | + * All rights reserved. |
| 4 | + * |
| 5 | + * This source code is licensed under the BSD-style license found in the |
| 6 | + * LICENSE file in the root directory of this source tree. |
| 7 | + */ |
| 8 | + |
| 9 | +#include <cuda_runtime.h> |
| 10 | +#include <executorch/kernels/portable/Functions.h> |
| 11 | +#include <executorch/runtime/core/device_allocator.h> |
| 12 | +#include <executorch/runtime/core/exec_aten/exec_aten.h> |
| 13 | +#include <executorch/runtime/core/portable_type/tensor_impl.h> |
| 14 | +#include <executorch/runtime/kernel/kernel_runtime_context.h> |
| 15 | +#include <executorch/runtime/platform/runtime.h> |
| 16 | +#include <gtest/gtest.h> |
| 17 | + |
| 18 | +#if (defined(__has_feature) && __has_feature(address_sanitizer)) || \ |
| 19 | + defined(__SANITIZE_ADDRESS__) |
| 20 | +#include <sanitizer/lsan_interface.h> |
| 21 | +#define EXECUTORCH_CUDA_DEVICE_COPY_HAS_LSAN_INTERFACE 1 |
| 22 | +#else |
| 23 | +#define EXECUTORCH_CUDA_DEVICE_COPY_HAS_LSAN_INTERFACE 0 |
| 24 | +#endif |
| 25 | + |
| 26 | +#include <cstdint> |
| 27 | +#include <memory> |
| 28 | +#include <vector> |
| 29 | + |
| 30 | +using executorch::aten::ScalarType; |
| 31 | +using executorch::aten::Tensor; |
| 32 | +using executorch::aten::TensorImpl; |
| 33 | +using executorch::runtime::Error; |
| 34 | +using executorch::runtime::get_device_allocator; |
| 35 | +using executorch::runtime::KernelRuntimeContext; |
| 36 | +using executorch::runtime::TensorShapeDynamism; |
| 37 | +using executorch::runtime::etensor::DeviceIndex; |
| 38 | +using executorch::runtime::etensor::DeviceType; |
| 39 | + |
| 40 | +namespace { |
| 41 | + |
| 42 | +struct CudaDeleter { |
| 43 | + void operator()(void* ptr) const { |
| 44 | + if (ptr != nullptr) { |
| 45 | + cudaFree(ptr); |
| 46 | + } |
| 47 | + } |
| 48 | +}; |
| 49 | + |
| 50 | +using CudaPtr = std::unique_ptr<void, CudaDeleter>; |
| 51 | + |
| 52 | +CudaPtr allocate_cuda(size_t nbytes) { |
| 53 | + void* ptr = nullptr; |
| 54 | + const cudaError_t err = cudaMalloc(&ptr, nbytes); |
| 55 | + EXPECT_EQ(err, cudaSuccess) << "cudaMalloc failed"; |
| 56 | + return CudaPtr(ptr); |
| 57 | +} |
| 58 | + |
| 59 | +bool is_cuda_available() { |
| 60 | +#if EXECUTORCH_CUDA_DEVICE_COPY_HAS_LSAN_INTERFACE |
| 61 | + __lsan_disable(); |
| 62 | +#endif |
| 63 | + int device_count = 0; |
| 64 | + const cudaError_t err = cudaGetDeviceCount(&device_count); |
| 65 | +#if EXECUTORCH_CUDA_DEVICE_COPY_HAS_LSAN_INTERFACE |
| 66 | + __lsan_enable(); |
| 67 | +#endif |
| 68 | + return err == cudaSuccess && device_count > 0; |
| 69 | +} |
| 70 | + |
| 71 | +std::vector<float> copy_cuda_to_host(const void* device_ptr, size_t numel) { |
| 72 | + std::vector<float> host(numel); |
| 73 | + const cudaError_t err = cudaMemcpy( |
| 74 | + host.data(), device_ptr, numel * sizeof(float), cudaMemcpyDeviceToHost); |
| 75 | + EXPECT_EQ(err, cudaSuccess) << "cudaMemcpy D2H failed"; |
| 76 | + return host; |
| 77 | +} |
| 78 | + |
| 79 | +void copy_host_to_cuda(const std::vector<float>& host, void* device_ptr) { |
| 80 | + const cudaError_t err = cudaMemcpy( |
| 81 | + device_ptr, |
| 82 | + host.data(), |
| 83 | + host.size() * sizeof(float), |
| 84 | + cudaMemcpyHostToDevice); |
| 85 | + EXPECT_EQ(err, cudaSuccess) << "cudaMemcpy H2D failed"; |
| 86 | +} |
| 87 | + |
| 88 | +class CudaDeviceCopyOpTest : public ::testing::Test { |
| 89 | + protected: |
| 90 | + static void SetUpTestSuite() { |
| 91 | + executorch::runtime::runtime_init(); |
| 92 | + ASSERT_NE(get_device_allocator(DeviceType::CUDA), nullptr) |
| 93 | + << "Linking cuda_backend should auto-register the CUDA allocator"; |
| 94 | + } |
| 95 | + |
| 96 | + void SetUp() override { |
| 97 | + if (!is_cuda_available()) { |
| 98 | + GTEST_SKIP() << "CUDA not available, skipping CUDA device copy op tests"; |
| 99 | + } |
| 100 | + } |
| 101 | + |
| 102 | + Tensor& op_h2d_copy_out(const Tensor& self, Tensor& out) { |
| 103 | + return torch::executor::et_copy::_h2d_copy_outf(context_, self, out); |
| 104 | + } |
| 105 | + |
| 106 | + Tensor& op_d2h_copy_out(const Tensor& self, Tensor& out) { |
| 107 | + return torch::executor::et_copy::_d2h_copy_outf(context_, self, out); |
| 108 | + } |
| 109 | + |
| 110 | + KernelRuntimeContext context_; |
| 111 | +}; |
| 112 | + |
| 113 | +} // namespace |
| 114 | + |
| 115 | +TEST_F(CudaDeviceCopyOpTest, H2dCopyUsesRegisteredCudaAllocator) { |
| 116 | + std::vector<float> src_data = {1.0f, 2.0f, 3.0f, 4.0f}; |
| 117 | + auto device_data = allocate_cuda(src_data.size() * sizeof(float)); |
| 118 | + ASSERT_NE(device_data.get(), nullptr); |
| 119 | + |
| 120 | + int32_t sizes[] = {static_cast<int32_t>(src_data.size())}; |
| 121 | + uint8_t dim_order[] = {0}; |
| 122 | + int32_t strides[] = {1}; |
| 123 | + |
| 124 | + TensorImpl src_impl( |
| 125 | + ScalarType::Float, |
| 126 | + 1, |
| 127 | + sizes, |
| 128 | + src_data.data(), |
| 129 | + dim_order, |
| 130 | + strides, |
| 131 | + TensorShapeDynamism::STATIC, |
| 132 | + DeviceType::CPU, |
| 133 | + 0); |
| 134 | + Tensor src(&src_impl); |
| 135 | + |
| 136 | + TensorImpl dst_impl( |
| 137 | + ScalarType::Float, |
| 138 | + 1, |
| 139 | + sizes, |
| 140 | + device_data.get(), |
| 141 | + dim_order, |
| 142 | + strides, |
| 143 | + TensorShapeDynamism::STATIC, |
| 144 | + DeviceType::CUDA, |
| 145 | + 0); |
| 146 | + Tensor dst(&dst_impl); |
| 147 | + |
| 148 | + Tensor& result = op_h2d_copy_out(src, dst); |
| 149 | + |
| 150 | + EXPECT_EQ(context_.failure_state(), Error::Ok); |
| 151 | + EXPECT_EQ(&result, &dst); |
| 152 | + EXPECT_EQ(copy_cuda_to_host(device_data.get(), src_data.size()), src_data); |
| 153 | +} |
| 154 | + |
| 155 | +TEST_F(CudaDeviceCopyOpTest, D2hCopyUsesRegisteredCudaAllocator) { |
| 156 | + const std::vector<float> expected = {5.0f, 6.0f, 7.0f, 8.0f}; |
| 157 | + auto device_data = allocate_cuda(expected.size() * sizeof(float)); |
| 158 | + ASSERT_NE(device_data.get(), nullptr); |
| 159 | + copy_host_to_cuda(expected, device_data.get()); |
| 160 | + |
| 161 | + std::vector<float> dst_data(expected.size(), 0.0f); |
| 162 | + int32_t sizes[] = {static_cast<int32_t>(expected.size())}; |
| 163 | + uint8_t dim_order[] = {0}; |
| 164 | + int32_t strides[] = {1}; |
| 165 | + |
| 166 | + TensorImpl src_impl( |
| 167 | + ScalarType::Float, |
| 168 | + 1, |
| 169 | + sizes, |
| 170 | + device_data.get(), |
| 171 | + dim_order, |
| 172 | + strides, |
| 173 | + TensorShapeDynamism::STATIC, |
| 174 | + DeviceType::CUDA, |
| 175 | + 0); |
| 176 | + Tensor src(&src_impl); |
| 177 | + |
| 178 | + TensorImpl dst_impl( |
| 179 | + ScalarType::Float, |
| 180 | + 1, |
| 181 | + sizes, |
| 182 | + dst_data.data(), |
| 183 | + dim_order, |
| 184 | + strides, |
| 185 | + TensorShapeDynamism::STATIC, |
| 186 | + DeviceType::CPU, |
| 187 | + 0); |
| 188 | + Tensor dst(&dst_impl); |
| 189 | + |
| 190 | + Tensor& result = op_d2h_copy_out(src, dst); |
| 191 | + |
| 192 | + EXPECT_EQ(context_.failure_state(), Error::Ok); |
| 193 | + EXPECT_EQ(&result, &dst); |
| 194 | + EXPECT_EQ(dst_data, expected); |
| 195 | +} |
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