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Merge pull request #61 from CompilerProgramming/float
Add a Float primitive type.
2 parents 92076c2 + d3ab43c commit b05404c

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.gitignore

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.idea
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target
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target
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*.o
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.run

README.md

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@@ -9,11 +9,11 @@ The EeZee programming language is designed to allow us to learn various compiler
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The EeZee programming language is a tiny statically typed language with syntax inspired by Swift.
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The language has the following features:
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* Integer, Struct and 1-Dimensional Array types
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* Integer, Float, Struct and 1-Dimensional Array types
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* If and While statements
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* Functions
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The EeZee language specification is [available](https://compilerprogramming.github.io/ez-lang.html).
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The EeZee language specification is [available](./docs/ez-lang.rst).
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The language is intentionally very simple and is meant to have just enough functionality to experiment with compiler implementation techniques.
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## Modules
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* [seaofnodes](./seaofnodes/README.md) - WIP compiler that generates Sea of Nodes IR, using SoN backend from [Simple Chapter 21](https://github.com/SeaOfNodes/Simple).
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Generates native code for X86-64, AArch64 and RISC-V.
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## Documentation
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See [docs](./docs)
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## How can you contribute?
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The project is educational, with a focus on exploring various compiler algorithms and data structures.

antlr-parser/src/main/antlr4/com/compilerprogramming/ezlang/antlr/EZLanguage.g4

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nominalType
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: 'Int'
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| 'Float'
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| IDENTIFIER ('?')?
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;
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;
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multiplicationExpression
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: unaryExpression (('*' | '/' ) unaryExpression)*
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: unaryExpression (('*' | '/' | '%') unaryExpression)*
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;
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unaryExpression
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primaryExpression
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: INTEGER_LITERAL
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| FLOAT_LITERAL
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| IDENTIFIER
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| '(' orExpression ')'
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| 'new' typeName initExpression
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INTEGER_LITERAL
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: DEC_LITERAL
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;
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DEC_LITERAL: DEC_DIGIT (DEC_DIGIT | '_')*;
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DEC_LITERAL: DEC_DIGIT+;
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FLOAT_LITERAL: DEC_DIGIT+ '.' DEC_DIGIT*;
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fragment DEC_DIGIT: [0-9];
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docs/README.md

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# Documentation
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This folder contains language and compiler design notes for ez-lang.
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## Language
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- [EeZee Programming Language](ez-lang.rst) - Source language overview, including syntax, types, control flow, expressions, and grammar.
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## Intermediate Representations
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- [Intermediate Representations](ir-overview.rst) - Overview of the compiler IRs used in the project, including stack-based, register-based, and sea-of-nodes forms.
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- [IR Design Instructions](ir-design-instructions.md) - Notes on designing linear IRs, including basic blocks, control flow graphs, and instruction organization.
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- [Virtual Registers](ir-virtual-registers.md) - Design discussion for virtual register representation, source variable slots, temporaries, and register identity.
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## Data-Flow And SSA
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- [Liveness Analysis](liveness.md) - Description of the liveness sets and algorithm used by the optimizing VM.
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- [SSA Construction](ssa-construction.md) - Explanation of SSA conversion, dominance-frontier phi placement, and register renaming.
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- [SSA Destruction Using Briggs](ssa-destruction-briggs.md) - Explanation of the Briggs SSA destruction algorithm and how phi nodes are lowered to copies.

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