|
| 1 | +2026-06-24 Oleg Tolmatcev <oleg.tolmatcev@gmail.com> |
| 2 | + |
| 3 | + * config/i386/prfchwintrin.h (_m_prefetchw): Take |
| 4 | + volatile const void * instead of void *. |
| 5 | + |
| 6 | +2026-06-24 Andrew MacLeod <amacleod@redhat.com> |
| 7 | + |
| 8 | + PR tree-optimization/125910 |
| 9 | + * value-range.cc (prange::set_pt): Do not set PT when zero. |
| 10 | + (prange::intersect): If the result is zero_p, clear PT. |
| 11 | + (prange::verify_range): Verify points-to range is valid. |
| 12 | + * value-range.h (zero_p): Do not assert, move to verify range. |
| 13 | + (prange::set_pt): Only set PT when the range valid. |
| 14 | + |
| 15 | +2026-06-24 Vineet Gupta <vineet.gupta@linux.dev> |
| 16 | + |
| 17 | + PR debug/125421 |
| 18 | + * dwarf2out.cc (modified_type_die): Handle qualified_type being |
| 19 | + a variant of dtype as if they were identical to avoid peeling a |
| 20 | + typdef. |
| 21 | + For named types, use dentry unconditionally as that is valid for |
| 22 | + both cases of qualified_type == and != dentry. |
| 23 | + |
| 24 | +2026-06-24 Paul-Antoine Arras <parras@baylibre.com> |
| 25 | + |
| 26 | + * omp-builtins.def (BUILT_IN_GOMP_REDUCTION_START): New builtin. |
| 27 | + (BUILT_IN_GOMP_REDUCTION_END): New builtin. |
| 28 | + * omp-low.cc (lower_reduction_clauses): Replace |
| 29 | + BUILT_IN_GOMP_ATOMIC_START / BUILT_IN_GOMP_ATOMIC_END with |
| 30 | + BUILT_IN_GOMP_REDUCTION_START / BUILT_IN_GOMP_REDUCTION_END. |
| 31 | + (lower_omp_sections): Likewise. |
| 32 | + (lower_omp_scope): Likewise. |
| 33 | + (lower_omp_for): Likewise. |
| 34 | + * tree-ssa-alias.cc (check_fnspec): Handle |
| 35 | + BUILT_IN_GOMP_REDUCTION_START and BUILT_IN_GOMP_REDUCTION_END as |
| 36 | + memory barriers. |
| 37 | + |
| 38 | +2026-06-24 Paul-Antoine Arras <parras@baylibre.com> |
| 39 | + |
| 40 | + * omp-builtins.def (BUILT_IN_GOMP_BARRIER): Change function to |
| 41 | + GOMP_barrier_ext and type to BT_FN_VOID_INT. |
| 42 | + (BUILT_IN_GOMP_BARRIER_CANCEL): Change function to |
| 43 | + GOMP_barrier_cancel_ext and type to BT_FN_VOID_INT. |
| 44 | + * omp-expand.cc (expand_omp_for_static_nochunk): Pass |
| 45 | + GOMP_BARRIER_IMPLICIT_WORKSHARE to omp_build_barrier. |
| 46 | + (expand_omp_for_static_chunk): Likewise. |
| 47 | + (expand_omp_single): Likewise. |
| 48 | + * omp-general.cc (omp_build_barrier): Add kind parameter; pass it |
| 49 | + to GOMP_barrier_ext or GOMP_barrier_cancel_ext. |
| 50 | + * omp-general.h (omp_build_barrier): Update declaration to add |
| 51 | + kind parameter. |
| 52 | + * omp-low.cc (lower_rec_input_clauses): Determine barrier kind from |
| 53 | + the enclosing gimple statement code and pass it to omp_build_barrier. |
| 54 | + (lower_omp_for_scan): Pass GOMP_BARRIER_IMPLICIT_WORKSHARE to |
| 55 | + omp_build_barrier. |
| 56 | + |
| 57 | +2026-06-24 Paul-Antoine Arras <parras@baylibre.com> |
| 58 | + |
| 59 | + * builtin-types.def (BT_COMPLEX_INT, BT_FN_COMPLEX_INT): New types. |
| 60 | + * omp-builtins.def (BUILT_IN_GOMP_LOOP_STATIC_WORKSHARING): New |
| 61 | + builtin. |
| 62 | + (BUILT_IN_GOMP_DISTRIBUTE_STATIC_WORKSHARING): Likewise. |
| 63 | + * omp-expand.cc (expand_omp_for_static_nochunk): Replace separate calls |
| 64 | + to public API functions with a single call to |
| 65 | + GOMP_loop_static_worksharing or GOMP_distribute_static_worksharing, then |
| 66 | + unpack id and count. |
| 67 | + (expand_omp_for_static_chunk): Likewise. |
| 68 | + |
| 69 | +2026-06-24 Paul-Antoine Arras <parras@baylibre.com> |
| 70 | + |
| 71 | + * omp-builtins.def (BUILT_IN_GOMP_HAS_MASKED_THREAD_NUM): New builtin. |
| 72 | + * omp-low.cc (lower_omp_master): Call it. |
| 73 | + |
| 74 | +2026-06-24 Filip Kastl <fkastl@suse.cz> |
| 75 | + |
| 76 | + * gimple-ssa-pta-constraints.cc (handle_call_arg): Mention in |
| 77 | + comment that the function can get called in IPA mode. |
| 78 | + |
| 79 | +2026-06-24 Richard Biener <rguenther@suse.de> |
| 80 | + |
| 81 | + PR tree-optimization/110743 |
| 82 | + * tree-ssa-uninit.cc (maybe_warn_operand): Also cover |
| 83 | + VIEW_CONVERT_EXPR uses for RMW bit clear/set pattern |
| 84 | + detection. |
| 85 | + |
| 86 | +2026-06-24 Jeevitha Palanisamy <jeevitha@linux.ibm.com> |
| 87 | + |
| 88 | + * config/rs6000/altivec.md (V16QI_V2DI): New mode iterator. |
| 89 | + (add<mode>3): Split into two patterns to support future ISA |
| 90 | + alternatives. |
| 91 | + (sub<mode>3): Likewise. |
| 92 | + * config/rs6000/vsx.md (VIArith): New mode iterator. |
| 93 | + (vsx_mul<mode>3): New insn pattern. |
| 94 | + (smul<mode>3_highpart): Split into mode-specific patterns. |
| 95 | + (umul<mode>3_highpart): Likewise. |
| 96 | + (smulv8hi3_highpart): New insn pattern. |
| 97 | + (smulv4si3_highpart): Likewise. |
| 98 | + (smulv2di3_highpart): Likewise. |
| 99 | + (umulv8hi3_highpart): Likewise. |
| 100 | + (umulv4si3_highpart): Likewise. |
| 101 | + (umulv2di3_highpart): Likewise. |
| 102 | + * config/rs6000/rs6000-builtins.def (__builtin_vsx_xvmulhuh): New |
| 103 | + builtin. |
| 104 | + (__builtin_vsx_xvmulhsh): Likewise. |
| 105 | + * config/rs6000/rs6000-overload.def (__builtin_vec_mulh): Add |
| 106 | + overloads for vector multiply-high signed/unsigned halfword. |
| 107 | + * config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add entry for |
| 108 | + BSTZ_FUTURE_VSX. |
| 109 | + (stanza_map): Add future-vsx stanza mapping. |
| 110 | + (enable_string): Add ENB_FUTURE_VSX. |
| 111 | + (write_decls): Add ENB_FUTURE_VSX to the bif_enable enum in the |
| 112 | + generated header file. |
| 113 | + * config/rs6000/rs6000.md (define_attr "isa"): Add future to the list |
| 114 | + of ISA values. |
| 115 | + (define_attr "enabled"): Add check for future ISA. |
| 116 | + * config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Handle |
| 117 | + ENB_FUTURE_VSX and issue a diagnostic requiring -mcpu=future and -mvsx. |
| 118 | + (rs6000_builtin_is_supported): Return TARGET_FUTURE && TARGET_VSX |
| 119 | + for ENB_FUTURE_VSX built-ins. |
| 120 | + * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions Available |
| 121 | + on Future ISA): Document new functions. |
| 122 | + |
| 123 | +2026-06-24 Christopher Bazley <chris.bazley@arm.com> |
| 124 | + |
| 125 | + * config/aarch64/aarch64-sve.md: Update |
| 126 | + vec_init<mode><Vel> and vec_shl_insert_<mode> to |
| 127 | + accept all SVE vector modes. |
| 128 | + |
| 129 | +2026-06-24 H.J. Lu <hjl.tools@gmail.com> |
| 130 | + |
| 131 | + PR target/125958 |
| 132 | + * config/i386/i386-expand.cc (ix86_expand_lcp_stall_peephole): |
| 133 | + Replace !REG_P (dest) with !GENERAL_REG_P (dest). |
| 134 | + |
| 135 | +2026-06-24 Lili Cui <lili.cui@intel.com> |
| 136 | + |
| 137 | + * config/i386/x86-tune-costs.h (generic_cost): Increase branch |
| 138 | + mispredict scale from COSTS_N_INSNS (2) to COSTS_N_INSNS (2) + 3. |
| 139 | + |
| 140 | +2026-06-24 Jan Beulich <jbeulich@suse.com> |
| 141 | + |
| 142 | + * doc/ifn.texi: Drop blanks after @code. |
| 143 | + |
1 | 144 | 2026-06-23 Kwok Cheung Yeung <kcyeung@baylibre.com> |
2 | 145 | Sandra Loosemore <sloosemore@baylibre.com> |
3 | 146 |
|
|
0 commit comments