Skip to content

Commit 9769e8a

Browse files
author
GCC Administrator
committed
Daily bump.
1 parent b524850 commit 9769e8a

8 files changed

Lines changed: 547 additions & 1 deletion

File tree

ChangeLog

Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,36 @@
1+
2026-05-27 Richard Earnshaw <rearnsha@arm.com>
2+
3+
* MAINTAINERS (Contributing under the DCO): Secondary sort
4+
by email address.
5+
6+
2026-05-27 Richard Earnshaw <rearnsha@arm.com>
7+
8+
* MAINTAINERS (Write After Approval): Secondary sort by email.
9+
10+
2026-05-27 Richard Earnshaw <rearnsha@arm.com>
11+
12+
* MAINTAINERS (Reviewers): Sort entries.
13+
14+
2026-05-27 Richard Earnshaw <rearnsha@arm.com>
15+
16+
* MAINTAINERS (Various Maintainers): Sort entries.
17+
18+
2026-05-27 Richard Earnshaw <rearnsha@arm.com>
19+
20+
* MAINTAINERS (Language Front Ends Maintainers): Sort entries.
21+
22+
2026-05-27 Richard Earnshaw <rearnsha@arm.com>
23+
24+
* MAINTAINERS (OS Port Maintainers): Sort entries.
25+
26+
2026-05-27 Richard Earnshaw <rearnsha@arm.com>
27+
28+
* MAINTAINERS (CPU Maintainers): Sort by CPU and then user.
29+
30+
2026-05-27 Evgeny Karpov <evgeny.karpov@arm.com>
31+
32+
* MAINTAINERS: Update my email address.
33+
134
2026-05-15 Karl Meakin <karl.meakin@arm.com>
235

336
* .editorconfig (COMMIT_EDITMSG): New section.

contrib/ChangeLog

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,13 @@
1+
2026-05-27 Richard Earnshaw <rearnsha@arm.com>
2+
3+
* check-MAINTAINERS.py (get_surname): Rename to ...
4+
(get_name_for_sort): ... this. Add the forenames after the
5+
surname.
6+
(check_group): match against regexs and support additional
7+
fields for secondary sorting.
8+
(sections): Rework to use regexs, add rules for the other
9+
sections in the MAINTAINERS file.
10+
111
2026-05-12 Léo Hardt <leom.hardt@inf.ufrgs.br>
212

313
* texi2pod.pl: Remove rule to parse the defunct @gol macro.

gcc/ChangeLog

Lines changed: 99 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,102 @@
1+
2026-05-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
2+
Konstantinos Eleftheriou <konstantinos.eleftheriou@vrull.eu>
3+
4+
* ext-dce.cc (ext_dce_try_optimize_extension): Handle
5+
SIGN_EXTEND of MEM by replacing with ZERO_EXTEND of MEM
6+
when upper bits are dead.
7+
8+
2026-05-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
9+
Konstantinos Eleftheriou <konstantinos.eleftheriou@vrull.eu>
10+
11+
* ext-dce.cc (ext_dce_process_uses): Fix off-by-one: use
12+
size > 32 instead of size >= 32 for group 3 liveness.
13+
14+
2026-05-27 Wilco Dijkstra <wilco.dijkstra@arm.com>
15+
16+
* config/aarch64/aarch64.md (movdi_aarch64): Use aarch64_output_move_imm
17+
to select w-regs.
18+
* config/aarch64/aarch64.cc (aarch64_output_move_imm): New function.
19+
* config/aarch64/aarch64-protos.h (aarch64_output_move_imm): Add
20+
declaration.
21+
22+
2026-05-27 Tamar Christina <tamar.christina@arm.com>
23+
24+
PR tree-optimization/120164
25+
* tree-if-conv.cc (if_convertible_stmt_p): Detect prefetches.
26+
(predicate_statements): Drop them during predication.
27+
28+
2026-05-27 oltolm <oleg.tolmatcev@gmail.com>
29+
30+
PR target/54412
31+
* target.def (overaligned_stack_slot_required): New calls hook.
32+
* calls.cc (allocate_call_dynamic_stack_space): New helper.
33+
(initialize_argument_information): Use
34+
targetm.calls.overaligned_stack_slot_required for over-aligned
35+
by-reference argument copies.
36+
(expand_call): Use
37+
targetm.calls.overaligned_stack_slot_required for over-aligned
38+
hidden return slots.
39+
* function.cc (assign_stack_local_aligned): New helper.
40+
(assign_parm_setup_block): Use
41+
targetm.calls.overaligned_stack_slot_required for over-aligned
42+
stack parm slots.
43+
(assign_parm_setup_reg): Likewise.
44+
* config/i386/i386.cc (ix86_overaligned_stack_slot_required): New.
45+
(TARGET_OVERALIGNED_STACK_SLOT_REQUIRED): Define for i386.
46+
* doc/tm.texi.in: Add hook placement.
47+
* doc/tm.texi: Regenerate.
48+
49+
2026-05-27 oltolm <oleg.tolmatcev@gmail.com>
50+
51+
PR target/89597
52+
* config/i386/i386.cc (function_value_ms_64): Handle 32-byte and
53+
64-byte vector returns in registers when supported.
54+
(ix86_return_in_memory): Do not force 32-byte/64-byte eligible
55+
vector returns to memory for MS ABI.
56+
57+
2026-05-27 Tamar Christina <tamar.christina@arm.com>
58+
59+
PR tree-optimization/120352
60+
* tree-vectorizer.h (LOOP_VINFO_EARLY_BRK_NEEDS_EPILOG): New.
61+
(class _loop_vec_info): Add early_break_needs_epilogue.
62+
* tree-vect-data-refs.cc (vect_analyze_early_break_dependences): Detect
63+
usage of stores.
64+
* tree-vect-loop-manip.cc (vect_do_peeling): Use them.
65+
* tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Likewise.
66+
(vect_create_loop_vinfo): Likewise.
67+
(vect_update_ivs_after_vectorizer_for_early_breaks): Likewise.
68+
* tree-vect-stmts.cc (vect_stmt_relevant_p): Likewise.
69+
70+
2026-05-27 Tamar Christina <tamar.christina@arm.com>
71+
72+
PR tree-optimization/120352
73+
* tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Add
74+
redirect_exits.
75+
(vect_do_peeling): Use it.
76+
* tree-vectorizer.h (slpeel_tree_duplicate_loop_to_edge_cfg): Update
77+
prototype.
78+
79+
2026-05-27 Tamar Christina <tamar.christina@arm.com>
80+
81+
PR target/125148
82+
* config/aarch64/aarch64-sve.md
83+
(*aarch64_vec_shl_insert_into_zero_<mode>,
84+
*aarch64_vec_shl_insert_into_zero_vnx16qi,
85+
*aarch64_vec_shl_insert_from_load_<mode>): New.
86+
* config/aarch64/aarch64.cc (aarch64_emit_load_store_through_mode):
87+
Replace paradoxical subreg with zero-extend.
88+
89+
2026-05-27 Evgeny Karpov <evgeny.karpov@arm.com>
90+
91+
* config/aarch64/aarch64-coff.h (SUPPORTS_INIT_PRIORITY):
92+
Enable SUPPORTS_INIT_PRIORITY by default.
93+
94+
2026-05-27 liuhongt <hongtao.liu@intel.com>
95+
96+
* config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Disable
97+
for m_DIAMONDRAPIDS.
98+
(X86_TUNE_USE_GATHER_4PARTS): Likewise.
99+
1100
2026-05-26 Sergei Trofimovich <siarheit@google.com>
2101

3102
PR bootstrap/125318

gcc/DATESTAMP

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1 +1 @@
1-
20260527
1+
20260528

gcc/ada/ChangeLog

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,7 @@
1+
2026-05-27 Iain Sandoe <iain@sandoe.co.uk>
2+
3+
* xsintnam.sed: Posix-ify the a, c and i commands.
4+
15
2026-05-26 Eric Botcazou <ebotcazou@adacore.com>
26

37
* xsintnam.sed: Disable style checks.

gcc/cp/ChangeLog

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,9 @@
1+
2026-05-27 Jakub Jelinek <jakub@redhat.com>
2+
3+
PR c++/125412
4+
* reflect.cc (process_metafunction): If ht is error_operand_p,
5+
set *non_constant_p and return NULL_TREE.
6+
17
2026-05-26 Marek Polacek <polacek@redhat.com>
28

39
PR c++/125423

0 commit comments

Comments
 (0)