D-Programming-GDC
diff --git a/‎gcc/config/aarch64/aarch64-protos.h‎
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diff --git a/‎gcc/config/aarch64/aarch64.cc‎
Lines changed: 6 additions & 0 deletions b/‎gcc/config/aarch64/aarch64.cc‎
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diff --git a/‎gcc/config/aarch64/aarch64.md‎
Lines changed: 2 additions & 2 deletions b/‎gcc/config/aarch64/aarch64.md‎
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diff --git a/‎gcc/testsuite/gcc.target/aarch64/acle/chkfeat-1.c‎
Lines changed: 1 addition & 1 deletion b/‎gcc/testsuite/gcc.target/aarch64/acle/chkfeat-1.c‎
Lines changed: 1 addition & 1 deletion
diff --git a/‎gcc/testsuite/gcc.target/aarch64/acle/gcs-1.c‎
Lines changed: 2 additions & 2 deletions b/‎gcc/testsuite/gcc.target/aarch64/acle/gcs-1.c‎
Lines changed: 2 additions & 2 deletions
diff --git a/‎gcc/testsuite/gcc.target/aarch64/acle/pr110100.c‎
Lines changed: 1 addition & 1 deletion b/‎gcc/testsuite/gcc.target/aarch64/acle/pr110100.c‎
Lines changed: 1 addition & 1 deletion
diff --git a/‎gcc/testsuite/gcc.target/aarch64/bitfield-bitint-abi-align16.c‎
Lines changed: 22 additions & 22 deletions b/‎gcc/testsuite/gcc.target/aarch64/bitfield-bitint-abi-align16.c‎
Lines changed: 22 additions & 22 deletions
diff --git a/‎gcc/testsuite/gcc.target/aarch64/bitfield-bitint-abi-align8.c‎
Lines changed: 20 additions & 20 deletions b/‎gcc/testsuite/gcc.target/aarch64/bitfield-bitint-abi-align8.c‎
Lines changed: 20 additions & 20 deletions
@@ -996,6 +996,7 @@ bool aarch64_use_simple_return_insn_p (void);
 const char *aarch64_output_casesi (rtx *);
 const char *aarch64_output_load_tp (rtx);
 const char *aarch64_output_sme_zero_za (rtx);
+const char *aarch64_output_move_imm (rtx);
 
 arm_pcs aarch64_tlsdesc_abi_id ();
 enum aarch64_symbol_type aarch64_classify_symbol (rtx, HOST_WIDE_INT);
 
@@ -4916,6 +4916,12 @@ aarch64_move_imm (unsigned HOST_WIDE_INT val, machine_mode mode)
   return aarch64_bitmask_imm (val);
 }
 
+/* Return the output string with the MOV instruction for immediate IMM.  */
+const char*
+aarch64_output_move_imm (rtx imm)
+{
+  return UINTVAL (imm) < 0x100000000 ? "mov\t%w0, %1" : "mov\t%x0, %1";
+}
 
 /* Return true is VAL is a move immediate that can be created by add/sub of the
    12-bit shifted immediate VAL2.  If GENERATE is true, emit the sequence.  */
 
@@ -1819,7 +1819,7 @@
      [r, r   ; mov_reg  , *   , 4] mov\t%x0, %x1
      [k, r   ; mov_reg  , *   , 4] mov\t%0, %x1
      [r, k   ; mov_reg  , *   , 4] mov\t%x0, %1
-     [r, O   ; mov_imm  , *   , 4] << aarch64_is_mov_xn_imm (INTVAL (operands[1])) ? "mov\t%x0, %1" : "mov\t%w0, %1";
+     [r, O   ; mov_imm  , *   , 4] << aarch64_output_move_imm (operands[1]);
      [r, n   ; mov_imm  , *   ,16] #
      /* The "mov_imm" type for CNT is just a placeholder.  */
      [r, Usv ; mov_imm  , sve , 4] << aarch64_output_sve_cnt_immediate ("cnt", "%x0", operands[1]);
@@ -2055,7 +2055,7 @@
      [ r        , m   ; load_8      , *     ] ldr\t%x0, %1
      [ m        , rY  ; store_8     , *     ] str\t%x1, %0
      [ r        , r   ; mov_reg     , *     ] mov\t%x0, %x1
-     [ r        , O   ; fconstd     , *     ] << aarch64_is_mov_xn_imm (INTVAL (operands[1])) ? "mov\t%x0, %1" : "mov\t%w0, %1";
+     [ r        , O   ; fconstd     , *     ] << aarch64_output_move_imm (operands[1]);
   }
 )
 
 
@@ -8,7 +8,7 @@
 /*
 ** test_chkfeat:
 ** ...
-**	mov	x16, 1
+**	mov	w16, 1
 **	hint	40 // chkfeat x16
 **	eor	x0, x16, 1
 **	ret
 
@@ -18,7 +18,7 @@ test_gcspr ()
 
 /*
 **test_gcspopm:
-**	mov	x0, 0
+**	mov	w0, 0
 **	sysl	x0, #3, c7, c7, #1 // gcspopm
 **	ret
 */
@@ -31,7 +31,7 @@ test_gcspopm ()
 /*
 **test_gcsss:
 **	sys	#3, c7, c7, #2, x0 // gcsss1
-**	mov	x0, 0
+**	mov	w0, 0
 **	sysl	x0, #3, c7, c7, #3 // gcsss2
 **	ret
 */
 
@@ -4,4 +4,4 @@
 void do_st64b(data512_t data) {
   __arm_st64b((void*)0x10000000, data);
 }
-/* { dg-final { scan-assembler {mov\tx([123])?[0-9], 268435456} } } */
+/* { dg-final { scan-assembler {mov\tw([123])?[0-9], 268435456} } } */
@@ -57,7 +57,7 @@
 **	mov	w0, w1
 **	and	x4, \1, 9223372036854775807
 **	and	x2, \1, 1
-**	mov	x3, 0
+**	mov	w3, 0
 **	b	f1
 */
 
@@ -67,7 +67,7 @@
 **	mov	w0, w1
 **	and	x4, \1, 9223372036854775807
 **	and	x2, \1, 1
-**	mov	x3, 0
+**	mov	w3, 0
 **	b	f8
 */
 /*
@@ -76,7 +76,7 @@
 **	mov	w0, w1
 **	and	x4, \1, 9223372036854775807
 **	and	x2, \1, 1
-**	mov	x3, 0
+**	mov	w3, 0
 **	b	f16
 */
 
@@ -91,7 +91,7 @@
 **	mov	(w[0-9]+), 0
 **	bfi	\3, w\2, 0, 1
 **	and	x3, x\2, 9223372036854775807
-**	mov	x2, 0
+**	mov	w2, 0
 **	str	xzr, \[sp\]
 **	strb	\3, \[sp\]
 **	ldr	x1, \[sp\]
@@ -106,7 +106,7 @@
 **	mov	(w[0-9]+), w1
 **	and	x3, x0, 9223372036854775807
 **	and	x1, x0, 1
-**	mov	x2, 0
+**	mov	w2, 0
 **	mov	w0, \1
 **	b	f1p
 */
@@ -115,7 +115,7 @@
 **	mov	(w[0-9]+), w1
 **	and	x3, x0, 9223372036854775807
 **	and	x1, x0, 1
-**	mov	x2, 0
+**	mov	w2, 0
 **	mov	w0, \1
 **	b	f8p
 */
@@ -125,7 +125,7 @@
 **	mov	w0, w1
 **	and	x4, \1, 9223372036854775807
 **	and	x2, \1, 1
-**	mov	x3, 0
+**	mov	w3, 0
 **	b	f16p
 */
 
@@ -209,10 +209,10 @@
 **	sxtw	(x[0-9]+), w1
 **	mov	x0, \2
 **	and	x7, \2, 9223372036854775807
-**	mov	(x[0-9]+), 0
+**	mov	w([0-9]+), 0
 **	sbfx	(x[0-9]+), \1, 0, 63
-**	bfi	\3, \4, 0, 1
-**	stp	\3, xzr, \[sp, 16\]
+**	bfi	x\3, \4, 0, 1
+**	stp	x\3, xzr, \[sp, 16\]
 **	mov	x6, x7
 **	mov	x5, x7
 **	mov	x4, x7
@@ -234,10 +234,10 @@
 **	sxtw	(x[0-9]+), w1
 **	mov	x0, \2
 **	and	x7, \2, 9223372036854775807
-**	mov	(x[0-9]+), 0
+**	mov	w([0-9]+), 0
 **	sbfx	(x[0-9]+), \1, 0, 63
-**	bfi	\3, \4, 0, 1
-**	stp	\3, xzr, \[sp, 16\]
+**	bfi	x\3, \4, 0, 1
+**	stp	x\3, xzr, \[sp, 16\]
 **	mov	x6, x7
 **	mov	x5, x7
 **	mov	x4, x7
@@ -258,10 +258,10 @@
 **	sxtw	(x[0-9]+), w1
 **	mov	x0, \2
 **	and	(x[0-9]+), \2, 9223372036854775807
-**	mov	(x[0-9]+), 0
+**	mov	w([0-9]+), 0
 **	sbfx	(x[0-9]+), \1, 0, 63
-**	bfi	\4, \5, 0, 1
-**	stp	\4, xzr, \[sp, 16\]
+**	bfi	x\4, \5, 0, 1
+**	stp	x\4, xzr, \[sp, 16\]
 **	mov	x6, \3
 **	mov	x5, \3
 **	mov	x4, \3
@@ -323,15 +323,15 @@
 /*
 ** g1_stdarg:
 **	and	x2, x0, 1
-**	mov	x3, 0
+**	mov	w3, 0
 **	mov	w0, w1
 **	b	f1_stdarg
 */
 
 /*
 ** g16_stdarg:
 **	and	x2, x0, 1
-**	mov	x3, 0
+**	mov	w3, 0
 **	mov	w0, w1
 **	b	f16_stdarg
 */
@@ -343,7 +343,7 @@
 **	mov	w0, w1
 **	mov	(w[0-9]+), 0
 **	bfi	\2, w\1, 0, 1
-**	mov	x2, 0
+**	mov	w2, 0
 **	str	xzr, \[sp\]
 **	strb	\2, \[sp\]
 **	ldr	x1, \[sp\]
@@ -356,7 +356,7 @@
 **	mov	(x[0-9]+), x0
 **	mov	w0, w1
 **	and	x1, \1, 1
-**	mov	x2, 0
+**	mov	w2, 0
 **	b	f1p_stdarg
 */
 
@@ -365,14 +365,14 @@
 **	mov	(x[0-9]+), x0
 **	mov	w0, w1
 **	and	x1, \1, 1
-**	mov	x2, 0
+**	mov	w2, 0
 **	b	f8p_stdarg
 */
 
 /*
 ** g16p_stdarg:
 **	and	x2, x0, 1
-**	mov	x3, 0
+**	mov	w3, 0
 **	mov	w0, w1
 **	b	f16p_stdarg
 */
@@ -56,7 +56,7 @@
 **	mov	(w[0-9]+), w1
 **	and	x3, x0, 9223372036854775807
 **	and	x1, x0, 1
-**	mov	x2, 0
+**	mov	w2, 0
 **	mov	w0, \1
 **	b	f1
 */
@@ -66,7 +66,7 @@
 **	mov	(w[0-9]+), w1
 **	and	x3, x0, 9223372036854775807
 **	and	x1, x0, 1
-**	mov	x2, 0
+**	mov	w2, 0
 **	mov	w0, \1
 **	b	f8
 */
@@ -76,7 +76,7 @@
 **	mov	w0, w1
 **	and	x4, \1, 9223372036854775807
 **	and	x2, \1, 1
-**	mov	x3, 0
+**	mov	w3, 0
 **	b	f16
 */
 
@@ -91,7 +91,7 @@
 **	mov	(w[0-9]+), 0
 **	bfi	\3, w\2, 0, 1
 **	and	x3, x\2, 9223372036854775807
-**	mov	x2, 0
+**	mov	w2, 0
 **	str	xzr, \[sp\]
 **	strb	\3, \[sp\]
 **	ldr	x1, \[sp\]
@@ -106,7 +106,7 @@
 **	mov	(w[0-9]+), w1
 **	and	x3, x0, 9223372036854775807
 **	and	x1, x0, 1
-**	mov	x2, 0
+**	mov	w2, 0
 **	mov	w0, \1
 **	b	f1p
 */
@@ -115,7 +115,7 @@
 **	mov	(w[0-9]+), w1
 **	and	x3, x0, 9223372036854775807
 **	and	x1, x0, 1
-**	mov	x2, 0
+**	mov	w2, 0
 **	mov	w0, \1
 **	b	f8p
 */
@@ -125,7 +125,7 @@
 **	mov	w0, w1
 **	and	x4, \1, 9223372036854775807
 **	and	x2, \1, 1
-**	mov	x3, 0
+**	mov	w3, 0
 **	b	f16p
 */
 
@@ -211,9 +211,9 @@
 **	sxtw	(x[0-9]+), w1
 **	mov	x0, \2
 **	and	x7, \2, 9223372036854775807
-**	mov	(x[0-9]+), 0
+**	mov	w([0-9]+), 0
 **	sbfx	(x[0-9]+), \1, 0, 63
-**	bfi	\3, \4, 0, 1
+**	bfi	x\3, \4, 0, 1
 **	stp	x7, x1, \[sp\]
 **	mov	x6, x7
 **	mov	x5, x7
@@ -235,9 +235,9 @@
 **	sxtw	(x[0-9]+), w1
 **	mov	x0, \2
 **	and	x7, \2, 9223372036854775807
-**	mov	(x[0-9]+), 0
+**	mov	w([0-9]+), 0
 **	sbfx	(x[0-9]+), \1, 0, 63
-**	bfi	\3, \4, 0, 1
+**	bfi	x\3, \4, 0, 1
 **	stp	x7, x1, \[sp\]
 **	mov	x6, x7
 **	mov	x5, x7
@@ -259,10 +259,10 @@
 **	sxtw	(x[0-9]+), w1
 **	mov	x0, \2
 **	and	x7, \2, 9223372036854775807
-**	mov	(x[0-9]+), 0
+**	mov	w([0-9]+), 0
 **	sbfx	(x[0-9]+), \1, 0, 63
-**	bfi	\3, \4, 0, 1
-**	stp	\3, xzr, \[sp, 16\]
+**	bfi	x\3, \4, 0, 1
+**	stp	x\3, xzr, \[sp, 16\]
 **	mov	x6, x7
 **	mov	x5, x7
 **	mov	x4, x7
@@ -326,14 +326,14 @@
 **	mov	(x[0-9]+), x0
 **	mov	w0, w1
 **	and	x1, \1, 1
-**	mov	x2, 0
+**	mov	w2, 0
 **	b	f1_stdarg
 */
 
 /*
 ** g16_stdarg:
 **	and	x2, x0, 1
-**	mov	x3, 0
+**	mov	w3, 0
 **	mov	w0, w1
 **	b	f16_stdarg
 */
@@ -345,7 +345,7 @@
 **	mov	w0, w1
 **	mov	(w[0-9]+), 0
 **	bfi	\2, w\1, 0, 1
-**	mov	x2, 0
+**	mov	w2, 0
 **	str	xzr, \[sp\]
 **	strb	\2, \[sp\]
 **	ldr	x1, \[sp\]
@@ -358,7 +358,7 @@
 **	mov	(x[0-9]+), x0
 **	mov	w0, w1
 **	and	x1, \1, 1
-**	mov	x2, 0
+**	mov	w2, 0
 **	b	f1p_stdarg
 */
 
@@ -367,14 +367,14 @@
 **	mov	(x[0-9]+), x0
 **	mov	w0, w1
 **	and	x1, \1, 1
-**	mov	x2, 0
+**	mov	w2, 0
 **	b	f8p_stdarg
 */
 
 /*
 ** g16p_stdarg:
 **	and	x2, x0, 1
-**	mov	x3, 0
+**	mov	w3, 0
 **	mov	w0, w1
 **	b	f16p_stdarg
 */
Original file line number	Diff line number	Diff line change
`@@ -4,4 +4,4 @@`
`4`	`4`	`void do_st64b(data512_t data) {`
`5`	`5`	`__arm_st64b((void*)0x10000000, data);`
`6`	`6`	`}`
`7`		`-/* { dg-final { scan-assembler {mov\tx([123])?[0-9], 268435456} } } */`
	`7`	`+/* { dg-final { scan-assembler {mov\tw([123])?[0-9], 268435456} } } */`