Skip to content

Commit 372971c

Browse files
QuzarDCQuzarDC
authored andcommitted
treewide: Use spaces instead of tabs.
1 parent ee2c9e6 commit 372971c

12 files changed

Lines changed: 1275 additions & 1275 deletions

File tree

addons/libkosfat/directory.c

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -702,24 +702,24 @@ int fat_erase_dentry(fat_fs_t *fs, uint32_t cl, uint32_t off, uint32_t lcl,
702702
ent->name[0] = FAT_ENTRY_FREE;
703703
}
704704

705-
if(!done) {
705+
if(!done) {
706706
/* Move onto the next cluster. */
707707
if(!(lcl & 0x80000000)) {
708708
lcl = fat_read_fat(fs, lcl, &err);
709709
if(lcl == 0xFFFFFFFF) {
710710
dbglog(DBG_ERROR, "Invalid FAT value hit while "
711-
"reading long name entry for deletion at "
712-
"cluster %" PRIu32 ", offset %" PRIu32 "\n",
713-
lcl, i << 5);
711+
"reading long name entry for deletion at "
712+
"cluster %" PRIu32 ", offset %" PRIu32 "\n",
713+
lcl, i << 5);
714714
return -err;
715715
}
716716

717717
/* This shouldn't happen either... */
718718
if(fat_is_eof(fs, lcl)) {
719719
dbglog(DBG_ERROR, "End of directory hit while "
720-
"reading long name entry for deletion at "
721-
"cluster %" PRIu32 ", offset %" PRIu32 "\n",
722-
lcl, i << 5);
720+
"reading long name entry for deletion at "
721+
"cluster %" PRIu32 ", offset %" PRIu32 "\n",
722+
lcl, i << 5);
723723
return -EIO;
724724
}
725725

@@ -731,15 +731,15 @@ int fat_erase_dentry(fat_fs_t *fs, uint32_t cl, uint32_t off, uint32_t lcl,
731731

732732
if(max2 <= 0) {
733733
dbglog(DBG_ERROR, "End of directory hit while "
734-
"reading long name entry for deletion at "
735-
"cluster %" PRIu32 ", offset %" PRIu32 "\n",
736-
lcl, i << 5);
734+
"reading long name entry for deletion at "
735+
"cluster %" PRIu32 ", offset %" PRIu32 "\n",
736+
lcl, i << 5);
737737
return -EIO;
738738
}
739739

740740
i = 0;
741741
}
742-
}
742+
}
743743
}
744744
}
745745

addons/libkosfat/fs_fat.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1020,7 +1020,7 @@ static int fs_fat_unlink(vfs_handler_t *vfs, const char *fn) {
10201020
if((err = fat_erase_chain(fs->fs, cluster))) {
10211021
/* Uh oh... This is really bad... */
10221022
dbglog(DBG_ERROR, "fs_fat: Error erasing FAT chain for file %s\n",
1023-
fn);
1023+
fn);
10241024
irv = -1;
10251025
errno = -err;
10261026
}

examples/dreamcast/basic/dma/speedtest/speedtest.c

Lines changed: 87 additions & 87 deletions
Original file line numberDiff line numberDiff line change
@@ -22,112 +22,112 @@ static alignas(32) char buf2[BUF_SIZE];
2222

2323
static void dma_done(void *d)
2424
{
25-
*(uint64_t *)d = timer_us_gettime64();
26-
genwait_wake_all(d);
25+
*(uint64_t *)d = timer_us_gettime64();
26+
genwait_wake_all(d);
2727
}
2828

2929
static dma_config_t dma_cfg = {
30-
.channel = 1,
31-
.request = DMA_REQUEST_AUTO_MEM_TO_MEM,
32-
.unit_size = DMA_UNITSIZE_32BYTE,
33-
.src_mode = DMA_ADDRMODE_INCREMENT,
34-
.dst_mode = DMA_ADDRMODE_INCREMENT,
35-
.transmit_mode = DMA_TRANSMITMODE_BURST,
36-
.callback = dma_done,
30+
.channel = 1,
31+
.request = DMA_REQUEST_AUTO_MEM_TO_MEM,
32+
.unit_size = DMA_UNITSIZE_32BYTE,
33+
.src_mode = DMA_ADDRMODE_INCREMENT,
34+
.dst_mode = DMA_ADDRMODE_INCREMENT,
35+
.transmit_mode = DMA_TRANSMITMODE_BURST,
36+
.callback = dma_done,
3737
};
3838

3939
static uint64_t
4040
do_dma_transfer(unsigned int test, pvr_ptr_t vram1, pvr_ptr_t vram2)
4141
{
42-
uint64_t before, after = 0;
43-
44-
irq_disable_scoped();
45-
46-
before = timer_us_gettime64();
47-
48-
switch (test) {
49-
case 0:
50-
/* RAM to RAM */
51-
dma_transfer(&dma_cfg,
52-
dma_map_dst(buf1, BUF_SIZE),
53-
dma_map_src(buf2, BUF_SIZE),
54-
BUF_SIZE, &after);
55-
break;
56-
case 1:
57-
/* RAM to VRAM */
58-
dma_transfer(&dma_cfg,
59-
hw_to_dma_addr((uintptr_t)vram1),
60-
dma_map_src(buf2, BUF_SIZE),
61-
BUF_SIZE, &after);
62-
break;
63-
case 2:
64-
/* VRAM to RAM */
65-
dma_transfer(&dma_cfg,
66-
dma_map_dst(buf1, BUF_SIZE),
67-
hw_to_dma_addr((uintptr_t)vram1),
68-
BUF_SIZE, &after);
69-
break;
70-
case 3:
71-
/* VRAM to VRAM */
72-
dma_transfer(&dma_cfg,
73-
hw_to_dma_addr((uintptr_t)vram1),
74-
hw_to_dma_addr((uintptr_t)vram2),
75-
BUF_SIZE, &after);
76-
break;
77-
case 4:
78-
/* RAM to VRAM using SQs */
79-
pvr_txr_load(buf1, vram1, BUF_SIZE);
80-
81-
return timer_us_gettime64() - before;
82-
case 5:
83-
/* RAM to 64-bit VRAM using PVR DMA */
84-
pvr_txr_load_dma(buf1, vram1, BUF_SIZE,
85-
0, dma_done, &after);
86-
break;
87-
case 6:
88-
/* RAM to 32-bit VRAM using PVR DMA */
89-
pvr_dma_transfer(buf1, (uintptr_t)vram1, BUF_SIZE,
90-
PVR_DMA_VRAM32, 0,
91-
dma_done, &after);
92-
break;
93-
}
94-
95-
while ((volatile uint64_t)after == 0)
96-
genwait_wait(&after, "IRQ wait", 0, NULL);
97-
98-
return after - before;
42+
uint64_t before, after = 0;
43+
44+
irq_disable_scoped();
45+
46+
before = timer_us_gettime64();
47+
48+
switch (test) {
49+
case 0:
50+
/* RAM to RAM */
51+
dma_transfer(&dma_cfg,
52+
dma_map_dst(buf1, BUF_SIZE),
53+
dma_map_src(buf2, BUF_SIZE),
54+
BUF_SIZE, &after);
55+
break;
56+
case 1:
57+
/* RAM to VRAM */
58+
dma_transfer(&dma_cfg,
59+
hw_to_dma_addr((uintptr_t)vram1),
60+
dma_map_src(buf2, BUF_SIZE),
61+
BUF_SIZE, &after);
62+
break;
63+
case 2:
64+
/* VRAM to RAM */
65+
dma_transfer(&dma_cfg,
66+
dma_map_dst(buf1, BUF_SIZE),
67+
hw_to_dma_addr((uintptr_t)vram1),
68+
BUF_SIZE, &after);
69+
break;
70+
case 3:
71+
/* VRAM to VRAM */
72+
dma_transfer(&dma_cfg,
73+
hw_to_dma_addr((uintptr_t)vram1),
74+
hw_to_dma_addr((uintptr_t)vram2),
75+
BUF_SIZE, &after);
76+
break;
77+
case 4:
78+
/* RAM to VRAM using SQs */
79+
pvr_txr_load(buf1, vram1, BUF_SIZE);
80+
81+
return timer_us_gettime64() - before;
82+
case 5:
83+
/* RAM to 64-bit VRAM using PVR DMA */
84+
pvr_txr_load_dma(buf1, vram1, BUF_SIZE,
85+
0, dma_done, &after);
86+
break;
87+
case 6:
88+
/* RAM to 32-bit VRAM using PVR DMA */
89+
pvr_dma_transfer(buf1, (uintptr_t)vram1, BUF_SIZE,
90+
PVR_DMA_VRAM32, 0,
91+
dma_done, &after);
92+
break;
93+
}
94+
95+
while ((volatile uint64_t)after == 0)
96+
genwait_wait(&after, "IRQ wait", 0, NULL);
97+
98+
return after - before;
9999
}
100100

101101
static const char * const test_lbl[] = {
102-
"DMAC, RAM to RAM: ",
103-
"DMAC, RAM to VRAM: ",
104-
"DMAC, VRAM to RAM: ",
105-
"DMAC, VRAM to VRAM: ",
106-
"PVR SQs: ",
107-
"PVR DMA, 64-bit: ",
108-
"PVR DMA, 32-bit: ",
102+
"DMAC, RAM to RAM: ",
103+
"DMAC, RAM to VRAM: ",
104+
"DMAC, VRAM to RAM: ",
105+
"DMAC, VRAM to VRAM: ",
106+
"PVR SQs: ",
107+
"PVR DMA, 64-bit: ",
108+
"PVR DMA, 32-bit: ",
109109
};
110110

111111
int main(int argc, char **argv)
112112
{
113-
pvr_ptr_t vram, vram2;
114-
uint64_t time_us;
115-
unsigned int i;
113+
pvr_ptr_t vram, vram2;
114+
uint64_t time_us;
115+
unsigned int i;
116116

117-
pvr_init_defaults();
117+
pvr_init_defaults();
118118

119-
vram = pvr_mem_malloc(BUF_SIZE);
120-
vram2 = pvr_mem_malloc(BUF_SIZE);
119+
vram = pvr_mem_malloc(BUF_SIZE);
120+
vram2 = pvr_mem_malloc(BUF_SIZE);
121121

122-
for (i = 0; i < ARRAY_SIZE(test_lbl); i++) {
123-
time_us = do_dma_transfer(i, vram, vram2);
124-
printf("%s%f MiB/s\n",
125-
test_lbl[i], (float)BUF_SIZE / (float)time_us);
122+
for (i = 0; i < ARRAY_SIZE(test_lbl); i++) {
123+
time_us = do_dma_transfer(i, vram, vram2);
124+
printf("%s%f MiB/s\n",
125+
test_lbl[i], (float)BUF_SIZE / (float)time_us);
126126

127-
}
127+
}
128128

129-
pvr_mem_free(vram);
130-
pvr_mem_free(vram2);
129+
pvr_mem_free(vram);
130+
pvr_mem_free(vram2);
131131

132-
return 0;
132+
return 0;
133133
}

examples/dreamcast/basic/memtest32/memtest.c

Lines changed: 19 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -1,13 +1,13 @@
11
/**********************************************************************
22
*
33
* Filename: memtest.c
4-
*
4+
*
55
* Description: General-purpose memory testing functions.
66
*
77
* Notes: This software can be easily ported to systems with
88
* different data bus widths by redefining 'datum'.
99
*
10-
*
10+
*
1111
* Copyright (c) 1998 by Michael Barr. This software is placed into
1212
* the public domain and may be used for any purpose. However, this
1313
* notice must not be changed or removed and no warranty is either
@@ -27,9 +27,9 @@
2727
* within that region. The address (and hence the
2828
* memory region) is selected by the caller.
2929
*
30-
* Notes:
30+
* Notes:
3131
*
32-
* Returns: 0 if the test succeeds.
32+
* Returns: 0 if the test succeeds.
3333
* A non-zero result is the first pattern that failed.
3434
*
3535
**********************************************************************/
@@ -52,7 +52,7 @@ memTestDataBus(volatile datum * address)
5252
/*
5353
* Read it back (immediately is okay for this test).
5454
*/
55-
if (*address != pattern)
55+
if (*address != pattern)
5656
{
5757
return (pattern);
5858
}
@@ -76,19 +76,19 @@ memTestDataBus(volatile datum * address)
7676
*
7777
* Notes: For best results, the selected base address should
7878
* have enough LSB 0's to guarantee single address bit
79-
* changes. For example, to test a 64-Kbyte region,
80-
* select a base address on a 64-Kbyte boundary. Also,
81-
* select the region size as a power-of-two--if at all
79+
* changes. For example, to test a 64-Kbyte region,
80+
* select a base address on a 64-Kbyte boundary. Also,
81+
* select the region size as a power-of-two--if at all
8282
* possible.
8383
*
84-
* Returns: NULL if the test succeeds.
84+
* Returns: NULL if the test succeeds.
8585
* A non-zero result is the first address at which an
8686
* aliasing problem was uncovered. By examining the
8787
* contents of memory, it may be possible to gather
8888
* additional information about the problem.
8989
*
9090
**********************************************************************/
91-
datum *
91+
datum *
9292
memTestAddressBus(volatile datum * baseAddress, unsigned long nBytes)
9393
{
9494
unsigned long addressMask = (nBytes/sizeof(datum) - 1);
@@ -107,7 +107,7 @@ memTestAddressBus(volatile datum * baseAddress, unsigned long nBytes)
107107
baseAddress[offset] = pattern;
108108
}
109109

110-
/*
110+
/*
111111
* Check for address bits stuck high.
112112
*/
113113
testOffset = 0;
@@ -130,10 +130,10 @@ memTestAddressBus(volatile datum * baseAddress, unsigned long nBytes)
130130
{
131131
baseAddress[testOffset] = antipattern;
132132

133-
if (baseAddress[0] != pattern)
134-
{
135-
return ((datum *) &baseAddress[testOffset]);
136-
}
133+
if (baseAddress[0] != pattern)
134+
{
135+
return ((datum *) &baseAddress[testOffset]);
136+
}
137137

138138
for (offset = 1; (offset & addressMask) != 0; offset <<= 1)
139139
{
@@ -157,12 +157,12 @@ memTestAddressBus(volatile datum * baseAddress, unsigned long nBytes)
157157
*
158158
* Description: Test the integrity of a physical memory device by
159159
* performing an increment/decrement test over the
160-
* entire region. In the process every storage bit
160+
* entire region. In the process every storage bit
161161
* in the device is tested as a zero and a one. The
162162
* base address and the size of the region are
163163
* selected by the caller.
164164
*
165-
* Notes:
165+
* Notes:
166166
*
167167
* Returns: NULL if the test succeeds.
168168
*
@@ -172,8 +172,8 @@ memTestAddressBus(volatile datum * baseAddress, unsigned long nBytes)
172172
* additional information about the problem.
173173
*
174174
**********************************************************************/
175-
datum *
176-
memTestDevice(volatile datum * baseAddress, unsigned long nBytes)
175+
datum *
176+
memTestDevice(volatile datum * baseAddress, unsigned long nBytes)
177177
{
178178
unsigned long offset;
179179
unsigned long nWords = nBytes / sizeof(datum);

0 commit comments

Comments
 (0)