mb/novacustom/nuc_box/dsdt.asl: fixes for ghost PS/2 and USB wake

Upstream-Status: Pending
Signed-off-by: Filip Lewiński <filip.lewinski@3mdeb.com>

Author: filipleple

src/mainboard/novacustom/nuc_box/dsdt.asl

@@ -1,8 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-//TODO: HACK FOR MISSING MISCCFG_GPIO_PM_CONFIG_BITS
-#include <soc/gpio.h>
-
 #include <acpi/acpi.h>
 DefinitionBlock(
 	"dsdt.aml",
@@ -27,10 +24,5 @@ DefinitionBlock(
 
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
-	Scope (\_SB.PCI0.LPCB)
-	{
-		#include <drivers/pc80/pc/ps2_controller.asl>
-	}
-
 	#include "acpi/mainboard.asl"
 }

src/mainboard/novacustom/nuc_box/variants/nuc_box/overridetree.cb

@@ -30,6 +30,8 @@ chip soc/intel/meteorlake
 		end
 		device ref tcss_dma0 on end
 		device ref xhci on
+			register "usb2_wake_enable_bitmap" = "0xFF"
+			register "usb3_wake_enable_bitmap" = "0x3"
 			register "usb2_ports" = "{
 				[0] = USB2_PORT_MID(OC_SKIP),	/* USB3 Rear */
 				[1] = USB2_PORT_MID(OC_SKIP),	/* USB3 Rear */

src/soc/intel/meteorlake/acpi/xhci.asl

@@ -1,7 +1,11 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <intelblocks/xhci.h>
 #include <soc/gpe.h>
 
+/* Include UWES method for enabling USB wake */
+#include <soc/intel/common/acpi/xhci_wake.asl>
+
 /* XHCI Controller 0:14.0 */
 
 Device (XHCI)
@@ -10,6 +14,20 @@ Device (XHCI)
 
 	Name (_PRW, Package () { GPE0_PME_B0, 3 })
 
+	OperationRegion (XPRT, PCI_Config, 0x00, 0x100)
+	Field (XPRT, AnyAcc, NoLock, Preserve)
+	{
+		Offset (0x10),
+		, 16,
+		XMEM, 16,	/* MEM_BASE */
+	}
+
+	Method (_DSW, 3)
+	{
+		UWES ((\U2WE & 0x3FF), PORTSCN_OFFSET, XMEM)
+		UWES ((\U3WE & 0x3), PORTSCXUSB3_OFFSET, XMEM)
+	}
+
 	Name (_S3D, 3)	/* D3 supported in S3 */
 	Name (_S0W, 3)	/* D3 can wake device in S0 */
 	Name (_S3W, 3)	/* D3 can wake system from S3 */