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nb/intel/sandybridge/northbridge.c: Disbale non-active PEG devices#657

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miczyg1 merged 1 commit into
dasharofrom
optiplex_txt_fix
Apr 28, 2025
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nb/intel/sandybridge/northbridge.c: Disbale non-active PEG devices#657
miczyg1 merged 1 commit into
dasharofrom
optiplex_txt_fix

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@miczyg1

@miczyg1 miczyg1 commented Apr 26, 2025

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TXT SINIT ACM checks the PEG bridge memory ranges whether they are correctly assigned in the MMIO space. If the bridge is enabled but no device is attached to it, coreboot will not assign any resources (if hotplug is not enabled). When SINIT ACM checks the ranges, it fails on prefetchable range check.

Hide the PEG devices if the bridge is not active. PCIe bridges should generally be hidden if hotplug is not enabled and there is no downstream device.

Upstream-status: TBD

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miczyg1 commented Apr 26, 2025

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If this works, I will push upstream.

@SergiiDmytruk SergiiDmytruk left a comment

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s/Disbale/Disable/ for the title, but this does make TXT work.

TXT SINIT ACM checks the PEG bridge memory ranges whether they are
correctly assigned in the MMIO space. If the bridge is enabled but no
device is attached to it, coreboot will not assign any resources (if
hotplug is not enabled). When SINIT ACM checks the ranges, it fails
on prefetchable range check.

Hide the PEG devices if the bridge is not active. PCIe bridges should
generally be hidden if hotplug is not enabled and there is no
downstream device.

Upstream-status: CB:87472

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
@miczyg1

miczyg1 commented Apr 28, 2025

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s/Disbale/Disable/ for the title, but this does make TXT work.

Yes, pre-commit caught it when I added the gerrit patch ID to the commit message. It didn't earlier, because I used different PC (which had not pre-commit installed somehow).

@miczyg1 miczyg1 merged commit 6146be5 into dasharo Apr 28, 2025
@miczyg1 miczyg1 deleted the optiplex_txt_fix branch April 28, 2025 07:55
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2 participants