Commit fa18a2b
authored
chore(crashtracker): use weaker mem ordering for OP_COUNTERS (#1744)
# What does this PR do?
This PR replaces a bunch of sequentially consistent atomic accesses on ops counters by weaker relaxed accesses, cleaning a leftover TODO.
# Motivation
The motivation to use the weakest memory ordering applicable is two folds:
1. Performance: relaxed accesses compile to normal, non-atomic loads and stores on standard platforms (x86_64 and arm64 in particular). Whether this particular change has any performance impact is less obvious.
2. Readability: I think my main motivation is that I find it _easier_, at least as a reader, to reason about weaker orderings. For example, a relaxed access indicates that there's no other unsynchronized data that this atomic protect or interact with, which enables local reasoning (you don't have to care about what other threads might be doing). A sequentially consistent access is the converse: they lead to a global order which involves all other seqcst accesses to this atomic, which is a strong and far-reaching assumption.
# Additional Notes
This atomic is a counter, which is the poster child for `Relaxed` ordering (you usually only need the atomicity). This counter doesn't protect or interact with unsynchronized memory, so there's no reason to use a stronger ordering.
# How to test the change?
Should see no difference in behavior except maybe for performance.
Co-authored-by: yann.hamdaoui <yann.hamdaoui@datadoghq.com>1 parent 4dd532f commit fa18a2b
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