Commit 90da351
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feat(relax-cuda): testable e2e path_c train_step RUNS on gb10 CUDA at 28-layer 1.8B (loss finite, 8.787 GB planned peak)
PR-6: a single entry (path_c_relax_train_step.py) builds the WHOLE-step Relax
@R.function -- banks SSA (PR-3) + sqrt-N remat (PR-4) + in-place Adam (PR-5) + a
scalar LOSS leaf -- compiles for target=cuda, and EXECUTES one training step on
tvm.cuda(0) on gb10, loss finite, measured peak via free -g delta.
MEASURED on gb10 CUDA (2026-06-03):
* 28-layer 1.8B whole step: RUNS=yes, loss 4.165619e-02 finite, planned device
peak 8.787 GB (= PR-5 headline, now EXECUTED), measured free-delta 17.64 GB.
* 8-layer: RUNS=yes, loss finite, planned 4.682 GB.
* Stage 2: the REAL tilelang path_c-CUDA JITKernel (17 params, 149024 bytes
CUDA-C) drives the forward boundary of the same whole-step graph, loss finite.
Root-cause bug found+fixed (RULE #1, fail-loud): the abstract bank/optim/loss
drivers called np.from_dlpack directly -> RAISED 'Unsupported device in DLTensor'
on CUDA device tensors. Added device-agnostic bank_arg_to_host / bank_writeback
helpers (zero-copy on CPU/Metal; .numpy() + copyto host<->device on CUDA; RAISE if
neither) used by every region driver. After the fix every region runs on CUDA.
CPU LLVM self-check + PR-4/PR-5 regressions stay green (loss matches numpy ref, max
diff 0.0). Docs section 11 added: testable e2e status, measured peak, the config.
The whole graph/Relax memory path now RUNS end-to-end on device, not just plans --
this gates the profiling phase.1 parent c680716 commit 90da351
5 files changed
Lines changed: 892 additions & 26 deletions
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