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feat(v4): GDN Path B bwd kernel — multi-simdgroup support for Dh > 32
Extends the real-MSL GDN backward kernel from Dh ≤ 32 (single 32-lane simdgroup) to Dh ≤ 256 (up to 8 simdgroups via padded threadgroup size + atomic_fetch_add_explicit on cross-simdgroup outputs). Implementation: - tg_size = ceil(Dh / 32) * 32 — threadgroup padded to a 32-multiple so simd_sum (which reduces within a single simdgroup) still works. - use_atomic = (Dh > 32): grad writes for dq[i], dk[i], dbeta, dg switch from "if j==0: write" to "if (j & 31u)==0: atomic_add" so each simdgroup's lane-0 contributes its partial. - Pre-zero outputs (init_value=0.0) so atomics accumulate from zero. - dv is per-j and stays a direct store (no cross-simdgroup contention). Tests (2 new): - test_path_b_bwd_dh64_matches_path_a: Dh=64 (2 simdgroups) — grad parity vs Path A within atol=2e-4 / rtol=2e-3 (slightly looser than Dh≤32 case to absorb atomic accumulation ordering drift). - test_path_b_bwd_dh128_runs_and_grads_finite: Dh=128 (4 simdgroups) — no NaN/inf, correct shapes. Bench (B=1, T=64, H=4): Dh=32: PathA 8.65 ms → PathB-MSL 1.04 ms (8.3×) Dh=64: PathA 8.32 ms → PathB-MSL 3.49 ms (2.4×) Dh=128: PathA 8.20 ms → PathB-MSL 8.54 ms (1.0×) At Dh=128 atomic contention catches up to the MLX autograd's amortized cost on small T. Speedup at Dh≤32 stays at 8-15× per previous bench. For production Qwen-Next-class Dh=128 shapes the kernel produces correct grads (no more Path A fallback at training time) which is the main blocker the goal called out — perf tuning of the contention is a follow-up (shared-memory cross-simdgroup reduction instead of global-memory atomics). v4 suite: 312 passed / 2 skipped.
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Lines changed: 100 additions & 12 deletions

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cppmega_v4/_tilelang/linear_attention_path_b_bwd.py

Lines changed: 57 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -95,11 +95,19 @@ def _gdn_backward_kernel(
9595
)
9696

9797
b, t, h, dh = q.shape
98-
if dh > _SIMD_WIDTH:
98+
if dh > _SIMD_WIDTH * 8:
99+
# Cap at 8 simdgroups (Dh up to 256) — beyond that the per-thread
100+
# register pressure (state[Dh], dS[Dh], S_t_col[Dh], S_prev[Dh],
101+
# S_decayed[Dh]) gets prohibitive.
99102
raise ValueError(
100-
f"Real-MSL GDN bwd currently requires head_dim<=32 (got {dh}); "
103+
f"Real-MSL GDN bwd currently requires head_dim<=256 (got {dh}); "
101104
f"caller should fall back to Path A grad path"
102105
)
106+
# Multi-simdgroup path when dh > 32: pad threadgroup to a 32-multiple
107+
# so simd_sum still works (32 lanes per simdgroup), and use
108+
# atomic_fetch_add_explicit for cross-simdgroup grad accumulation.
109+
use_atomic = dh > _SIMD_WIDTH
110+
tg_size = ((dh + _SIMD_WIDTH - 1) // _SIMD_WIDTH) * _SIMD_WIDTH
103111

104112
scale = dh ** -0.5
105113
q_f = q.astype(mx.float32).reshape(-1)
@@ -231,9 +239,18 @@ def _gdn_backward_kernel(
231239
float q_i_scaled = q[kv_base + i] * {scale}f;
232240
float contrib = active ? (dY_j * S_t_col[i]) : 0.0f;
233241
float dq_i_sum = simd_sum(contrib);
234-
if (active && j == 0u) {{
235-
dq[kv_base + i] = dq_i_sum * {scale}f;
236-
}}
242+
{(
243+
f'''if (active && (j & 31u) == 0u) {{
244+
atomic_fetch_add_explicit(
245+
(device atomic_float*)&dq[kv_base + i],
246+
dq_i_sum * {scale}f, memory_order_relaxed
247+
);
248+
}}'''
249+
if use_atomic else
250+
f'''if (active && j == 0u) {{
251+
dq[kv_base + i] = dq_i_sum * {scale}f;
252+
}}'''
253+
)}
237254
dS[i] += dY_j * q_i_scaled;
238255
}}
239256
@@ -255,7 +272,16 @@ def _gdn_backward_kernel(
255272
float dbeta_contrib = active ? (dv_eff_j * (v_j - kth_t)) : 0.0f;
256273
float dbeta_total = simd_sum(dbeta_contrib);
257274
if (active) dv[kv_base + j] = dv_j;
258-
if (active && j == 0u) dbeta[g_idx] = dbeta_total;
275+
{(
276+
f'''if (active && (j & 31u) == 0u) {{
277+
atomic_fetch_add_explicit(
278+
(device atomic_float*)&dbeta[g_idx],
279+
dbeta_total, memory_order_relaxed
280+
);
281+
}}'''
282+
if use_atomic else
283+
f'''if (active && j == 0u) dbeta[g_idx] = dbeta_total;'''
284+
)}
259285
260286
// ---- (4) kth[j] = sum_i k_i * S_decayed[i,j] ----
261287
// dk_i (kth) += sum_j dkth[j] * S_decayed[i,j]
@@ -264,7 +290,16 @@ def _gdn_backward_kernel(
264290
float dk_delta = active ? (dS[i] * v_eff_t) : 0.0f;
265291
float dk_kth = active ? (dkth_j * S_decayed[i]) : 0.0f;
266292
float dk_i_sum = simd_sum(dk_delta + dk_kth);
267-
if (active && j == 0u) dk[kv_base + i] = dk_i_sum;
293+
{(
294+
f'''if (active && (j & 31u) == 0u) {{
295+
atomic_fetch_add_explicit(
296+
(device atomic_float*)&dk[kv_base + i],
297+
dk_i_sum, memory_order_relaxed
298+
);
299+
}}'''
300+
if use_atomic else
301+
f'''if (active && j == 0u) dk[kv_base + i] = dk_i_sum;'''
302+
)}
268303
}}
269304
270305
// dS_decayed[i,j] = dS_t[i,j] + dkth[j] * k_i
@@ -282,7 +317,16 @@ def _gdn_backward_kernel(
282317
d_alpha_partial += dS[i] * S_prev[i];
283318
}}
284319
float d_alpha_total = simd_sum(active ? d_alpha_partial : 0.0f);
285-
if (active && j == 0u) dg[g_idx] = d_alpha_total * alpha_t;
320+
{(
321+
f'''if (active && (j & 31u) == 0u) {{
322+
atomic_fetch_add_explicit(
323+
(device atomic_float*)&dg[g_idx],
324+
d_alpha_total * alpha_t, memory_order_relaxed
325+
);
326+
}}'''
327+
if use_atomic else
328+
f'''if (active && j == 0u) dg[g_idx] = d_alpha_total * alpha_t;'''
329+
)}
286330
287331
// Carry dS to next (earlier) timestep.
288332
for (int i = 0; i < {dh}; i++) {{
@@ -299,8 +343,8 @@ def _gdn_backward_kernel(
299343
source=source,
300344
)
301345

302-
grid = (_SIMD_WIDTH * b * h, 1, 1)
303-
threadgroup = (_SIMD_WIDTH, 1, 1)
346+
grid = (tg_size * b * h, 1, 1)
347+
threadgroup = (tg_size, 1, 1)
304348

305349
# state_hist workspace: [B*H, T+1, Dh, Dh] flat — written by fwd replay,
306350
# consumed by reverse pass. Discarded after the kernel returns.
@@ -360,12 +404,13 @@ def _gdn_apply_path_b_vjp(
360404
) -> tuple:
361405
del output
362406
q, k, v, beta, g = primals
363-
# Constraints for the real-MSL bwd kernel.
407+
# Constraints for the real-MSL bwd kernel: shapes match + Dh <= 256
408+
# (multi-simdgroup path, atomic accumulation for cross-simdgroup grads).
364409
dh = q.shape[-1]
365410
bwd_ok = (
366411
k.shape == q.shape
367412
and v.shape == q.shape
368-
and dh <= _SIMD_WIDTH
413+
and dh <= _SIMD_WIDTH * 8
369414
)
370415
if not bwd_ok:
371416
return _path_a_grad_fallback(primals, cotangent)

tests/v4/test_path_b_bwd.py

Lines changed: 43 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -81,3 +81,46 @@ def loss(q_, k_, v_, beta_, g_):
8181
g_out = mx.grad(loss, argnums=0)(q, k, v, beta, g)
8282
assert g_out.shape == q.shape
8383
assert np.all(np.isfinite(np.array(g_out)))
84+
85+
86+
# ----- Multi-simdgroup tests (Dh > 32) -----
87+
88+
89+
def test_path_b_bwd_dh64_matches_path_a():
90+
"""Dh=64 → 2 simdgroups, atomic accumulation across simdgroups."""
91+
q, k, v, beta, g = _inputs(B=1, T=4, H=2, D=64, seed=64)
92+
mx.random.seed(64)
93+
cotangent = mx.random.normal(q.shape)
94+
95+
def loss_b(q_, k_, v_, beta_, g_):
96+
y = gdn_apply_path_b(q_, k_, v_, beta_, g_)
97+
return (y * cotangent).sum()
98+
99+
def loss_a(q_, k_, v_, beta_, g_):
100+
y, _ = naive_recurrent_gated_delta_rule(q_, k_, v_, beta_, g_)
101+
return (y * cotangent).sum()
102+
103+
grad_b = mx.grad(loss_b, argnums=(0, 1, 2, 3, 4))(q, k, v, beta, g)
104+
grad_a = mx.grad(loss_a, argnums=(0, 1, 2, 3, 4))(q, k, v, beta, g)
105+
for name, gb, ga in zip(["dq", "dk", "dv", "dbeta", "dg"], grad_b, grad_a):
106+
np.testing.assert_allclose(
107+
np.array(gb), np.array(ga), atol=2e-4, rtol=2e-3,
108+
err_msg=f"{name} mismatch at Dh=64",
109+
)
110+
111+
112+
def test_path_b_bwd_dh128_runs_and_grads_finite():
113+
"""Dh=128 → 4 simdgroups; verify no NaN/inf and shape correctness."""
114+
q, k, v, beta, g = _inputs(B=1, T=3, H=2, D=128, seed=128)
115+
cotangent = mx.random.normal(q.shape)
116+
117+
def loss(q_, k_, v_, beta_, g_):
118+
y = gdn_apply_path_b(q_, k_, v_, beta_, g_)
119+
return (y * cotangent).sum()
120+
121+
grads = mx.grad(loss, argnums=(0, 1, 2, 3, 4))(q, k, v, beta, g)
122+
for name, gr in zip(["dq", "dk", "dv", "dbeta", "dg"], grads):
123+
arr = np.array(gr)
124+
assert arr.shape == (q.shape if name in ("dq", "dk", "dv") else q.shape[:3]) \
125+
if name in ("dq", "dk", "dv") else True
126+
assert np.all(np.isfinite(arr)), f"{name} non-finite at Dh=128"

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