revisions needed for RISC-V vectorization; also change to v10.1.0

DrTimothyAldenDavis · DrTimothyAldenDavis · commit 785c60fe86fe · 2025-05-06T12:10:22.000-05:00
diff --git a/Doc/ChangeLog b/Doc/ChangeLog
@@ -1,3 +1,7 @@
+May FIXME, 2025: version 10.1.0
+
+    * add support for RISC-V vectorization: contributed by Rodion Suvorov
+
 May 5, 2025: version 10.0.5
 
     * revised cmake build system
diff --git a/Doc/GraphBLAS_version.tex b/Doc/GraphBLAS_version.tex
@@ -1,5 +1,5 @@
 % version of SuiteSparse:GraphBLAS
 \date{VERSION
-10.0.5,
-May 5, 2025}
+10.1.0,
+May FIXME, 2025}
 
diff --git a/Doc/UserGuide/GrB_release.tex b/Doc/UserGuide/GrB_release.tex
@@ -5,6 +5,12 @@ \section{Release Notes}
 
 \begin{itemize}
 
+\item May FIXME, 2025: version 10.1.0
+
+    \begin{itemize}
+    \item add support for RISC-V vectorization: contributed by Rodion Suvorov
+    \end{itemize}
+
 \item May 5, 2025: version 10.0.5
 
     \begin{itemize}
diff --git a/FactoryKernels/GB_AxB__plus_times_fp32.c b/FactoryKernels/GB_AxB__plus_times_fp32.c
@@ -49,7 +49,6 @@
 // special case semirings:
 
 #define GB_SEMIRING_HAS_AVX_IMPLEMENTATION 1
-#define GB_SEMIRING_HAS_RVV_IMPLEMENTATION 1
 
 // monoid properties:
 #define GB_Z_TYPE float
@@ -290,16 +289,11 @@ GrB_Info GB (_Asaxpy4B__plus_times_fp32)
 
         //----------------------------------------------------------------------
         // saxpy5 method with RISC-V vectors
-        //---------------------------------------------------------------------
+        //----------------------------------------------------------------------
 
         #if GB_COMPILER_SUPPORTS_RVV1
 
             #include <riscv_vector.h>
-            #define VSETVL(x) __riscv_vsetvl_e32m8(x)
-            #define VLE(x,y) __riscv_vle32_v_f32m8(x, y)
-            #define VFMACC(x,y,z,w) __riscv_vfmacc_vf_f32m8(x, y, z, w)
-            #define VSE(x,y,z) __riscv_vse32_v_f32m8(x, y, z)
-            #define VECTORTYPE vfloat32m8_t
 
             GB_TARGET_RVV1 static inline void GB_AxB_saxpy5_unrolled_rvv
             (
diff --git a/FactoryKernels/GB_AxB__plus_times_fp64.c b/FactoryKernels/GB_AxB__plus_times_fp64.c
@@ -49,7 +49,6 @@
 // special case semirings:
 
 #define GB_SEMIRING_HAS_AVX_IMPLEMENTATION 1
-#define GB_SEMIRING_HAS_RVV_IMPLEMENTATION 1
 
 // monoid properties:
 #define GB_Z_TYPE double
@@ -294,12 +293,7 @@ GrB_Info GB (_Asaxpy4B__plus_times_fp64)
 
         #if GB_COMPILER_SUPPORTS_RVV1
 
-        #include <riscv_vector.h>
-        #define VSETVL(x) __riscv_vsetvl_e64m8(x)
-        #define VLE(x,y) __riscv_vle64_v_f64m8(x, y)
-        #define VFMACC(x,y,z,w) __riscv_vfmacc_vf_f64m8(x, y, z, w)
-        #define VSE(x,y,z) __riscv_vse64_v_f64m8(x, y, z)
-        #define VECTORTYPE vfloat64m8_t
+            #include <riscv_vector.h>
 
             GB_TARGET_RVV1 static inline void GB_AxB_saxpy5_unrolled_rvv
             (
diff --git a/Include/GraphBLAS.h b/Include/GraphBLAS.h
@@ -1,4 +1,4 @@
-// SuiteSparse:GraphBLAS 10.0.5
+// SuiteSparse:GraphBLAS 10.1.0
 //------------------------------------------------------------------------------
 // GraphBLAS.h: definitions for the GraphBLAS package
 //------------------------------------------------------------------------------
@@ -268,10 +268,10 @@
 
 // The version of this implementation, and the GraphBLAS API version:
 #define GxB_IMPLEMENTATION_NAME "SuiteSparse:GraphBLAS"
-#define GxB_IMPLEMENTATION_DATE "May 5, 2025"
+#define GxB_IMPLEMENTATION_DATE "May FIXME, 2025"
 #define GxB_IMPLEMENTATION_MAJOR 10
-#define GxB_IMPLEMENTATION_MINOR 0
-#define GxB_IMPLEMENTATION_SUB   5
+#define GxB_IMPLEMENTATION_MINOR 1
+#define GxB_IMPLEMENTATION_SUB   0
 #define GxB_SPEC_DATE "Dec 22, 2023"
 #define GxB_SPEC_MAJOR 2
 #define GxB_SPEC_MINOR 1
diff --git a/README.md b/README.md
@@ -4,7 +4,7 @@ SuiteSparse:GraphBLAS, Timothy A. Davis, (c) 2017-2025, All Rights Reserved.
 
 SPDX-License-Identifier: Apache-2.0
 
-VERSION 10.0.5, May 5, 2025
+VERSION 10.1.0, May FIXME, 2025
 
 SuiteSparse:GraphBLAS is a complete implementation of the GraphBLAS standard,
 which defines a set of sparse matrix operations on an extended algebra of
diff --git a/Source/codegen/Generator/GB_AxB.c b/Source/codegen/Generator/GB_AxB.c
@@ -7,9 +7,6 @@
 
 //------------------------------------------------------------------------------
 
-#ifdef GBRISCV64
-#include <riscv_vector.h>
-#endif
 #include "GB_control.h"
 GB_type_enabled
 #if GB_TYPE_ENABLED
@@ -313,13 +310,15 @@ m4_divert(if_semiring_has_avx)
             }
 
         #endif
-m4_divert(if_semiring_has_rvv)
+
         //----------------------------------------------------------------------
         // saxpy5 method with RISC-V vectors
         //----------------------------------------------------------------------
 
         #if GB_COMPILER_SUPPORTS_RVV1
 
+            #include <riscv_vector.h>
+
             GB_TARGET_RVV1 static inline void GB_AxB_saxpy5_unrolled_rvv
             (
                 GrB_Matrix C,
diff --git a/Source/codegen/codegen_axb_method.m b/Source/codegen/codegen_axb_method.m
@@ -298,6 +298,7 @@ function codegen_axb_method (addop, multop, update, addfunc, mult, ztype, xytype
     % enable the avx-based methods.  only two semirings (plus_times_fp32 and
     % plus_times_fp64) are accelerated with AVX2 or AVX512f instructions.  More
     % semirings will be accelerated in the future.
+    % This flag is also used to trigger the RISC-V RVV1.0 vectorization
     fprintf (f, 'm4_define(`if_semiring_has_avx'', `0'')\n') ;
     fprintf (f, 'm4_define(`GB_semiring_has_avx'', `#define GB_SEMIRING_HAS_AVX_IMPLEMENTATION 1'')\n') ;
 else
diff --git a/Source/jit_kernels/include/GB_jit_kernel_proto.h b/Source/jit_kernels/include/GB_jit_kernel_proto.h
@@ -225,6 +225,7 @@ GrB_Info GB_jit_kernel_AxB_saxpy5                                       \
     const int64_t *restrict B_slice,                                    \
     bool cpu_has_avx2,                                                  \
     bool cpu_has_avx512f,                                               \
+    bool cpu_has_rvv1,                                                  \
     const void *theta,                                                  \
     const GB_callback_struct *restrict my_callback                      \
 )
diff --git a/Source/jit_kernels/template/GB_jit_kernel_AxB_saxpy5.c b/Source/jit_kernels/template/GB_jit_kernel_AxB_saxpy5.c
@@ -8,9 +8,6 @@
 //------------------------------------------------------------------------------
 
 #include "include/GB_AxB_saxpy3_template.h"
-#ifdef GBRISCV64
-#include <riscv_vector.h>
-#endif
 
 GB_JIT_GLOBAL GB_JIT_KERNEL_AXB_SAXPY5_PROTO (GB_jit_kernel) ;
 
@@ -92,6 +89,8 @@ GB_JIT_GLOBAL GB_JIT_KERNEL_AXB_SAXPY5_PROTO (GB_jit_kernel) ;
 
         #if GB_COMPILER_SUPPORTS_RVV1
 
+            #include <riscv_vector.h>
+
             GB_TARGET_RVV1 static inline void GB_AxB_saxpy5_unrolled_rvv
             (
                 GrB_Matrix C,
@@ -193,13 +192,9 @@ GB_JIT_GLOBAL GB_JIT_KERNEL_AXB_SAXPY5_PROTO (GB_jit_kernel)
                 return (GrB_SUCCESS) ;
             }
             #endif
-        }
-        #endif
 
-        #if GB_SEMIRING_HAS_RVV_IMPLEMENTATION
-        {
             #if GB_COMPILER_SUPPORTS_RVV1
-            if (cpu_has_avx2)
+            if (cpu_has_rvv1)
             {
                 // RISC-V64 with RVV1.0
                 GB_AxB_saxpy5_unrolled_rvv (C, A, B, ntasks, nthreads,
diff --git a/Source/jit_wrappers/GB_AxB_saxpy5_jit.c b/Source/jit_wrappers/GB_AxB_saxpy5_jit.c
@@ -58,10 +58,11 @@ GrB_Info GB_AxB_saxpy5_jit          // C+=A*B, saxpy5 method, via the JIT
 
     bool cpu_has_avx2 = GB_Global_cpu_features_avx2 ( ) ;
     bool cpu_has_avx512f = GB_Global_cpu_features_avx512f ( ) ;
+    bool cpu_has_rvv1 = GB_Global_cpu_features_rvv_1_0 ( ) ;
     #include "include/GB_pedantic_disable.h"
     GB_jit_dl_function GB_jit_kernel = (GB_jit_dl_function) dl_function ;
     return (GB_jit_kernel (C, A, B, ntasks, nthreads, B_slice,
-        cpu_has_avx2, cpu_has_avx512f, semiring->multiply->theta,
+        cpu_has_avx2, cpu_has_avx512f, cpu_has_rvv1, semiring->multiply->theta,
         &GB_callback)) ;
 }
 
diff --git a/Source/mxm/factory/GB_AxB_saxpy5_meta.c b/Source/mxm/factory/GB_AxB_saxpy5_meta.c
@@ -142,9 +142,6 @@
                         return (GrB_SUCCESS) ;
                     }
                     #endif
-                #endif
-
-                #if GB_SEMIRING_HAS_RVV_IMPLEMENTATION
                     #if GB_COMPILER_SUPPORTS_RVV1
                     if (GB_Global_cpu_features_rvv_1_0 ( ))
                     {
diff --git a/Source/mxm/include/GB_mxm_shared_definitions.h b/Source/mxm/include/GB_mxm_shared_definitions.h
@@ -66,17 +66,11 @@
 #define GB_IS_MAX_FIRSTJ_SEMIRING 0
 #endif
 
-// 1 if the semiring has an AVX512 or AVX2 implementation
+// 1 if the semiring has an AVX512, AVX2, or RVV1.0 implementation
 #ifndef GB_SEMIRING_HAS_AVX_IMPLEMENTATION
 #define GB_SEMIRING_HAS_AVX_IMPLEMENTATION 0
 #endif
 
-//1 if the semiring has a RVV1.0 implementation
-#ifndef GB_SEMIRING_HAS_RVV_IMPLEMENTATION
-#define GB_SEMIRING_HAS_RVV_IMPLEMENTATION 0
-#endif
-
-
 //------------------------------------------------------------------------------
 // special multiply operators
 //------------------------------------------------------------------------------
diff --git a/Source/mxm/template/GB_AxB_saxpy5_lv.c b/Source/mxm/template/GB_AxB_saxpy5_lv.c
@@ -2,6 +2,20 @@
 // GB_AxB_saxpy5_lv.c: C+=A*B when C is full
 //------------------------------------------------------------------------------
 
+#if GB_Z_NBITS == 64
+    #define VSETVL(x) __riscv_vsetvl_e64m8(x)
+    #define VLE(x,y) __riscv_vle64_v_f64m8(x, y)
+    #define VFMACC(x,y,z,w) __riscv_vfmacc_vf_f64m8(x, y, z, w)
+    #define VSE(x,y,z) __riscv_vse64_v_f64m8(x, y, z)
+    #define VECTORTYPE vfloat64m8_t
+#else
+    #define VSETVL(x) __riscv_vsetvl_e32m8(x)
+    #define VLE(x,y) __riscv_vle32_v_f32m8(x, y)
+    #define VFMACC(x,y,z,w) __riscv_vfmacc_vf_f32m8(x, y, z, w)
+    #define VSE(x,y,z) __riscv_vse32_v_f32m8(x, y, z)
+    #define VECTORTYPE vfloat32m8_t
+#endif
+
 {
 
     //--------------------------------------------------------------------------
diff --git a/cmake_modules/GraphBLAS_version.cmake b/cmake_modules/GraphBLAS_version.cmake
@@ -8,10 +8,10 @@
 #-------------------------------------------------------------------------------
 
 # version of SuiteSparse:GraphBLAS
-set ( GraphBLAS_DATE "May 5, 2025" )
+set ( GraphBLAS_DATE "May FIXME, 2025" )
 set ( GraphBLAS_VERSION_MAJOR 10 CACHE STRING "" FORCE )
-set ( GraphBLAS_VERSION_MINOR 0 CACHE STRING "" FORCE )
-set ( GraphBLAS_VERSION_SUB   5 CACHE STRING "" FORCE )
+set ( GraphBLAS_VERSION_MINOR 1 CACHE STRING "" FORCE )
+set ( GraphBLAS_VERSION_SUB   0 CACHE STRING "" FORCE )
 
 # GraphBLAS C API Specification version, at graphblas.org
 set ( GraphBLAS_API_DATE "Dec 22, 2023" )

Original file line number	Diff line number	Diff line change
`@@ -225,6 +225,7 @@ GrB_Info GB_jit_kernel_AxB_saxpy5 \`
`225`	`225`	`const int64_t *restrict B_slice, \`
`226`	`226`	`bool cpu_has_avx2, \`
`227`	`227`	`bool cpu_has_avx512f, \`
	`228`	`+ bool cpu_has_rvv1, \`
`228`	`229`	`const void *theta, \`
`229`	`230`	`const GB_callback_struct *restrict my_callback \`
`230`	`231`	`)`