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Merge pull request #634 from billsacks/handle_rank3_fields
For water tracers: Add handling of rank-3 fields and refactor med_phases_prep_glc_map_lnd2glc
### Description of changes
Two sets of changes that will be needed for water tracers - and in particular, for the tracer version of Flgl_qice_elev, which will be the first field in CMEPS that has two ungridded dimensions:
(1) Extend various methods to support rank-3 fields
(2) Refactor med_phases_prep_glc_map_lnd2glc to pre-compute vertical interpolation weights; this will be helpful when we introduce Flgl_qice_elev_wtracers to avoid duplicating this calculation of vertical interpolation weights between the non-tracer (rank-2 on the lnd grid and rank-1 on the glc grid) and tracer (rank-3 on the lnd grid and rank-2 on the glc grid) fields.
### Specific notes
Contributors other than yourself, if any: Claude Code did a lot of the writing of this code, but I have reviewed it all carefully
CMEPS Issues Fixed (include github issue #):
Are changes expected to change answers? (specify if bfb, different at roundoff, more substantial) bfb when using #633 as a baseline
Any User Interface Changes (namelist or namelist defaults changes)? No
### Testing performed
In the context of cesm3_0_alpha08e, ran:
(1) aux_glc on derecho plus a few extra tests, with comparisons against baselines generated with #633 .
The extra tests beyond aux_glc were:
```
SMS_Ly2.f09_g17_gris20.T1850Gg.derecho_intel
SMS_Ld5.f10_f10_ais8gris4_mg37.I1850Clm50SpGag.derecho_intel.cism-test_coupling
SMS_Lm13.f10_f10_mg37.I1850Clm50SpG.derecho_intel
ERS_Ld5.ne30pg3_t232.B1850C_LTso.derecho_intel.allactive-decstart
ERS_Ld5.ne30pg3_t232.BHISTC_LTso.derecho_intel.allactive-decstart
```
All tests passed and were bit-for-bit, except for this failure that also failed in the baseline: `FAIL NCK_Ly3.f09_g17_gris20.T1850Gg.derecho_gnu COMPARE_base_multiinst`
(2) Full prealpha testing on derecho and izumi with comparison against cesm3_0_alpha08e
Tests passed except for tests that also failed in the baselines or seemed to have passed due to tweaks made in the baseline (e.g., increasing wallclock time for `SUB_D_Ln9.ne3pg3_ne3pg3_mt232.FHIST.izumi_nag.cam-outfrq9s`).
Baseline failures were all as expected (except that a few B compset tests failed baseline comparison due to a difference in which cpl.hx.ww3 files were present in the run vs. baseline, which presumably is due to something outside of this PR):
```
ERS_Ld5.ne30pg3_t232.B1850C_LTso.derecho_intel.allactive-decstart
ERS_Ld5.ne30pg3_t232.BHISTC_LTso.derecho_intel.allactive-decstart
ERS_Ly7.f09_g17_gris4.T1850Gg.derecho_intel
MULTINOAIS_Ly2.f10_f10_ais8gris4_mg37.I1850Clm50SpRsGag.derecho_intel.cism-change_params
SMS_Lm13.f10_f10_mg37.I1850Clm50SpG.derecho_intel
SMS_D_Ly1.f09_g17_ais8.T1850Ga.derecho_gnu
SMS_D_Ld5_P24x1.f10_f10_ais8gris4_mg37.I1850Clm50SpGag.izumi_nag.cism-test_coupling
```
Note that I showed that these differences go away when comparing against baselines generated with #633 , for similar or identical tests.
So I think it's safe to conclude that this is bit-for-bit with #633 .
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