feat(library-selection): #215 add resolve_warm criterion bench (P-01 mini)#216
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…mini) Mirrors resolve_cold.rs but pre-populates a KvStore against the same ~30-library MiniFramework fixture and times only the cache-hit path through resolve_cached(). Each bench iteration asserts from_cache so a silent regression to the miss path can never be measured as warm work. Wires the bench into the .github/workflows/bench-205.yml matrix as a third lane (P-01-mini, baseline TBD — no failure gate yet) and updates bench/README.md, the fastled-examples/ placeholder, and the per-crate benches/README.md to reflect that the synthetic warm baseline now exists; the real per-board FastLED matrix remains future work. Local numbers (Windows, debug shell): cold ~5.0 ms, warm ~1.7 ms over the same MiniFramework tree. Closes #215 Refs #205 Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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📝 WalkthroughWalkthroughThis PR adds a Criterion benchmark that measures the warm cache-hit path for the library resolution algorithm. It builds on the ChangesWarm-cache resolve benchmark
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…-cache harness Adds a real-FastLED-matrix bench under `bench/fastled-examples/`, complementing the synthetic per-crate `resolve_warm` from #216. For each of a curated subset of FastLED examples (Blink, Pacifica, Animartrix, Audio, BlurBenchmark, Chromancer), runs `resolve_cached` cold + warm against a fresh `KvStore` and reports timings. Asserts `from_cache=true` on the warm pass so silent re-misses surface immediately. Local numbers (Windows release, FastLED master, 6 examples × synthetic 6-lib Teensyduino-class framework): | example | cold (ms) | warm (ms) | speedup | |---------------|----------:|----------:|--------:| | Blink | 923.58 | 11.36 | 81.3x | | Pacifica | 915.98 | 12.64 | 72.4x | | Animartrix | 970.14 | 11.76 | 82.5x | | Audio | 830.51 | 11.74 | 70.7x | | BlurBenchmark | 827.46 | 10.48 | 79.0x | | Chromancer | 844.13 | 10.89 | 77.5x | Warm path comfortably clears AC#5 (≤ +50 ms over current fbuild) at ~11 ms per example. The asymmetry reflects the cost of walking FastLED src/ (~1000 files) cold vs. a `KvStore::get` + bincode decode warm. CI lane added as `workflow_dispatch`-only (needs FastLED checkout step). No threshold gate yet — capture a stable cross-runner baseline first. Closes #218. Refs #205 Phase 7. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
…-cache harness Adds a real-FastLED-matrix bench under `bench/fastled-examples/`, complementing the synthetic per-crate `resolve_warm` from #216. For each of a curated subset of FastLED examples (Blink, Pacifica, Animartrix, Audio, BlurBenchmark, Chromancer), runs `resolve_cached` cold + warm against a fresh `KvStore` and reports timings. Asserts `from_cache=true` on the warm pass so silent re-misses surface immediately. Local numbers (Windows release, FastLED master, 6 examples × synthetic 6-lib Teensyduino-class framework): | example | cold (ms) | warm (ms) | speedup | |---------------|----------:|----------:|--------:| | Blink | 923.58 | 11.36 | 81.3x | | Pacifica | 915.98 | 12.64 | 72.4x | | Animartrix | 970.14 | 11.76 | 82.5x | | Audio | 830.51 | 11.74 | 70.7x | | BlurBenchmark | 827.46 | 10.48 | 79.0x | | Chromancer | 844.13 | 10.89 | 77.5x | Warm path comfortably clears AC#5 (≤ +50 ms over current fbuild) at ~11 ms per example. The asymmetry reflects the cost of walking FastLED src/ (~1000 files) cold vs. a `KvStore::get` + bincode decode warm. CI lane added as `workflow_dispatch`-only (needs FastLED checkout step). No threshold gate yet — capture a stable cross-runner baseline first. Closes #218. Refs #205 Phase 7. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
…-cache harness (#219) Adds a real-FastLED-matrix bench under `bench/fastled-examples/`, complementing the synthetic per-crate `resolve_warm` from #216. For each of a curated subset of FastLED examples (Blink, Pacifica, Animartrix, Audio, BlurBenchmark, Chromancer), runs `resolve_cached` cold + warm against a fresh `KvStore` and reports timings. Asserts `from_cache=true` on the warm pass so silent re-misses surface immediately. Local numbers (Windows release, FastLED master, 6 examples × synthetic 6-lib Teensyduino-class framework): | example | cold (ms) | warm (ms) | speedup | |---------------|----------:|----------:|--------:| | Blink | 923.58 | 11.36 | 81.3x | | Pacifica | 915.98 | 12.64 | 72.4x | | Animartrix | 970.14 | 11.76 | 82.5x | | Audio | 830.51 | 11.74 | 70.7x | | BlurBenchmark | 827.46 | 10.48 | 79.0x | | Chromancer | 844.13 | 10.89 | 77.5x | Warm path comfortably clears AC#5 (≤ +50 ms over current fbuild) at ~11 ms per example. The asymmetry reflects the cost of walking FastLED src/ (~1000 files) cold vs. a `KvStore::get` + bincode decode warm. CI lane added as `workflow_dispatch`-only (needs FastLED checkout step). No threshold gate yet — capture a stable cross-runner baseline first. Closes #218. Refs #205 Phase 7. Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
Summary
crates/fbuild-library-select/benches/resolve_warm.rs, a Criterion bench mirroringresolve_cold.rsthat builds the same ~30-libraryMiniFrameworkfixture, primes aKvStorewith one untimedresolve_cachedcall, and times only the cache-hit path on the second invocation. Each iteration assertsfrom_cache == trueso a silent regression to miss work can never be reported as warm..github/workflows/bench-205.ymlmatrix as a third lane (targetP-01-mini (warm cache against MiniFramework, baseline TBD)). No CI failure gate yet — the threshold gate lands in a follow-up once we have a stable baseline number.crates/fbuild-library-select/benches/README.md,bench/README.md, andbench/fastled-examples/README.mdto reflect that Phase 4 K/V memoization (PR feat(library-selection): #205 Phase 4 zccache K/V memoization #212) shipped and the synthetic warm baseline now exists. The real per-board, per-example FastLED matrix remains future work tracked underbench/fastled-examples/.Local baseline numbers
Windows host,
--releaseCriterion, sameMiniFramework(30 libs, chain depth 5):resolve_coldresolve_warmWarm is ~3x faster than cold; the gap is bounded below by the cache-key computation itself, which still hashes seed bodies and canonical library headers (per the
cache_keydesign incache.rs). That is by design — the cache key has to reflect on-disk content to be sound. Real warm-path wins on a Teensyduino-class tree should be larger because the cold side scales with the LDF reconciliation cost, while the warm side stays near constant.Test plan
uv run soldr cargo build --benches -p fbuild-library-select(clean)uv run soldr cargo bench -p fbuild-library-select --bench resolve_warm(completed; baseline above)uv run soldr cargo bench -p fbuild-library-select --bench resolve_cold(re-run for comparison)uv run soldr cargo clippy --workspace --all-targets -- -D warnings(clean)uv run soldr cargo fmt --all -- --check(clean)Out of scope
resolve_cached(tracked under #205 follow-up: wire library-selection cache into orchestrators (teensy, stm32) #214, separate PR by another agent).bench/fastled-examples/(still gated on a checked-out FastLED tree + orchestrator wiring).Closes #215
Refs #205
Co-Authored-By: Claude Opus 4.7 (1M context) noreply@anthropic.com
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Tests
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