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FoamyGuyFoamyGuy
committed
update PIO programs
1 parent e22dc0a commit 6479ceb

9 files changed

Lines changed: 238 additions & 138 deletions

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‎ports/raspberrypi/common-hal/audioi2sin/I2SIn.c‎

Lines changed: 113 additions & 73 deletions
Original file line numberDiff line numberDiff line change
@@ -38,112 +38,152 @@
3838

3939
// Master-mode RX, regular pin order (BCLK = WS - 1), Philips alignment.
4040
static const uint16_t i2sin_program[] = {
41-
// .wrap_target
42-
0xf04e, // 0: set y, 14 side 2
43-
0x5a01, // 1: in pins, 1 side 3 [2]
44-
0x1281, // 2: jmp y--, 1 side 2 [2]
45-
0x4a01, // 3: in pins, 1 side 1 [2]
46-
0xe24e, // 4: set y, 14 side 0 [2]
47-
0x4a01, // 5: in pins, 1 side 1 [2]
48-
0x0285, // 6: jmp y--, 5 side 0 [2]
49-
0x5a01, // 7: in pins, 1 side 3 [2]
41+
0xb842, // 0: nop side 3
42+
// .wrap_target
43+
0xf94e, // 1: set y, 14 side 3 [1]
44+
0xb242, // 2: nop side 2 [2]
45+
0x5801, // 3: in pins, 1 side 3
46+
0x1982, // 4: jmp y--, 2 side 3 [1]
47+
0xa242, // 5: nop side 0 [2]
48+
0x4801, // 6: in pins, 1 side 1
49+
0xe94e, // 7: set y, 14 side 1 [1]
50+
0xa242, // 8: nop side 0 [2]
51+
0x4801, // 9: in pins, 1 side 1
52+
0x0988, // 10: jmp y--, 8 side 1 [1]
53+
0xb242, // 11: nop side 2 [2]
54+
0x5801, // 12: in pins, 1 side 3
5055
// .wrap
5156
};
5257

5358
// Master-mode RX, regular pin order, left-justified.
5459
static const uint16_t i2sin_program_left_justified[] = {
55-
// .wrap_target
56-
0xe04e, // 0: set y, 14 side 0
57-
0x5a01, // 1: in pins, 1 side 3 [2]
58-
0x1281, // 2: jmp y--, 1 side 2 [2]
59-
0x5a01, // 3: in pins, 1 side 3 [2]
60-
0xf24e, // 4: set y, 14 side 2 [2]
61-
0x4a01, // 5: in pins, 1 side 1 [2]
62-
0x0285, // 6: jmp y--, 5 side 0 [2]
63-
0x4a01, // 7: in pins, 1 side 1 [2]
60+
0xa842, // 0: nop side 1
61+
// .wrap_target
62+
0xe94e, // 1: set y, 14 side 1 [1]
63+
0xb242, // 2: nop side 2 [2]
64+
0x5801, // 3: in pins, 1 side 3
65+
0x1982, // 4: jmp y--, 2 side 3 [1]
66+
0xb242, // 5: nop side 2 [2]
67+
0x5801, // 6: in pins, 1 side 3
68+
0xf94e, // 7: set y, 14 side 3 [1]
69+
0xa242, // 8: nop side 0 [2]
70+
0x4801, // 9: in pins, 1 side 1
71+
0x0988, // 10: jmp y--, 8 side 1 [1]
72+
0xa242, // 11: nop side 0 [2]
73+
0x4801, // 12: in pins, 1 side 1
6474
// .wrap
6575
};
6676

6777
// Master-mode RX, swapped pin order (BCLK = WS + 1), Philips alignment.
6878
static const uint16_t i2sin_program_swap[] = {
69-
// .wrap_target
70-
0xe84e, // 0: set y, 14 side 1
71-
0x5a01, // 1: in pins, 1 side 3 [2]
72-
0x0a81, // 2: jmp y--, 1 side 1 [2]
73-
0x5201, // 3: in pins, 1 side 2 [2]
74-
0xe24e, // 4: set y, 14 side 0 [2]
75-
0x5201, // 5: in pins, 1 side 2 [2]
76-
0x0285, // 6: jmp y--, 5 side 0 [2]
77-
0x5a01, // 7: in pins, 1 side 3 [2]
79+
0xb842, // 0: nop side 3
80+
// .wrap_target
81+
0xf94e, // 1: set y, 14 side 3 [1]
82+
0xaa42, // 2: nop side 1 [2]
83+
0x5801, // 3: in pins, 1 side 3
84+
0x1982, // 4: jmp y--, 2 side 3 [1]
85+
0xa242, // 5: nop side 0 [2]
86+
0x5001, // 6: in pins, 1 side 2
87+
0xf14e, // 7: set y, 14 side 2 [1]
88+
0xa242, // 8: nop side 0 [2]
89+
0x5001, // 9: in pins, 1 side 2
90+
0x1188, // 10: jmp y--, 8 side 2 [1]
91+
0xaa42, // 11: nop side 1 [2]
92+
0x5801, // 12: in pins, 1 side 3
7893
// .wrap
7994
};
8095

8196
// Master-mode RX, swapped pin order, left-justified.
8297
static const uint16_t i2sin_program_left_justified_swap[] = {
83-
// .wrap_target
84-
0xe04e, // 0: set y, 14 side 0
85-
0x5a01, // 1: in pins, 1 side 3 [2]
86-
0x0a81, // 2: jmp y--, 1 side 1 [2]
87-
0x5a01, // 3: in pins, 1 side 3 [2]
88-
0xea4e, // 4: set y, 14 side 1 [2]
89-
0x5201, // 5: in pins, 1 side 2 [2]
90-
0x0285, // 6: jmp y--, 5 side 0 [2]
91-
0x5201, // 7: in pins, 1 side 2 [2]
98+
0xb042, // 0: nop side 2
99+
// .wrap_target
100+
0xf14e, // 1: set y, 14 side 2 [1]
101+
0xaa42, // 2: nop side 1 [2]
102+
0x5801, // 3: in pins, 1 side 3
103+
0x1982, // 4: jmp y--, 2 side 3 [1]
104+
0xaa42, // 5: nop side 1 [2]
105+
0x5801, // 6: in pins, 1 side 3
106+
0xf94e, // 7: set y, 14 side 3 [1]
107+
0xa242, // 8: nop side 0 [2]
108+
0x5001, // 9: in pins, 1 side 2
109+
0x1188, // 10: jmp y--, 8 side 2 [1]
110+
0xa242, // 11: nop side 0 [2]
111+
0x5001, // 12: in pins, 1 side 2
92112
// .wrap
93113
};
94114

95115
// 32-bit-per-channel variants: identical to the 16-bit programs above except
96116
// the loop counter is set to 30 (so each `bitloop` runs 31 in's, plus one
97117
// outside the loop = 32 in's per channel).
98118
static const uint16_t i2sin_program_32[] = {
99-
// .wrap_target
100-
0xf05e, // 0: set y, 30 side 2
101-
0x5a01, // 1: in pins, 1 side 3 [2]
102-
0x1281, // 2: jmp y--, 1 side 2 [2]
103-
0x4a01, // 3: in pins, 1 side 1 [2]
104-
0xe25e, // 4: set y, 30 side 0 [2]
105-
0x4a01, // 5: in pins, 1 side 1 [2]
106-
0x0285, // 6: jmp y--, 5 side 0 [2]
107-
0x5a01, // 7: in pins, 1 side 3 [2]
119+
0xb842, // 0: nop side 3
120+
// .wrap_target
121+
0xf95e, // 1: set y, 30 side 3 [1]
122+
0xb242, // 2: nop side 2 [2]
123+
0x5801, // 3: in pins, 1 side 3
124+
0x1982, // 4: jmp y--, 2 side 3 [1]
125+
0xa242, // 5: nop side 0 [2]
126+
0x4801, // 6: in pins, 1 side 1
127+
0xe95e, // 7: set y, 30 side 1 [1]
128+
0xa242, // 8: nop side 0 [2]
129+
0x4801, // 9: in pins, 1 side 1
130+
0x0988, // 10: jmp y--, 8 side 1 [1]
131+
0xb242, // 11: nop side 2 [2]
132+
0x5801, // 12: in pins, 1 side 3
108133
// .wrap
109134
};
110135

111136
static const uint16_t i2sin_program_left_justified_32[] = {
112-
// .wrap_target
113-
0xe05e, // 0: set y, 30 side 0
114-
0x5a01, // 1: in pins, 1 side 3 [2]
115-
0x1281, // 2: jmp y--, 1 side 2 [2]
116-
0x5a01, // 3: in pins, 1 side 3 [2]
117-
0xf25e, // 4: set y, 30 side 2 [2]
118-
0x4a01, // 5: in pins, 1 side 1 [2]
119-
0x0285, // 6: jmp y--, 5 side 0 [2]
120-
0x4a01, // 7: in pins, 1 side 1 [2]
137+
0xa842, // 0: nop side 1
138+
// .wrap_target
139+
0xe95e, // 1: set y, 30 side 1 [1]
140+
0xb242, // 2: nop side 2 [2]
141+
0x5801, // 3: in pins, 1 side 3
142+
0x1982, // 4: jmp y--, 2 side 3 [1]
143+
0xb242, // 5: nop side 2 [2]
144+
0x5801, // 6: in pins, 1 side 3
145+
0xf95e, // 7: set y, 30 side 3 [1]
146+
0xa242, // 8: nop side 0 [2]
147+
0x4801, // 9: in pins, 1 side 1
148+
0x0988, // 10: jmp y--, 8 side 1 [1]
149+
0xa242, // 11: nop side 0 [2]
150+
0x4801, // 12: in pins, 1 side 1
121151
// .wrap
122152
};
123153

124154
static const uint16_t i2sin_program_swap_32[] = {
125-
// .wrap_target
126-
0xe85e, // 0: set y, 30 side 1
127-
0x5a01, // 1: in pins, 1 side 3 [2]
128-
0x0a81, // 2: jmp y--, 1 side 1 [2]
129-
0x5201, // 3: in pins, 1 side 2 [2]
130-
0xe25e, // 4: set y, 30 side 0 [2]
131-
0x5201, // 5: in pins, 1 side 2 [2]
132-
0x0285, // 6: jmp y--, 5 side 0 [2]
133-
0x5a01, // 7: in pins, 1 side 3 [2]
155+
0xb842, // 0: nop side 3
156+
// .wrap_target
157+
0xf95e, // 1: set y, 30 side 3 [1]
158+
0xaa42, // 2: nop side 1 [2]
159+
0x5801, // 3: in pins, 1 side 3
160+
0x1982, // 4: jmp y--, 2 side 3 [1]
161+
0xa242, // 5: nop side 0 [2]
162+
0x5001, // 6: in pins, 1 side 2
163+
0xf15e, // 7: set y, 30 side 2 [1]
164+
0xa242, // 8: nop side 0 [2]
165+
0x5001, // 9: in pins, 1 side 2
166+
0x1188, // 10: jmp y--, 8 side 2 [1]
167+
0xaa42, // 11: nop side 1 [2]
168+
0x5801, // 12: in pins, 1 side 3
134169
// .wrap
135170
};
136171

137172
static const uint16_t i2sin_program_left_justified_swap_32[] = {
138-
// .wrap_target
139-
0xe05e, // 0: set y, 30 side 0
140-
0x5a01, // 1: in pins, 1 side 3 [2]
141-
0x0a81, // 2: jmp y--, 1 side 1 [2]
142-
0x5a01, // 3: in pins, 1 side 3 [2]
143-
0xea5e, // 4: set y, 30 side 1 [2]
144-
0x5201, // 5: in pins, 1 side 2 [2]
145-
0x0285, // 6: jmp y--, 5 side 0 [2]
146-
0x5201, // 7: in pins, 1 side 2 [2]
173+
0xb042, // 0: nop side 2
174+
// .wrap_target
175+
0xf15e, // 1: set y, 30 side 2 [1]
176+
0xaa42, // 2: nop side 1 [2]
177+
0x5801, // 3: in pins, 1 side 3
178+
0x1982, // 4: jmp y--, 2 side 3 [1]
179+
0xaa42, // 5: nop side 1 [2]
180+
0x5801, // 6: in pins, 1 side 3
181+
0xf95e, // 7: set y, 30 side 3 [1]
182+
0xa242, // 8: nop side 0 [2]
183+
0x5001, // 9: in pins, 1 side 2
184+
0x1188, // 10: jmp y--, 8 side 2 [1]
185+
0xa242, // 11: nop side 0 [2]
186+
0x5001, // 12: in pins, 1 side 2
147187
// .wrap
148188
};
149189

@@ -216,7 +256,7 @@ void common_hal_audioi2sin_i2sin_construct(audioi2sin_i2sin_obj_t *self,
216256
false, // Wait for txstall
217257
true, 32, false, // in settings: auto-push at 32 bits, shift left (MSB first)
218258
false, // Not user-interruptible.
219-
0, -1, // wrap settings
259+
1, -1, // wrap settings
220260
PIO_ANY_OFFSET,
221261
PIO_FIFO_TYPE_DEFAULT,
222262
PIO_MOV_STATUS_DEFAULT,

‎ports/raspberrypi/common-hal/audioi2sin/i2sin.pio‎

Lines changed: 15 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -15,13 +15,20 @@
1515
; /--- LRCLK
1616
; |/-- BCLK
1717
; ||
18-
set y 14 side 0b10
18+
nop side 0b11
19+
.wrap_target
20+
set y 14 side 0b11 [1]
1921
bitloop1:
20-
in pins 1 side 0b11 [2] ; Right channel first
21-
jmp y-- bitloop1 side 0b10 [2]
22-
in pins 1 side 0b01 [2]
23-
set y 14 side 0b00 [2]
22+
nop side 0b10 [2] ; Right channel first
23+
in pins 1 side 0b11
24+
jmp y-- bitloop1 side 0b11 [1]
25+
nop side 0b00 [2]
26+
in pins 1 side 0b01
27+
set y 14 side 0b01 [1]
2428
bitloop0:
25-
in pins 1 side 0b01 [2] ; Then left channel
26-
jmp y-- bitloop0 side 0b00 [2]
27-
in pins 1 side 0b11 [2]
29+
nop side 0b00 [2] ; Then left channel
30+
in pins 1 side 0b01
31+
jmp y-- bitloop0 side 0b01 [1]
32+
nop side 0b10 [2]
33+
in pins 1 side 0b11
34+
.wrap

‎ports/raspberrypi/common-hal/audioi2sin/i2sin_32.pio‎

Lines changed: 20 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -8,17 +8,28 @@
88
.side_set 2
99

1010
; Master-mode I2S RX, 32 bits per channel (also used for 24-bit mics that
11-
; transmit data left-justified in a 32-bit slot).
11+
; transmit data left-justified in a 32-bit slot). Generates BCLK and LRCLK
12+
; via side-set and samples the data pin. The slave updates `data` on BCLK
13+
; falling edge, so the master samples on the rising edge: every `in pins 1`
14+
; runs on a side-set value with BCLK=1, and the preceding nop holds BCLK=0
15+
; so the slave has time to settle the next bit.
1216
; /--- LRCLK
1317
; |/-- BCLK
1418
; ||
15-
set y 30 side 0b10
19+
nop side 0b11
20+
.wrap_target
21+
set y 30 side 0b11 [1]
1622
bitloop1:
17-
in pins 1 side 0b11 [2] ; Right channel first
18-
jmp y-- bitloop1 side 0b10 [2]
19-
in pins 1 side 0b01 [2]
20-
set y 30 side 0b00 [2]
23+
nop side 0b10 [2] ; Right channel first
24+
in pins 1 side 0b11
25+
jmp y-- bitloop1 side 0b11 [1]
26+
nop side 0b00 [2]
27+
in pins 1 side 0b01
28+
set y 30 side 0b01 [1]
2129
bitloop0:
22-
in pins 1 side 0b01 [2] ; Then left channel
23-
jmp y-- bitloop0 side 0b00 [2]
24-
in pins 1 side 0b11 [2]
30+
nop side 0b00 [2] ; Then left channel
31+
in pins 1 side 0b01
32+
jmp y-- bitloop0 side 0b01 [1]
33+
nop side 0b10 [2]
34+
in pins 1 side 0b11
35+
.wrap

‎ports/raspberrypi/common-hal/audioi2sin/i2sin_left.pio‎

Lines changed: 15 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -11,13 +11,20 @@
1111
; /--- LRCLK
1212
; |/-- BCLK
1313
; ||
14-
set y 14 side 0b00
14+
nop side 0b01
15+
.wrap_target
16+
set y 14 side 0b01 [1]
1517
bitloop1:
16-
in pins 1 side 0b11 [2] ; Right channel first
17-
jmp y-- bitloop1 side 0b10 [2]
18-
in pins 1 side 0b11 [2]
19-
set y 14 side 0b10 [2]
18+
nop side 0b10 [2] ; Right channel first
19+
in pins 1 side 0b11
20+
jmp y-- bitloop1 side 0b11 [1]
21+
nop side 0b10 [2]
22+
in pins 1 side 0b11
23+
set y 14 side 0b11 [1]
2024
bitloop0:
21-
in pins 1 side 0b01 [2] ; Then left channel
22-
jmp y-- bitloop0 side 0b00 [2]
23-
in pins 1 side 0b01 [2]
25+
nop side 0b00 [2] ; Then left channel
26+
in pins 1 side 0b01
27+
jmp y-- bitloop0 side 0b01 [1]
28+
nop side 0b00 [2]
29+
in pins 1 side 0b01
30+
.wrap

‎ports/raspberrypi/common-hal/audioi2sin/i2sin_left_32.pio‎

Lines changed: 15 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -11,13 +11,20 @@
1111
; /--- LRCLK
1212
; |/-- BCLK
1313
; ||
14-
set y 30 side 0b00
14+
nop side 0b01
15+
.wrap_target
16+
set y 30 side 0b01 [1]
1517
bitloop1:
16-
in pins 1 side 0b11 [2] ; Right channel first
17-
jmp y-- bitloop1 side 0b10 [2]
18-
in pins 1 side 0b11 [2]
19-
set y 30 side 0b10 [2]
18+
nop side 0b10 [2] ; Right channel first
19+
in pins 1 side 0b11
20+
jmp y-- bitloop1 side 0b11 [1]
21+
nop side 0b10 [2]
22+
in pins 1 side 0b11
23+
set y 30 side 0b11 [1]
2024
bitloop0:
21-
in pins 1 side 0b01 [2] ; Then left channel
22-
jmp y-- bitloop0 side 0b00 [2]
23-
in pins 1 side 0b01 [2]
25+
nop side 0b00 [2] ; Then left channel
26+
in pins 1 side 0b01
27+
jmp y-- bitloop0 side 0b01 [1]
28+
nop side 0b00 [2]
29+
in pins 1 side 0b01
30+
.wrap

‎ports/raspberrypi/common-hal/audioi2sin/i2sin_swap.pio‎

Lines changed: 15 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -12,13 +12,20 @@
1212
; /--- BCLK
1313
; |/-- LRCLK
1414
; ||
15-
set y 14 side 0b01
15+
nop side 0b11
16+
.wrap_target
17+
set y 14 side 0b11 [1]
1618
bitloop1:
17-
in pins 1 side 0b11 [2] ; Right channel first
18-
jmp y-- bitloop1 side 0b01 [2]
19-
in pins 1 side 0b10 [2]
20-
set y 14 side 0b00 [2]
19+
nop side 0b01 [2] ; Right channel first
20+
in pins 1 side 0b11
21+
jmp y-- bitloop1 side 0b11 [1]
22+
nop side 0b00 [2]
23+
in pins 1 side 0b10
24+
set y 14 side 0b10 [1]
2125
bitloop0:
22-
in pins 1 side 0b10 [2] ; Then left channel
23-
jmp y-- bitloop0 side 0b00 [2]
24-
in pins 1 side 0b11 [2]
26+
nop side 0b00 [2] ; Then left channel
27+
in pins 1 side 0b10
28+
jmp y-- bitloop0 side 0b10 [1]
29+
nop side 0b01 [2]
30+
in pins 1 side 0b11
31+
.wrap

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