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yamash-fjyamash-fj
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[AArch64][Driver] Address review comments on AArch64 -mcpu no-feature handling
Add a comment explaining why Enabled.set() is used instead of enable(). Remove setEnableIfMandatory(). Update the tests, aarch64-mcpu-no-feat.c and targetattr.c. Change the order of enabling CPU-default features and architecture-default features. As a result, a feature is omitted from the cc1-commandline if it is implied by both the CPU and the base architecture. Update the affected tests accordingly.
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10 files changed

Lines changed: 70 additions & 30 deletions

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‎clang/test/CodeGen/AArch64/targetattr.c‎

Lines changed: 36 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -215,6 +215,38 @@ __attribute__((target("+sme")))
215215
//
216216
__arm_locally_streaming void plussmelocallystreaming(void) {}
217217

218+
__attribute__((target("cpu=neoverse-v2+nosve")))
219+
// CHECK-LABEL: define {{[^@]+}}@v2nosve
220+
// CHECK-SAME: () #[[ATTR21:[0-9]+]] {
221+
// CHECK-NEXT: entry:
222+
// CHECK-NEXT: ret void
223+
//
224+
void v2nosve() {}
225+
226+
__attribute__((target("cpu=neoverse-v2+norng")))
227+
// CHECK-LABEL: define {{[^@]+}}@v2norng
228+
// CHECK-SAME: () #[[ATTR22:[0-9]+]] {
229+
// CHECK-NEXT: entry:
230+
// CHECK-NEXT: ret void
231+
//
232+
void v2norng() {}
233+
234+
__attribute__((target("cpu=neoverse-v2+nosb")))
235+
// CHECK-LABEL: define {{[^@]+}}@v2nosb
236+
// CHECK-SAME: () #[[ATTR23:[0-9]+]] {
237+
// CHECK-NEXT: entry:
238+
// CHECK-NEXT: ret void
239+
//
240+
void v2nosb() {}
241+
242+
__attribute__((target("cpu=neoverse-v2+nosha2")))
243+
// CHECK-LABEL: define {{[^@]+}}@v2nosha2
244+
// CHECK-SAME: () #[[ATTR24:[0-9]+]] {
245+
// CHECK-NEXT: entry:
246+
// CHECK-NEXT: ret void
247+
//
248+
void v2nosha2() {}
249+
218250
//.
219251
// CHECK: attributes #[[ATTR0]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+crc,+fp-armv8,+lse,+neon,+ras,+rdm,+v8.1a,+v8.2a,+v8a" }
220252
// CHECK: attributes #[[ATTR1]] = { noinline nounwind optnone vscale_range(1,16) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+crc,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rdm,+sve,+v8.1a,+v8.2a,+v8a" }
@@ -237,6 +269,10 @@ __arm_locally_streaming void plussmelocallystreaming(void) {}
237269
// CHECK: attributes #[[ATTR18]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="apple-m4" "target-features"="+aes,+bf16,+bti,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fpac,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+sme,+sme-f64f64,+sme-i16i64,+sme2,+spe-eef,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8.7a,+v8a,+wfxt" }
238270
// CHECK: attributes #[[ATTR19]] = { noinline nounwind optnone vscale_range(1,16) "aarch64_pstate_sm_enabled" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+fp-armv8,+fullfp16,+neon,+sme" }
239271
// CHECK: attributes #[[ATTR20]] = { noinline nounwind optnone vscale_range(1,16) "aarch64_pstate_sm_body" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+fp-armv8,+fullfp16,+neon,+sme" }
272+
// CHECK: attributes #[[ATTR21]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-v2" "target-features"="+bf16,+bti,+ccidx,+complxnum,+crc,+dit,+dotprod,+ete,+flagm,+fp-armv8,+fp16fml,+fpac,+fullfp16,+i8mm,+jsconv,+lse,+mte,+neon,+pauth,+perfmon,+predres,+rand,+ras,+rcpc,+rdm,+sb,+spe,+ssbs,+trbe,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+v9a,-sve,-sve-bitperm,-sve2" }
273+
// CHECK: attributes #[[ATTR22]] = { noinline nounwind optnone vscale_range(1,16) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-v2" "target-features"="+bf16,+bti,+ccidx,+complxnum,+crc,+dit,+dotprod,+ete,+flagm,+fp-armv8,+fp16fml,+fpac,+fullfp16,+i8mm,+jsconv,+lse,+mte,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+spe,+ssbs,+sve,+sve-bitperm,+sve2,+trbe,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+v9a,-rand" }
274+
// CHECK: attributes #[[ATTR23]] = { noinline nounwind optnone vscale_range(1,16) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-v2" "target-features"="+bf16,+bti,+ccidx,+complxnum,+crc,+dit,+dotprod,+ete,+flagm,+fp-armv8,+fp16fml,+fpac,+fullfp16,+i8mm,+jsconv,+lse,+mte,+neon,+pauth,+perfmon,+predres,+rand,+ras,+rcpc,+rdm,+spe,+ssbs,+sve,+sve-bitperm,+sve2,+trbe,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+v9a,-sb" }
275+
// CHECK: attributes #[[ATTR24]] = { noinline nounwind optnone vscale_range(1,16) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-v2" "target-features"="+bf16,+bti,+ccidx,+complxnum,+crc,+dit,+dotprod,+ete,+flagm,+fp-armv8,+fp16fml,+fpac,+fullfp16,+i8mm,+jsconv,+lse,+mte,+neon,+pauth,+perfmon,+predres,+rand,+ras,+rcpc,+rdm,+sb,+spe,+ssbs,+sve,+sve-bitperm,+sve2,+trbe,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+v9a" }
240276
//.
241277
// CHECK: [[META0:![0-9]+]] = !{!"{{.*}}clang version {{.*}}"}
242278
//.

‎clang/test/Driver/aarch64-dotprod.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,5 +9,5 @@
99
// RUN: %clang -### --target=aarch64 -mcpu=cortex-a75 %s 2>&1 | FileCheck %s
1010
// RUN: %clang -### --target=aarch64 -mcpu=cortex-a76 %s 2>&1 | FileCheck %s
1111
// RUN: %clang -### --target=aarch64 -mcpu=cortex-a55 %s 2>&1 | FileCheck %s
12-
// RUN: %clang -### --target=aarch64 -mcpu=cortex-r82 %s 2>&1 | FileCheck %s
12+
// RUN: %clang -### --target=aarch64 -mcpu=cortex-r82 %s 2>&1 | FileCheck %s --check-prefix=CHECK-NONE
1313
// CHECK: "+dotprod"

‎clang/test/Driver/aarch64-implied-sve-features.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -82,7 +82,7 @@
8282
// SVE-MCPU-FEATURES-NOT: "-target-feature" "+sve-bitperm"
8383
// SVE-MCPU-FEATURES-NOT: "-target-feature" "+sve2-bitperm"
8484
// SVE-MCPU-FEATURES-NOT: "-target-feature" "+sve2"
85-
// SVE-MCPU-FEATURES: "-target-feature" "+sve"
85+
// SVE-MCPU-FEATURES-NOT: "-target-feature" "+sve"
8686

8787
// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-n2+nosve+sve2 %s -### 2>&1 | FileCheck %s --check-prefix=SVE-MCPU-FEATURES-CONFLICT
8888
// SVE-MCPU-FEATURES-CONFLICT-NOT: "-target-feature" "+sve2-bitperm"

‎clang/test/Driver/aarch64-mcpu-no-feat.c‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5,12 +5,18 @@
55

66
// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+nosve %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NOSVE
77
// NEOVERSE-V2-NOSVE: "-target-feature" "-sve"
8+
// NEOVERSE-V2-NOSVE-NOT: "-target-feature" "+sve"
9+
// NEOVERSE-V2-NOSVE: "-target-feature" "-sve2"
10+
// NEOVERSE-V2-NOSVE-NOT: "-target-feature" "+sve"
11+
// NEOVERSE-V2-NOSVE-NOT: "-target-feature" "+sve2"
812

913
// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+norng %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NORNG
1014
// NEOVERSE-V2-NORNG: "-target-feature" "-rand"
15+
// NEOVERSE-V2-NORNG-NOT: "-target-feature" "+rand"
1116

1217
// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+nosb %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NOSB
1318
// NEOVERSE-V2-NOSB: "-target-feature" "-sb"
19+
// NEOVERSE-V2-NOSB-NOT: "-target-feature" "+sb"
1420

1521
// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+nosha2 %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NOSHA2
1622
// NEOVERSE-V2-NOSHA2-NOT: "-target-feature" "+sha2"

‎clang/test/Driver/aarch64-predres.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
// RUN: %clang -### --target=aarch64-none-elf -march=armv8a+predres %s 2>&1 | FileCheck %s
2-
// RUN: %clang -### --target=aarch64-none-elf -mcpu=cortex-a520 %s 2>&1 | FileCheck %s
2+
// RUN: %clang -### --target=aarch64-none-elf -mcpu=cortex-a520 %s 2>&1 | FileCheck %s --check-prefix=ABSENT
33
// CHECK: "-target-feature" "+predres"
44
// CHECK-NOT: "-target-feature" "-predres"
55

‎clang/test/Driver/aarch64-ras.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,8 +3,8 @@
33
// RUN: %clang --target=aarch64-none-elf -march=armv8.2a+ras -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RAS %s
44
// RUN: %clang --target=aarch64-none-elf -march=armv8-a+ras -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RAS %s
55
// RUN: %clang --target=aarch64-none-elf -mcpu=generic+ras -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RAS %s
6-
// RUN: %clang --target=aarch64-none-elf -mcpu=cortex-a75 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RAS %s
7-
// RUN: %clang --target=aarch64-none-elf -mcpu=cortex-a55 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RAS %s
6+
// RUN: %clang --target=aarch64-none-elf -mcpu=cortex-a75 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ABSENT %s
7+
// RUN: %clang --target=aarch64-none-elf -mcpu=cortex-a55 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ABSENT %s
88
// CHECK-RAS: "-target-feature" "+ras"
99

1010
// RUN: %clang --target=aarch64-none-elf -march=armv8a+noras -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ABSENT %s

‎clang/test/Driver/aarch64-rdm.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
// RUN: %clang --target=aarch64-none-elf -march=armv8a+rdma -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RDM %s
33
// RUN: %clang --target=aarch64-none-elf -mcpu=generic+rdm -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RDM %s
44
// RUN: %clang --target=aarch64-none-elf -mcpu=falkor -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RDM %s
5-
// RUN: %clang --target=aarch64-none-elf -mcpu=thunderx2t99 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RDM %s
5+
// RUN: %clang --target=aarch64-none-elf -mcpu=thunderx2t99 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-NORDM %s
66
// CHECK-RDM: "-target-feature" "+rdm"
77

88
// RUN: %clang --target=aarch64-none-elf -march=armv8a+nordm -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-NORDM %s

‎clang/test/Driver/arm-sb.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// RUN: %clang -### -target arm-none-none-eabi -march=armv8a+sb %s 2>&1 | FileCheck %s
22
// RUN: %clang -### -target aarch64-none-elf -march=armv8a+sb %s 2>&1 | FileCheck %s
3-
// RUN: %clang -### -target aarch64-none-elf -mcpu=cortex-a510 %s 2>&1 | FileCheck %s
3+
// RUN: %clang -### -target aarch64-none-elf -mcpu=cortex-a510 %s 2>&1 | FileCheck %s --check-prefix=ABSENT
44
// CHECK: "-target-feature" "+sb"
55
// CHECK-NOT: "-target-feature" "-sb"
66

‎llvm/lib/TargetParser/AArch64TargetParser.cpp‎

Lines changed: 10 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -226,7 +226,8 @@ void AArch64::PrintSupportedExtensions() {
226226
}
227227

228228
void
229-
AArch64::printEnabledExtensions(const std::set<StringRef> &EnabledFeatureNames) {
229+
AArch64::printEnabledExtensions(
230+
const std::set<StringRef> &EnabledFeatureNames) {
230231
outs() << "Extensions enabled for the given AArch64 target\n\n"
231232
<< " " << left_justify("Architecture Feature(s)", 55)
232233
<< "Description\n";
@@ -246,7 +247,8 @@ AArch64::printEnabledExtensions(const std::set<StringRef> &EnabledFeatureNames)
246247
// NB: StringTable strings are null-terminated, so the StringRef can be used
247248
// as C string without further conversion.
248249
outs() << " "
249-
<< format("%-55s%s\n", StrTab[Ext.ArchFeatureName].data(),
250+
<< format("%-55s%s\n",
251+
Ext.ArchFeatureName.str().c_str(),
250252
StrTab[Ext.Description].data());
251253
}
252254
}
@@ -345,20 +347,19 @@ void AArch64::ExtensionSet::disable(ArchExtKind E) {
345347
disable(Dep.Later);
346348
}
347349

348-
static void setEnableIfMandatory(AArch64::ExtensionSet &Exts,
349-
AArch64::ExtensionInfo E) {
350-
if (Exts.BaseArch->DefaultExts.test(E.ID))
351-
Exts.Enabled.set(E.ID);
352-
}
353-
354350
void AArch64::ExtensionSet::addCPUDefaults(const CpuInfo &CPU) {
355351
LLVM_DEBUG(llvm::dbgs() << "addCPUDefaults(" << StrTab[CPU.Name] << ")\n");
356352
BaseArch = &ArchInfos[CPU.ArchIdx];
357353

354+
// Enabling the default extensions for the base-architecture is used for the
355+
// explicit +no<feature>. Does not call enable() because we do not want to set
356+
// Touched to avoid marking redundant features in the cc1 command-line.
358357
for (const auto &E : Extensions)
358+
if (BaseArch->DefaultExts.test(E.ID))
359+
Enabled.set(E.ID);
360+
for (const auto &E : Extensions) {
359361
if (CPU.DefaultExtensions.test(E.ID))
360362
enable(E.ID);
361-
setEnableIfMandatory(*this, E);
362363
}
363364
}
364365

‎llvm/unittests/TargetParser/TargetParserTest.cpp‎

Lines changed: 11 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -2321,28 +2321,25 @@ INSTANTIATE_TEST_SUITE_P(
23212321
AArch64ExtensionDependenciesBaseCPUTestParams
23222322
AArch64ExtensionDependenciesCPUData[] = {
23232323
// Base CPU features
2324-
{"cortex-a57",
2325-
{},
2326-
{"v8a", "aes", "crc", "fp-armv8", "sha2", "neon"},
2327-
{}},
2324+
{"cortex-a57", {}, {"v8a", "aes", "crc", "sha2"}, {"fp-armv8", "neon"}},
23282325
{"cortex-r82",
23292326
{},
2330-
{"v8r", "crc", "dotprod", "fp-armv8", "fullfp16", "fp16fml", "lse",
2331-
"ras", "rcpc", "rdm", "sb", "neon", "ssbs"},
2332-
{}},
2327+
{"v8r"},
2328+
{"crc", "dotprod", "fp-armv8", "fullfp16", "fp16fml", "lse", "ras",
2329+
"rcpc", "rdm", "sb", "neon", "ssbs"}},
23332330
{"cortex-a520",
23342331
{},
2335-
{"v9.2a", "bf16", "crc", "dotprod", "flagm", "fp-armv8",
2336-
"fullfp16", "fp16fml", "i8mm", "lse", "mte", "pauth",
2337-
"perfmon", "predres", "ras", "rcpc", "rdm", "sb",
2338-
"neon", "ssbs", "sve", "sve-bitperm", "sve2"},
2339-
{}},
2332+
{"v9.2a", "fp16fml", "mte", "perfmon", "sve-bitperm"},
2333+
{"bf16", "crc", "dotprod", "flagm", "fp-armv8", "fullfp16", "i8mm",
2334+
"lse", "pauth", "predres", "ras", "rcpc", "rdm", "sb", "neon", "ssbs",
2335+
"sve", "sve2"}},
23402336

23412337
// Negative modifiers
23422338
{"cortex-r82",
23432339
{"nofp"},
2344-
{"v8r", "crc", "lse", "ras", "rcpc", "sb", "ssbs"},
2345-
{"fp-armv8", "neon", "fullfp16", "fp16fml", "dotprod", "rdm"}},
2340+
{"v8r"},
2341+
{"crc", "lse", "ras", "rcpc", "sb", "ssbs", "fp-armv8", "neon",
2342+
"fullfp16", "fp16fml", "dotprod", "rdm"}},
23462343
};
23472344

23482345
INSTANTIATE_TEST_SUITE_P(

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