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Commit d9d9be6
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[AArch64] Update SVE scheduling of some CPUs
* Update cortex-a510 and neoverse-v2 SVE scheduling so that pseudos
have the same instruction latency as original instruction.
Differential Revision: https://reviews.llvm.org/D1540841 parent c35d207 commit d9d9be6
4 files changed
Lines changed: 529 additions & 442 deletions
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- llvm
- lib/Target/AArch64
- unittests/Target/AArch64
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