Add automatic type conversion and the node graph preprocessor by TrueDoctor · Pull Request #2478 · GraphiteEditor/Graphite

TrueDoctor · 2025-03-25T10:13:04Z

Merging with the preprocessor disabled for tests, as a temporary measure before continuing to debug and solve why tests are failing with the preprocessor.

github-actions · 2025-06-10T14:59:47Z

Performance Benchmark Results

compile_demo_art_iai::compile_group::compile_to_proto with_setup_0:load_from_name(isometric-fountain)
Instructions: 25,059,519 (master) -> 25,034,406 (HEAD) : $$\color{lime}-0.10\%$$

Detailed metrics

Baselines:                master|       HEAD
D1mr                     310,527|    310,364          -0.05%
D1mw                      99,166|     99,289          +0.12%
DLmr                      28,696|     28,473          -0.78%
DLmw                      39,653|     31,390         -20.84%
Dr                     6,027,890|  6,021,828          -0.10%
Dw                     4,266,982|  4,265,360          -0.04%
EstimatedCycles       39,232,821| 38,968,924          -0.67%
I1mr                      40,772|     46,697         +14.53%
ILmr                         870|        868          -0.23%
Ir                    25,059,519| 25,034,406          -0.10%
L1hits                34,903,926| 34,865,244          -0.11%
LLhits                   381,246|    395,619          +3.77%
RamHits                   69,219|     60,731         -12.26%
TotalRW               35,354,391| 35,321,594          -0.09%

compile_demo_art_iai::compile_group::compile_to_proto with_setup_1:load_from_name(painted-dreams)
Instructions: 13,043,506 (master) -> 12,238,034 (HEAD) : $$\color{lime}-6.18\%$$

Detailed metrics

Baselines:                master|       HEAD
D1mr                     155,488|    145,191          -6.62%
D1mw                      49,400|     46,951          -4.96%
DLmr                         550|        330         -40.00%
DLmw                      12,892|     15,022         +16.52%
Dr                     3,137,788|  2,942,905          -6.21%
Dw                     2,212,432|  2,076,093          -6.16%
EstimatedCycles       19,717,844| 18,595,746          -5.69%
I1mr                      19,874|     21,899         +10.19%
ILmr                         727|        733          +0.83%
Ir                    13,043,506| 12,238,034          -6.18%
L1hits                18,168,964| 17,042,991          -6.20%
LLhits                   210,593|    197,956          -6.00%
RamHits                   14,169|     16,085         +13.52%
TotalRW               18,393,726| 17,257,032          -6.18%

compile_demo_art_iai::compile_group::compile_to_proto with_setup_2:load_from_name(procedural-string-lights)
Instructions: 2,155,361 (master) -> 2,649,750 (HEAD) : $$\color{red}+22.94\%$$

Detailed metrics

Baselines:                master|       HEAD
D1mr                      22,312|     27,367         +22.66%
D1mw                      10,547|     12,376         +17.34%
DLmr                          18|         20         +11.11%
DLmw                       2,427|      2,598          +7.05%
Dr                       493,843|    608,854         +23.29%
Dw                       361,019|    445,600         +23.43%
EstimatedCycles        3,254,285|  3,988,880         +22.57%
I1mr                       4,464|      6,346         +42.16%
ILmr                         714|        726          +1.68%
Ir                     2,155,361|  2,649,750         +22.94%
L1hits                 2,972,900|  3,658,115         +23.05%
LLhits                    34,164|     42,745         +25.12%
RamHits                    3,159|      3,344          +5.86%
TotalRW                3,010,223|  3,704,204         +23.05%

compile_demo_art_iai::compile_group::compile_to_proto with_setup_3:load_from_name(parametric-dunescape)
Instructions: 12,498,424 (master) -> 12,490,538 (HEAD) : $$\color{lime}-0.06\%$$

Detailed metrics

Baselines:                master|       HEAD
D1mr                     152,097|    152,340          +0.16%
D1mw                      49,855|     50,433          +1.16%
DLmr                          40|         40          +0.00%
DLmw                      12,261|     12,129          -1.08%
Dr                     2,973,651|  2,972,138          -0.05%
Dw                     2,123,852|  2,123,729          -0.01%
EstimatedCycles       18,869,989| 18,870,693          +0.00%
I1mr                      17,931|     20,634         +15.07%
ILmr                         850|        853          +0.35%
Ir                    12,498,424| 12,490,538          -0.06%
L1hits                17,376,044| 17,362,998          -0.08%
LLhits                   206,732|    210,385          +1.77%
RamHits                   13,151|     13,022          -0.98%
TotalRW               17,595,927| 17,586,405          -0.05%

compile_demo_art_iai::compile_group::compile_to_proto with_setup_4:load_from_name(red-dress)
Instructions: 29,966,806 (master) -> 29,983,872 (HEAD) : $$\color{red}+0.06\%$$

Detailed metrics

Baselines:                master|       HEAD
D1mr                     380,623|    383,047          +0.64%
D1mw                     126,156|    126,220          +0.05%
DLmr                      40,777|     40,908          +0.32%
DLmw                      62,541|     63,944          +2.24%
Dr                     7,150,442|  7,153,930          +0.05%
Dw                     5,071,601|  5,075,466          +0.08%
EstimatedCycles       47,515,731| 47,624,716          +0.23%
I1mr                      43,554|     50,605         +16.19%
ILmr                         867|        880          +1.50%
Ir                    29,966,806| 29,983,872          +0.06%
L1hits                41,638,516| 41,653,396          +0.04%
LLhits                   446,148|    454,140          +1.79%
RamHits                  104,185|    105,732          +1.48%
TotalRW               42,188,849| 42,213,268          +0.06%

compile_demo_art_iai::compile_group::compile_to_proto with_setup_5:load_from_name(valley-of-spires)
Instructions: 19,012,009 (master) -> 19,001,663 (HEAD) : $$\color{lime}-0.05\%$$

Detailed metrics

Baselines:                master|       HEAD
D1mr                     234,303|    234,426          +0.05%
D1mw                      75,835|     76,816          +1.29%
DLmr                      12,413|     12,031          -3.08%
DLmw                      29,038|     29,562          +1.80%
Dr                     4,558,362|  4,554,870          -0.08%
Dw                     3,228,378|  3,227,961          -0.01%
EstimatedCycles       29,427,501| 29,439,452          +0.04%
I1mr                      30,385|     34,655         +14.05%
ILmr                         771|        786          +1.95%
Ir                    19,012,009| 19,001,663          -0.05%
L1hits                26,458,226| 26,438,597          -0.07%
LLhits                   298,301|    303,518          +1.75%
RamHits                   42,222|     42,379          +0.37%
TotalRW               26,798,749| 26,784,494          -0.05%

github-actions · 2025-06-15T08:06:30Z

Performance Benchmark Results

compile_demo_art_iai::compile_group::compile_to_proto with_setup_0:load_from_name(isometric-fountain)
Instructions: 25,044,734 (master) -> 25,035,193 (HEAD) : $$\color{lime}-0.04\%$$

Detailed metrics

Baselines:                master|       HEAD
D1mr                     308,700|    310,306          +0.52%
D1mw                      97,601|     99,338          +1.78%
DLmr                      28,688|     28,471          -0.76%
DLmw                      37,926|     31,408         -17.19%
Dr                     6,025,528|  6,022,054          -0.06%
Dw                     4,266,244|  4,265,470          -0.02%
EstimatedCycles       39,167,582| 38,970,491          -0.50%
I1mr                      45,353|     46,697          +2.96%
ILmr                         868|        868          +0.00%
Ir                    25,044,734| 25,035,193          -0.04%
L1hits                34,884,852| 34,866,376          -0.05%
LLhits                   384,172|    395,594          +2.97%
RamHits                   67,482|     60,747          -9.98%
TotalRW               35,336,506| 35,322,717          -0.04%

compile_demo_art_iai::compile_group::compile_to_proto with_setup_1:load_from_name(painted-dreams)
Instructions: 13,039,309 (master) -> 12,237,390 (HEAD) : $$\color{lime}-6.15\%$$

Detailed metrics

Baselines:                master|       HEAD
D1mr                     154,895|    145,302          -6.19%
D1mw                      49,478|     46,949          -5.11%
DLmr                         807|        328         -59.36%
DLmw                      16,337|     15,015          -8.09%
Dr                     3,137,401|  2,942,836          -6.20%
Dw                     2,212,017|  2,076,094          -6.14%
EstimatedCycles       19,834,217| 18,595,200          -6.25%
I1mr                      22,892|     21,899          -4.34%
ILmr                         737|        733          -0.54%
Ir                    13,039,309| 12,237,390          -6.15%
L1hits                18,161,462| 17,042,170          -6.16%
LLhits                   209,384|    198,074          -5.40%
RamHits                   17,881|     16,076         -10.09%
TotalRW               18,388,727| 17,256,320          -6.16%

compile_demo_art_iai::compile_group::compile_to_proto with_setup_2:load_from_name(procedural-string-lights)
Instructions: 2,158,820 (master) -> 2,649,935 (HEAD) : $$\color{red}+22.75\%$$

Detailed metrics

Baselines:                master|       HEAD
D1mr                      22,193|     27,376         +23.35%
D1mw                      10,497|     12,380         +17.94%
DLmr                          17|         20         +17.65%
DLmw                       2,458|      2,600          +5.78%
Dr                       494,653|    608,860         +23.09%
Dw                       361,499|    445,591         +23.26%
EstimatedCycles        3,261,520|  3,989,174         +22.31%
I1mr                       5,007|      6,346         +26.74%
ILmr                         717|        726          +1.26%
Ir                     2,158,820|  2,649,935         +22.75%
L1hits                 2,977,275|  3,658,284         +22.87%
LLhits                    34,505|     42,756         +23.91%
RamHits                    3,192|      3,346          +4.82%
TotalRW                3,014,972|  3,704,386         +22.87%

compile_demo_art_iai::compile_group::compile_to_proto with_setup_3:load_from_name(parametric-dunescape)
Instructions: 12,502,769 (master) -> 12,493,139 (HEAD) : $$\color{lime}-0.08\%$$

Detailed metrics

Baselines:                master|       HEAD
D1mr                     152,705|    152,277          -0.28%
D1mw                      50,299|     50,391          +0.18%
DLmr                          35|         40         +14.29%
DLmw                      12,238|     12,122          -0.95%
Dr                     2,974,931|  2,972,431          -0.08%
Dw                     2,124,557|  2,123,682          -0.04%
EstimatedCycles       18,884,651| 18,872,944          -0.06%
I1mr                      19,142|     20,635          +7.80%
ILmr                         854|        854          +0.00%
Ir                    12,502,769| 12,493,139          -0.08%
L1hits                17,380,111| 17,365,949          -0.08%
LLhits                   209,019|    210,287          +0.61%
RamHits                   13,127|     13,016          -0.85%
TotalRW               17,602,257| 17,589,252          -0.07%

compile_demo_art_iai::compile_group::compile_to_proto with_setup_4:load_from_name(red-dress)
Instructions: 29,979,575 (master) -> 29,983,097 (HEAD) : $$\color{red}+0.01\%$$

Detailed metrics

Baselines:                master|       HEAD
D1mr                     379,736|    382,800          +0.81%
D1mw                     125,015|    126,249          +0.99%
DLmr                      40,685|     40,903          +0.54%
DLmw                      62,480|     63,922          +2.31%
Dr                     7,151,619|  7,153,824          +0.03%
Dw                     5,072,197|  5,075,449          +0.06%
EstimatedCycles       47,542,045| 47,622,140          +0.17%
I1mr                      49,575|     50,606          +2.08%
ILmr                         880|        880          +0.00%
Ir                    29,979,575| 29,983,097          +0.01%
L1hits                41,649,065| 41,652,715          +0.01%
LLhits                   450,281|    453,950          +0.81%
RamHits                  104,045|    105,705          +1.60%
TotalRW               42,203,391| 42,212,370          +0.02%

compile_demo_art_iai::compile_group::compile_to_proto with_setup_5:load_from_name(valley-of-spires)
Instructions: 19,015,926 (master) -> 19,001,175 (HEAD) : $$\color{lime}-0.08\%$$

Detailed metrics

Baselines:                master|       HEAD
D1mr                     234,382|    234,500          +0.05%
D1mw                      76,846|     76,770          -0.10%
DLmr                      12,053|     12,028          -0.21%
DLmw                      26,442|     29,545         +11.74%
Dr                     4,559,923|  4,554,790          -0.11%
Dw                     3,229,145|  3,227,919          -0.04%
EstimatedCycles       29,364,434| 29,438,350          +0.25%
I1mr                      34,092|     34,654          +1.65%
ILmr                         777|        786          +1.16%
Ir                    19,015,926| 19,001,175          -0.08%
L1hits                26,459,674| 26,437,960          -0.08%
LLhits                   306,048|    303,565          -0.81%
RamHits                   39,272|     42,359          +7.86%
TotalRW               26,804,994| 26,783,884          -0.08%

bhoomikashakya12 · 2025-07-02T04:44:42Z

that's nice

…teEditor#2478) * Prototype document network level into node insertion * Implement Convert trait / node for places we can't use Into * Add isize/usize and i128/u128 implementations for Convert trait * Factor out substitutions into preprocessor crate * Simplify layer node further * Code review * Mark preprocessed networks as generated * Revert changes to layer node definition * Skip generated flag for serialization * Don't expand for tests * Code review --------- Co-authored-by: Keavon Chambers <keavon@keavon.com>

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Keavon changed the title ~~Prototype document network level into node insertion~~ Prototype document network level IntoNode insertion Apr 14, 2025

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TrueDoctor and others added 7 commits June 26, 2025 10:07

Prototype document network level into node insertion

34bc28a

Implement Convert trait / node for places we can't use Into

a7699c7

Add isize/usize and i128/u128 implementations for Convert trait

46bc43a

Factor out substitutions into preprocessor crate

99fd619

Simplify layer node further

ffa7f1a

Code review

67a8739

Mark preprocessed networks as generated

70931b1

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Revert changes to layer node definition

b26a17e

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Skip generated flag for serialization

021b388

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Don't expand for tests

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Code review

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Keavon changed the title ~~Prototype document network level IntoNode insertion~~ Add automatic type conversion and the node graph preprocessor Jun 26, 2025

Keavon approved these changes Jun 26, 2025

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Keavon merged commit a40a760 into master Jun 26, 2025
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Keavon mentioned this pull request Jul 3, 2025

Disable preprocessor insertion of IntoNodes in the graph to avoid intermittent math node type errors #2802

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Add automatic type conversion and the node graph preprocessor#2478

Add automatic type conversion and the node graph preprocessor#2478
Keavon merged 11 commits intomasterfrom
into-nodes

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