@@ -2108,6 +2108,17 @@ enum RegIntrinsic {
21082108 TensorCastI32,
21092109 TensorCastBool,
21102110 TensorDtypeCode,
2111+ // bmm+int/bit (ops D)
2112+ TensorBmm,
2113+ TensorIdiv,
2114+ TensorMod,
2115+ TensorShl,
2116+ TensorShr,
2117+ TensorAnd,
2118+ TensorOr,
2119+ TensorXor,
2120+ TensorBitcastF32ToI32,
2121+ TensorBitcastI32ToF32,
21112122 TensorErrorMessage,
21122123 CharCompare,
21132124 CharFromCode,
@@ -5375,6 +5386,17 @@ fn qualified_intrinsic(namespace: &str, name: &str) -> Option<RegIntrinsic> {
53755386 ("Tensor", "cast_i32") => Some(RegIntrinsic::TensorCastI32),
53765387 ("Tensor", "cast_bool") => Some(RegIntrinsic::TensorCastBool),
53775388 ("Tensor", "dtype_code") => Some(RegIntrinsic::TensorDtypeCode),
5389+ // bmm+int/bit (ops D)
5390+ ("Tensor", "bmm") => Some(RegIntrinsic::TensorBmm),
5391+ ("Tensor", "idiv") => Some(RegIntrinsic::TensorIdiv),
5392+ ("Tensor", "modulo") => Some(RegIntrinsic::TensorMod),
5393+ ("Tensor", "shl") => Some(RegIntrinsic::TensorShl),
5394+ ("Tensor", "shr") => Some(RegIntrinsic::TensorShr),
5395+ ("Tensor", "bit_and") => Some(RegIntrinsic::TensorAnd),
5396+ ("Tensor", "bit_or") => Some(RegIntrinsic::TensorOr),
5397+ ("Tensor", "bit_xor") => Some(RegIntrinsic::TensorXor),
5398+ ("Tensor", "bitcast_f32_to_i32") => Some(RegIntrinsic::TensorBitcastF32ToI32),
5399+ ("Tensor", "bitcast_i32_to_f32") => Some(RegIntrinsic::TensorBitcastI32ToF32),
53785400 ("TensorError", "message") => Some(RegIntrinsic::TensorErrorMessage),
53795401 ("Char", "compare") => Some(RegIntrinsic::CharCompare),
53805402 ("Char", "from_code") => Some(RegIntrinsic::CharFromCode),
@@ -9468,6 +9490,44 @@ impl RegVm {
94689490 let t = self.expect_tensor_ref(intrinsic_arg(&self.stack, base, args, 0)?)?;
94699491 Ok(VmValue::Int(rsscript_runtime::tensor_dtype_code(&t)))
94709492 }
9493+ // bmm+int/bit (ops D)
9494+ RegIntrinsic::TensorBmm
9495+ | RegIntrinsic::TensorIdiv
9496+ | RegIntrinsic::TensorMod
9497+ | RegIntrinsic::TensorShl
9498+ | RegIntrinsic::TensorShr
9499+ | RegIntrinsic::TensorAnd
9500+ | RegIntrinsic::TensorOr
9501+ | RegIntrinsic::TensorXor => {
9502+ let a = self.expect_tensor_ref(intrinsic_arg(&self.stack, base, args, 0)?)?;
9503+ let b = self.expect_tensor_ref(intrinsic_arg(&self.stack, base, args, 1)?)?;
9504+ let result = match intrinsic {
9505+ RegIntrinsic::TensorBmm => rsscript_runtime::tensor_bmm(&a, &b),
9506+ RegIntrinsic::TensorIdiv => rsscript_runtime::tensor_idiv(&a, &b),
9507+ RegIntrinsic::TensorMod => rsscript_runtime::tensor_mod(&a, &b),
9508+ RegIntrinsic::TensorShl => rsscript_runtime::tensor_shl(&a, &b),
9509+ RegIntrinsic::TensorShr => rsscript_runtime::tensor_shr(&a, &b),
9510+ RegIntrinsic::TensorAnd => rsscript_runtime::tensor_and(&a, &b),
9511+ RegIntrinsic::TensorOr => rsscript_runtime::tensor_or(&a, &b),
9512+ _ => rsscript_runtime::tensor_xor(&a, &b),
9513+ };
9514+ Ok(json_result(match result {
9515+ Ok(tensor) => Ok(self.store_tensor(tensor)),
9516+ Err(error) => Err(tensor_error_value(
9517+ rsscript_runtime::tensor_error_message(&error),
9518+ )),
9519+ }))
9520+ }
9521+ RegIntrinsic::TensorBitcastF32ToI32 | RegIntrinsic::TensorBitcastI32ToF32 => {
9522+ let t = self.expect_tensor_ref(intrinsic_arg(&self.stack, base, args, 0)?)?;
9523+ let result = match intrinsic {
9524+ RegIntrinsic::TensorBitcastF32ToI32 => {
9525+ rsscript_runtime::tensor_bitcast_f32_to_i32(&t)
9526+ }
9527+ _ => rsscript_runtime::tensor_bitcast_i32_to_f32(&t),
9528+ };
9529+ Ok(self.store_tensor(result))
9530+ }
94719531 RegIntrinsic::CharCompare | RegIntrinsic::CharFromCode | RegIntrinsic::CharIsAlphanumeric | RegIntrinsic::CharIsAlpha | RegIntrinsic::CharIsDigit | RegIntrinsic::CharIsLower | RegIntrinsic::CharIsUpper | RegIntrinsic::CharIsWhitespace | RegIntrinsic::CharToCode | RegIntrinsic::CharToLower | RegIntrinsic::CharToString | RegIntrinsic::CharToUpper => self.exec_char_intrinsics(unit, intrinsic, args, base, next_base),
94729532 RegIntrinsic::ClockNow => Ok(instant_value(clock_system_unix_ms())),
94739533 RegIntrinsic::ClockSystemUnixMs => Ok(VmValue::Int(clock_system_unix_ms())),
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