Skip to content

Commit bdfeba0

Browse files
HyperWinXHyperWinX
committed
Update CMP instruction
1 parent dab988c commit bdfeba0

10 files changed

Lines changed: 127 additions & 87 deletions

File tree

‎src/Emulator/Core/CPU/CPU.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
77
#include "Emulator/Core/MemoryController/MemoryControllerST.hpp"
88

99
HyperCPU::CPU::CPU(std::uint16_t core_count, std::uint64_t mem_size, char* binary, std::uint64_t binary_size)
10-
: mem_controller(dynamic_cast<IMemoryController*>(new MemoryControllerST(mem_size, this))),
10+
: mem_controller(new MemoryControllerST(mem_size, this)),
1111
core_count(core_count),
1212
total_mem(mem_size),
1313
halted(false),

‎src/Emulator/Core/CPU/CPU.hpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@
66
#include "Emulator/Core/CPU/Decoders/StdDecoder.hpp"
77
#include "Emulator/Core/CPU/IO/Simple.hpp"
88
#include "Emulator/Core/CPU/Interrupts/ReservedInterrupts.hpp"
9-
#include "Emulator/Core/MemoryController/IMemoryController.hpp"
9+
#include "Emulator/Core/MemoryController/MemoryControllerST.hpp"
1010

1111
#define DECLARE_INSTR(name) void Exec##name(const IInstruction& instr, OperandContainer op1, OperandContainer op2)
1212

@@ -23,7 +23,7 @@ namespace HyperCPU {
2323
using write_operation_handler = std::function<void(std::uint8_t)>;
2424

2525
// Components
26-
IMemoryController* mem_controller;
26+
MemoryControllerST* mem_controller;
2727
std::unique_ptr<Decoder> m_decoder;
2828

2929
// Data

‎src/Emulator/Core/CPU/Decoders/StdDecoder.hpp‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
#include "Common/LanguageSpec/Flags.hpp"
66
#include "Common/LanguageSpec/Opcodes.hpp"
77
#include "Emulator/Core/CPU/Decoders/IDecoder.hpp"
8-
#include "Emulator/Core/MemoryController/IMemoryController.hpp"
8+
#include "Emulator/Core/MemoryController/MemoryControllerST.hpp"
99
#include "Emulator/Misc/bit_cast.hpp"
1010

1111
namespace HyperCPU {
@@ -15,6 +15,8 @@ namespace HyperCPU {
1515
EnabledOp2 = 0b11
1616
};
1717

18+
class MemoryControllerST;
19+
1820
struct OperandContainer {
1921
public:
2022
OperandContainer()
@@ -83,7 +85,7 @@ namespace HyperCPU {
8385

8486
class Decoder final : public IDecoder {
8587
private:
86-
IMemoryController* mem_controller;
88+
MemoryControllerST* mem_controller;
8789
std::uint64_t* xip;
8890
class CPU* cpu;
8991
bool decoder_halted;
@@ -93,7 +95,7 @@ namespace HyperCPU {
9395

9496
public:
9597
explicit Decoder() = default; // For testing purposes - causes UB if used incorrectly
96-
explicit Decoder(IMemoryController* mc, std::uint64_t* counter, class CPU* cpu)
98+
explicit Decoder(MemoryControllerST* mc, std::uint64_t* counter, class CPU* cpu)
9799
: mem_controller(mc), xip(counter), cpu(cpu), decoder_halted(false) {
98100
}
99101

‎src/Emulator/Core/CPU/InstructionsImpl/ADC.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@ class HyperCPU::CPU::CPU_InstrImpl {
3131
static_assert(std::is_same_v<T2, std::uint64_t>); // Locked by current CPU specification
3232

3333
T2 ptr = HyperCPU::bit_cast_from<T2>(op2.ptr<T2>());
34-
T1 val = cpu.mem_controller->Read8(ptr);
34+
T1 val = cpu.mem_controller->Read<T1>(ptr);
3535
cpu.ovf = AdditionWillOverflow(op1.deref<T1>(), val);
3636

3737
op1.deref<T1>() = HyperALU::__hcpu_add(op1.deref<T1>(), val);
@@ -46,7 +46,7 @@ class HyperCPU::CPU::CPU_InstrImpl {
4646
static_assert(std::is_same_v<T2, std::uint64_t>); // Locked by current CPU specification
4747

4848
T2 ptr = HyperCPU::bit_cast<T2>(op2);
49-
T1 val = cpu.mem_controller->Read8(ptr);
49+
T1 val = cpu.mem_controller->Read<T1>(ptr);
5050
cpu.ovf = AdditionWillOverflow(op1.deref<T1>(), val);
5151

5252
op1.deref<T1>() = HyperALU::__hcpu_add(op1.deref<T1>(), val);

‎src/Emulator/Core/CPU/InstructionsImpl/ADD.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,7 @@ class HyperCPU::CPU::CPU_InstrImpl {
2828
static_assert(std::is_same_v<T2, std::uint64_t>); // Locked by current CPU specification
2929

3030
T2 ptr = HyperCPU::bit_cast_from<T2>(op2.ptr<T2>());
31-
T1 val = cpu.mem_controller->Read8(ptr);
31+
T1 val = cpu.mem_controller->Read<T1>(ptr);
3232
cpu.ovf = AdditionWillOverflow(op1.deref<T1>(), val);
3333

3434
op1.deref<T1>() = HyperALU::__hcpu_add(op1.deref<T1>(), val);
@@ -40,7 +40,7 @@ class HyperCPU::CPU::CPU_InstrImpl {
4040
static_assert(std::is_same_v<T2, std::uint64_t>); // Locked by current CPU specification
4141

4242
T2 ptr = HyperCPU::bit_cast<T2>(op2);
43-
T1 val = cpu.mem_controller->Read8(ptr);
43+
T1 val = cpu.mem_controller->Read<T1>(ptr);
4444
cpu.ovf = AdditionWillOverflow(op1.deref<T1>(), val);
4545

4646
op1.deref<T1>() = HyperALU::__hcpu_add(op1.deref<T1>(), val);

‎src/Emulator/Core/CPU/InstructionsImpl/AND.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@ class HyperCPU::CPU::CPU_InstrImpl {
2727
static_assert(std::is_same_v<T2, std::uint64_t>); // Locked by current CPU specification
2828

2929
T2 ptr = HyperCPU::bit_cast_from<T2>(op2.ptr<T2>());
30-
T1 val = cpu.mem_controller->Read8(ptr);
30+
T1 val = cpu.mem_controller->Read<T1>(ptr);
3131

3232
op1.deref<T1>() = HyperALU::__hcpu_and(op1.deref<T1>(), val);
3333
}
@@ -38,7 +38,7 @@ class HyperCPU::CPU::CPU_InstrImpl {
3838
static_assert(std::is_same_v<T2, std::uint64_t>); // Locked by current CPU specification
3939

4040
T2 ptr = HyperCPU::bit_cast<T2>(op2);
41-
T1 val = cpu.mem_controller->Read8(ptr);
41+
T1 val = cpu.mem_controller->Read<T1>(ptr);
4242

4343
op1.deref<T1>() = HyperALU::__hcpu_and(op1.deref<T1>(), val);
4444
}

‎src/Emulator/Core/CPU/InstructionsImpl/ANDN.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,7 @@ class HyperCPU::CPU::CPU_InstrImpl {
2828
static_assert(std::is_same_v<T2, std::uint64_t>); // Locked by current CPU specification
2929

3030
T2 ptr = HyperCPU::bit_cast_from<T2>(op2.ptr<T2>());
31-
T1 val = cpu.mem_controller->Read8(ptr);
31+
T1 val = cpu.mem_controller->Read<T1>(ptr);
3232
cpu.ovf = AdditionWillOverflow(op1.deref<T1>(), val);
3333

3434
op1.deref<T1>() = HyperALU::__hcpu_and(HyperALU::__hcpu_not(op1.deref<T1>()), val);
@@ -40,7 +40,7 @@ class HyperCPU::CPU::CPU_InstrImpl {
4040
static_assert(std::is_same_v<T2, std::uint64_t>); // Locked by current CPU specification
4141

4242
T2 ptr = HyperCPU::bit_cast<T2>(op2);
43-
T1 val = cpu.mem_controller->Read8(ptr);
43+
T1 val = cpu.mem_controller->Read<T1>(ptr);
4444
cpu.ovf = AdditionWillOverflow(op1.deref<T1>(), val);
4545

4646
op1.deref<T1>() = HyperALU::__hcpu_and(HyperALU::__hcpu_not(op1.deref<T1>()), val);

‎src/Emulator/Core/CPU/InstructionsImpl/BSWAP.cpp‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,16 +8,19 @@ void HyperCPU::CPU::ExecBSWAP(const IInstruction& instr, OperandContainer op1, O
88
break;
99

1010
case Mode::b16: {
11+
auto& dst = op1.deref<std::uint16_t>();
1112
dst = HyperCPU::byteswap(op1.deref<std::uint16_t>());
1213
break;
1314
}
1415

1516
case Mode::b32: {
17+
auto& dst = op1.deref<std::uint32_t>();
1618
dst = HyperCPU::byteswap(op1.deref<std::uint32_t>());
1719
break;
1820
}
1921

2022
case Mode::b64: {
23+
auto& dst = op1.deref<std::uint64_t>();
2124
dst = HyperCPU::byteswap(op1.deref<std::uint64_t>());
2225
break;
2326
}

0 commit comments

Comments
 (0)