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Commit 162914e

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oganigloganigl
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Add Hardfault check function, checks if there was a hard_fault, and if that the case, party starts
1 parent d27b33a commit 162914e

4 files changed

Lines changed: 146 additions & 0 deletions

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‎Inc/HALAL/HALAL.hpp‎

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#include "HALAL/Models/Concepts/Concepts.hpp"
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#include "HALAL/Models/MDMA/MDMA.hpp"
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#include "HALAL/HardFault/HardfaultTrace.h"
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#include "HALAL/Benchmarking_toolkit/DataWatchpointTrace/DataWatchpointTrace.hpp"
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#ifdef STLIB_ETH
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#include "HALAL/Models/Packets/Packet.hpp"
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#include "HALAL/Models/Packets/Order.hpp"

‎Inc/HALAL/HardFault/HardfaultTrace.h‎

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#ifndef __HARD_FAULT_TRACE
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#define __HARD_FAULT_TRACE
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#include "stm32h7xx_ll_gpio.h"
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#include "stm32h7xx_ll_bus.h"
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#include "stm32h7xx_ll_tim.h"
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#define METADATA_FLASH_ADDR (0x080DFD00) //Metadata pool flash address
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#define HF_FLASH_ADDR (0x080C0000U) //Hard_fault_flash address
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#define HF_FLAG_VALUE (0xFF00FF00U) //Flag to know if already is written information in the flash
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#define METADATA_FLASH_SIZE (0X100U)
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#define HARD_FAULT_FLASH_SIZE (0X200U)
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#define CALL_TRACE_MAX_DEPTH 16
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typedef struct __attribute__((packed)) ContextStateFrame {
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uint32_t r0;
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uint32_t r1;
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uint32_t r2;
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uint32_t r3;
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uint32_t r12;
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uint32_t lr;
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uint32_t return_address;
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uint32_t xpsr;
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} sContextStateFrame;
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typedef struct __attribute__((packed)) HardFaultLog{
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uint32_t HF_flag;
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sContextStateFrame frame;
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union{
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uint32_t cfsr;
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struct CfSrFields{
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uint8_t MMFSR;
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uint8_t BFSR;
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uint16_t UFSR;
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}fields;
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}CfsrDecode;
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union{
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uint32_t Nothing_Valid;
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uint32_t MMAR_VALID;
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uint32_t BFAR_VALID;
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}fault_address;
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struct __attribute__((packed)){
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uint32_t depth;
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uint32_t pcs[CALL_TRACE_MAX_DEPTH];
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}CallTrace;
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}HardFaultLog; // 112 bytes this estructure
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#ifdef __cplusplus
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extern "C" {
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#endif
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void Hard_fault_check(void);
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#ifdef __cplusplus
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}
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#endif
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#endif

‎STM32H723ZGTX_FLASH.ld‎

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ENTRY(Reset_Handler)
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/* Highest address of the user mode stack */
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_sstack = ORIGIN(DTCMRAM);
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_estack = ORIGIN(DTCMRAM) + LENGTH(DTCMRAM); /* end of RAM */
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/* Generate a link error if heap and stack don't fit into RAM/DTCM */
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_Min_Heap_Size = 0x200; /* required amount of heap */
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.text :
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{
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. = ALIGN(4);
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_stext = .;
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.glue_7) /* glue arm to thumb code */
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. = ALIGN(4);
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} >FLASH
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.hardfault_stack (NOLOAD) : /*Stack memory to avoid memfault inside hardfault handler*/
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{
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. = ALIGN(8);
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_hf_stack_start = .;
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. += 0x400; /* 1 KB */
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_hf_stack_end = .;
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} >DTCMRAM
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.ARM.extab (READONLY): { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
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.ARM (READONLY): {
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__exidx_start = .;
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the sections below it would try to be placed afterwards
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thus overflowing the FLASH
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*/
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.hardfault_log 0x080C0000 :
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{
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KEEP(*(.hardfault_log))
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. = . + 0x200;
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} >FLASH
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.metadata_pool :
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{
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. = ABSOLUTE(0x080DFD00);
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KEEP(*(.metadata_pool))
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. += 0x100;
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} >FLASH
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/* Uninitialized data section */
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. = ALIGN(4);
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.bss (NOLOAD) :

‎Src/HALAL/HardFault/HardfaultTrace.c‎

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#include "HALAL/HardFault/HardfaultTrace.h"
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#ifdef NUCLEO
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#define REPS 200000
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#endif
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#ifdef BOARD
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#define REPS 600000 // Three times faster because the board frequency
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#endif
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extern GPIO_TypeDef* ports_hard_fault[];
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extern uint16_t pins_hard_fault[];
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extern uint8_t hard_fault_leds_count;
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static void LED_Blink();
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static void LED_init(void);
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static void EnableGPIOClock(GPIO_TypeDef* port);
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static void InitGPIO_Output(GPIO_TypeDef* port,uint16_t pin);
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static void delay();
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__attribute__((optimize("O0")))
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static void delay(){
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for(volatile uint64_t i = 0; i < REPS; i++){
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__NOP();
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}
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}
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static void LED_Blink(){
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for(volatile int i = 0; i < hard_fault_leds_count;i++){
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LL_GPIO_TogglePin(ports_hard_fault[i],pins_hard_fault[i]);
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}
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delay();
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}
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static void LED_init(void){
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for(int i = 0; i < hard_fault_leds_count;i++){
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EnableGPIOClock(ports_hard_fault[i]);
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InitGPIO_Output(ports_hard_fault[i],pins_hard_fault[i]);
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}
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}
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void Hard_fault_check(void){
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if(*(volatile uint32_t*)HF_FLASH_ADDR == HF_FLAG_VALUE){
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volatile HardFaultLog log;
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memcpy(&log,(void*)HF_FLASH_ADDR,sizeof(HardFaultLog));
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#ifdef DEBUG
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__asm__ __volatile__("bkpt 1");
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#endif
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LED_init();
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while(1){
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LED_Blink();
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}
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}
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}
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static void EnableGPIOClock(GPIO_TypeDef* port){
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if(port == GPIOA) LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOA);
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else if(port == GPIOB) LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOB);
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else if(port == GPIOC) LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOC);
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else if(port == GPIOD) LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOD);
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else if(port == GPIOE) LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOE);
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else if(port == GPIOF) LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOF);
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else if(port == GPIOG) LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOG);
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else if(port == GPIOJ) LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOJ);
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else if(port == GPIOK) LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOK);
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}
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static void InitGPIO_Output(GPIO_TypeDef* port,uint16_t pin){
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LL_GPIO_SetPinMode(port, pin, LL_GPIO_MODE_OUTPUT);
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LL_GPIO_SetPinOutputType(port, pin, LL_GPIO_OUTPUT_PUSHPULL);
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LL_GPIO_SetPinSpeed(port, pin, LL_GPIO_SPEED_FREQ_LOW);
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LL_GPIO_SetPinPull(port, pin, LL_GPIO_PULL_NO);
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}
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